Add generic APIs to map the DT node and its sub node in pinconf generic
driver. These APIs can be used from driver to parse the DT node who
uses the pinconf generic APIs for defining their nodes.

Changes from V1:
- Add generic property for pins and functions in pinconf-generic.
- Add APIs to map the DT and subnode.
- Move common utils APIs to the pinctrl-utils from this file.
- Update the binding document accordingly.
Changes from V2:
- Rebased the pinctrl binding doc on top of Stephen's cleanup.
- Rename properties "pinctrl-pins" and "pinctrl-function" to
  "pins" and "function".
Signed-off-by: NLaxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Some of pincontrol driver needs the utility function to create map
list. The utility function needed for adding mux, configs etc.

In place of duplicating this in each driver, add the common utility
function in common file and use from device specific driver. This will
reduce the duplicating of code across drivers.

Changes from V1:
- Add this files in this patch and add common utility APIs to here.

Changes from V2:
- Nothing in code.
- Added Reviewed by Stephen.
Signed-off-by: NLaxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

One peripheral may share part of its pins with the 2nd
peripheral and the other pins with the 3rd. If it requests all pins
when part of them has already be requested and owned by the 2nd
peripheral, this request fails and pinmux_disable_setting() is called.
The pinmux_disable_setting() frees all pins of the first peripheral
without checking if the pin is owned by itself or the 2nd, which
results in the malfunction of the 2nd peripheral driver.
Signed-off-by: NSonic Zhang <sonic.zhang@analog.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The pin control subsystem was created to do away with custom pin
control APIs such as this one. It was kept for backward-compatibility
but is completely unused in the current kernel, so let's delete
it.
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

pinctrl bindings can benefit from generic property names that define
which pins a "pin configuration node" affects, and which mux function
to select onto those pins. Document new properties for this purpose so
that other bindings may refer to them.
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Added missing __iomem annotation in order to fix the following
sparse warnings:

drivers/pinctrl/sirf/pinctrl-sirf.c:846:14: warning: incorrect type in assignment (different address spaces)
drivers/pinctrl/sirf/pinctrl-sirf.c:846:14:    expected void *regs
drivers/pinctrl/sirf/pinctrl-sirf.c:846:14:    got void [noderef] <asn:2>*
drivers/pinctrl/sirf/pinctrl-sirf.c:869:33: warning: incorrect type in assignment (different address spaces)
drivers/pinctrl/sirf/pinctrl-sirf.c:869:33:    expected void [noderef] <asn:2>*regs
drivers/pinctrl/sirf/pinctrl-sirf.c:869:33:    got void *regs
drivers/pinctrl/sirf/pinctrl-sirf.c:909:17: warning: incorrect type in argument 1 (different address spaces)
drivers/pinctrl/sirf/pinctrl-sirf.c:909:17:    expected void volatile [noderef] <asn:2>*addr
drivers/pinctrl/sirf/pinctrl-sirf.c:909:17:    got void *regs
Signed-off-by: NJingoo Han <jg1.han@samsung.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Fix the following sparse warning:

drivers/pinctrl/pinconf.c:521:20: error: incompatible types in comparison expression (different type sizes)
Signed-off-by: NJingoo Han <jg1.han@samsung.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Reword the section of pinctrl-bindings.txt that describes generic
properties that pinctrl bindings may use. The aim is to make the text
clearer, and more explicitly call out the responsibility of individual
bindings that use the generic properties to define which of the
properties are used, and how.
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The current implementation handle both edge and level interrupts with the
'handle_simple_irq' handler.

Level interrupts are active as long as the pin stays at the configured
level (low or high). In this case we have to use 'handle_level_irq' which
mask the interrupt until the handle has treated it.
Signed-off-by: NBoris BREZILLON <b.brezillon@overkiz.com>
Tested-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Symbols used only in this file are made static.
Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
Acked-by: NSrinivas Kandagatla <srinivas.kandagatla@st.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

devm_request_and_ioremap is deprecated. Use devm_ioremap_resource
instead.
Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
Acked-by: NSrinivas Kandagatla <srinivas.kandagatla@st.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The select input for some pin may not be implemented using the regular
select input register but the general purpose register.  A real example
is that imx6q designers found the select input for USB OTG ID pin is
missing at the very late stage, and can not add a new select input
register but have to use a general purpose register bit to implement it.

The patch adds a workaround for such select input quirk by interpreting
the input_val cell of pin function ID in a different way, so that all
the info that needed for setting up select input bits in general purpose
register could be decoded from there.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
Tested-by: NPeter Chen <peter.chen@freescale.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

*map should be tested for NULL instead of map as kmalloc pointer
is assigned to it. This also fixes a potential null pointer dereference
bug later in the code.
Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

So, I notice that we get a couple of warnings from the pinctrl code:

drivers/pinctrl/pinconf.c: In function 'pinconf_dbg_config_print':
drivers/pinctrl/pinconf.c:433:36: warning: 'configs' may be used uninitialized in this function
drivers/pinctrl/pinconf.c: In function 'pinconf_dbg_config_write':
drivers/pinctrl/pinconf.c:511:36: warning: 'configs' may be used uninitialized in this function

While the compiler might not be able to work out that "configs" is
safe, the code doesn't lend itself very well to identifying that
fact when reading it either.  This can be trivially solved by a slight
restructuring of the code - which also reduces the LOC.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

devm_ioremap_resource does sanity checks on the given resource. No need to
duplicate this in the driver.
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The correct header to include for clock handling is clk.h .
clk-provider.h should not be used in simple clock consumers.
Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Signed-off-by: NShinobu Uehara <shinobu.uehara.xc@renesas.com>
Signed-off-by: NRyo Kataoka <ryo.kataoka.wt@renesas.com>
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>

Signed-off-by: NShinobu Uehara <shinobu.uehara.xc@renesas.com>
Signed-off-by: NShinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>

Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>

Signed-off-by: NKunihito Higashiyama <kunihito.higashiyama.ur@renesas.com>
Signed-off-by: NShinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>

Navigating through the source code is hard enough without having to
manually search for groups and functions.
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>

Fix erroneous entries in the pinmux configuration tables that affect
HSCIF, I2C, LBSC, SCIF, SSI and VIN operation.
Signed-off-by: NShinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>

Update the pinmux configuration tables to support the SCIF2 pins
(TX2/TX2_B, RX2/RX2_B, SCK2).
Signed-off-by: NShinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>

Update the pinmux configuration tables to support the TCLK1 pin.
Signed-off-by: NShinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>

The SCIFA2 RXD_B and HRX0_C pins have their pinmux configuration data
swapped, fix it.
Signed-off-by: NShinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>

The pins have been removed from the datasheet, remove them here as well.
Signed-off-by: NShinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>

The pins have been removed from the datasheet, remove them here as well.
Signed-off-by: NShinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>

The pins have been removed from the datasheet, remove them here as well.
Signed-off-by: NShinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>

The RTS/CTS pins have been renamed in the datasheet, rename them here as
well.
Signed-off-by: NShinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>

The I2C pins have been renamed in the datasheet, rename them here as
well.
Signed-off-by: NShinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>

Add all I2C pin groups to R8A7779 PFC driver.
Signed-off-by: NPhil Edworthy <phil.edworthy@renesas.com>
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>

The macros expand to irq_pin() calls and where most probably introduced
from a copy&paste of the sh7372 PFC data. Replace them with irq_pin().
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: NMagnus Damm <damm@opensource.se>

The mach/irqs.h header is included only to get the evt2irq macro
definition. The macro is defined in linux/sh_intc.h, include it directly
instead of the mach-specific header.
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: NMagnus Damm <damm@opensource.se>

The SoC-specific mach/<soc>.h headers are included needlesly. Don't
include them.
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: NMagnus Damm <damm@opensource.se>

Pins with selectable functions but without a GPIO port can't be named
PORT_# or GP_#_#. Add a SH_PFC_PIN_NAMED macro to declare such pins in
the pinmux pins array, naming them with the PIN_ prefix followed by the
pin physical position.

In order to make sure not to register those pins as GPIOs, add a
SH_PFC_PIN_CFG_NO_GPIO pin flag to denote pins without a GPIO port.
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Tested-by: NYusuke Goda <yusuke.goda.sx@renesas.com>

Remove the manually specified ranges from PFC SoC data and compute the
ranges automatically. This prevents ranges from being out-of-sync with
pins definitions.
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Tested-by: NYusuke Goda <yusuke.goda.sx@renesas.com>

The field contains the number of pins with an associated GPIO port. This
is currently equal to the total number of pins but will be modified when
adding support for pins without a GPIO port. Rename the field
accordingly.
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Tested-by: NYusuke Goda <yusuke.goda.sx@renesas.com>

The pin number is usually equal to the GPIO number but can differ when
GPIO numbering is sparse.
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Tested-by: NYusuke Goda <yusuke.goda.sx@renesas.com>