Add a reference to the Canaan K210 system controller driver bindings
file Documentation/devicetree/bindings/mfd/canaan,k210-sysctl.yaml
in the MAINTAINERS file entry for this driver.
Signed-off-by: NDamien Le Moal <damien.lemoal@wdc.com>
Signed-off-by: NPalmer Dabbelt <palmerdabbelt@google.com>

Add the pinctrl-k210.c pinctrl driver for the Canaan Kendryte K210
field programmable IO array (FPIOA) to allow configuring the SoC pin
functions. The K210 has 48 programmable pins which can take any of 256
possible functions.

This patch is inspired from the k210 pinctrl driver for the u-boot
project and contains many direct contributions from Sean Anderson.

The MAINTAINERS file is updated, adding the entry "CANAAN/KENDRYTE K210
SOC FPIOA DRIVER" with myself listed as maintainer for this driver.

Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: linux-gpio@vger.kernel.org
Signed-off-by: NSean Anderson <seanga2@gmail.com>
Signed-off-by: NDamien Le Moal <damien.lemoal@wdc.com>
Reviewed-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NPalmer Dabbelt <palmerdabbelt@google.com>

Add a reset controller driver for the Canaan Kendryte K210 SoC. This
driver relies on its syscon compatible parent node (sysctl) for its
register mapping. Default this driver compilation to y when the
SOC_CANAAN option is selected.

The MAINTAINERS file is updated, adding the entry "CANAAN/KENDRYTE K210
SOC RESET CONTROLLER DRIVER" with myself listed as maintainer for this
driver.
Signed-off-by: NDamien Le Moal <damien.lemoal@wdc.com>
Reviewed-by: NPhilipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: NPalmer Dabbelt <palmerdabbelt@google.com>

Introduce the header file include/soc/canaan/k210-sysctl.h to have a
common definition of the Canaan Kendryte K210 SoC system controller
registers. Simplify the k210 system controller driver code by removing
unused register bits definition. The MAINTAINERS file is updated,
adding the entry "CANAAN/KENDRYTE K210 SOC SYSTEM CONTROLLER DRIVER"
with myself listed as maintainer for this driver.
This is a preparatory patch for introducing the K210 clock driver. No
functional changes are introduced.
Signed-off-by: NDamien Le Moal <damien.lemoal@wdc.com>
Signed-off-by: NPalmer Dabbelt <palmerdabbelt@google.com>

Signed-off-by: NJulia Lawall <Julia.Lawall@inria.fr>

The current pattern in the file entry does not make the files in the
governors subdirectory to be a part of the CPU IDLE TIME MANAGEMENT
FRAMEWORK.

Adjust the file pattern to include files in governors.
Signed-off-by: NLukas Bulwahn <lukas.bulwahn@gmail.com>
Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>

fs/block_dev.c is a pretty integral part of the block layer, so make
sure it is mentioned in MAINTAINERS.
Signed-off-by: NChristoph Hellwig <hch@lst.de>
Reviewed-by: NJohannes Thumshirn <johannes.thumshirn@wdc.com>
Signed-off-by: NJens Axboe <axboe@kernel.dk>

These files don't appear to have a MAINTAINERS entry and as such
patches miss being seen by people who know this code.
Signed-off-by: NPeter Zijlstra (Intel) <peterz@infradead.org>
Acked-by: NSteven Rostedt (VMware) <rostedt@goodmis.org>
Acked-by: NArd Biesheuvel <ardb@kernel.org>
Acked-by: NJosh Poimboeuf <jpoimboe@redhat.com>
Acked-by: NJason Baron <jbaron@akamai.com>
Link: https://lkml.kernel.org/r/20201216133014.GT3092@hirez.programming.kicks-ass.net

GPIO HiSilicon driver doesn't provide any platform data header.

Fixes: a8f25236e6e3 ("MAINTAINERS: Add maintainer for HiSilicon GPIO driver")
Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20201214165524.43843-2-andriy.shevchenko@linux.intel.comSigned-off-by: NLinus Walleij <linus.walleij@linaro.org>

Here add maintainer information for HiSilicon GPIO driver.
Signed-off-by: NLuo Jiaxing <luojiaxing@huawei.com>
Link: https://lore.kernel.org/r/1607934255-52544-3-git-send-email-luojiaxing@huawei.com
[Dropped some dead code when applying]
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Since its creation Marvell NIC driver for Armada 375/7k8k and
CN913x SoC families mvpp2 has been lacking an entry in MAINTAINERS,
which sometimes lead to unhandled bugs that persisted
across several kernel releases.
Signed-off-by: NMarcin Wojtas <mw@semihalf.com>
Acked-by: NAndrew Lunn <andrew@lunn.ch>
Link: https://lore.kernel.org/r/20201211165114.26290-1-mw@semihalf.comSigned-off-by: NJakub Kicinski <kuba@kernel.org>

The entries for JZ47xx SoCs and its drivers lacked MIPS mailing list.
Only MTD NAND driver pointed linux-mtd.  Add linux-mips so the relevant
patches will get attention of MIPS developers.
Signed-off-by: NKrzysztof Kozlowski <krzk@kernel.org>
Acked-by: NPaul Cercueil <paul@crapouillou.net>
Signed-off-by: NThomas Bogendoerfer <tsbogend@alpha.franken.de>

The entry for MIPS Ingenic JZ4780 DMA driver is not up to date anymore.
Zubair Lutfullah Kakakhel's email bounces and no maintenance is
provided.
Suggested-by: NPaul Cercueil <paul@crapouillou.net>
Signed-off-by: NKrzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: NThomas Bogendoerfer <tsbogend@alpha.franken.de>

Use @kernel.org address as the main communications end point. Update the
corresponding M-entries and .mailmap (for git shortlog translation).
Signed-off-by: NHuacai Chen <chenhuacai@kernel.org>
Signed-off-by: NThomas Bogendoerfer <tsbogend@alpha.franken.de>

Convert the TI INA2xx bindings to dt-schema.
Signed-off-by: NKrzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: NRob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20201117220807.208747-1-krzk@kernel.orgSigned-off-by: NGuenter Roeck <linux@roeck-us.net>

Add support for the AES/SM4 crypto engine included in the Offload and
Crypto Subsystem (OCS) of the Intel Keem Bay SoC, thus enabling
hardware-acceleration for the following transformations:

- ecb(aes), cbc(aes), ctr(aes), cts(cbc(aes)), gcm(aes) and cbc(aes);
  supported for 128-bit and 256-bit keys.

- ecb(sm4), cbc(sm4), ctr(sm4), cts(cbc(sm4)), gcm(sm4) and cbc(sm4);
  supported for 128-bit keys.

The driver passes crypto manager self-tests, including the extra tests
(CRYPTO_MANAGER_EXTRA_TESTS=y).
Signed-off-by: NMike Healy <mikex.healy@intel.com>
Co-developed-by: NDaniele Alessandrelli <daniele.alessandrelli@intel.com>
Signed-off-by: NDaniele Alessandrelli <daniele.alessandrelli@intel.com>
Acked-by: NMark Gross <mgross@linux.intel.com>
Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>

This patch adds the da7280 bindings doc and driver to the Dialog
Semiconductor support list.
Signed-off-by: NRoy Im <roy.im.opensource@diasemi.com>
Link: https://lore.kernel.org/r/e2a01173699486519f8da85b9283c6af8481fbdb.1606320459.git.Roy.Im@diasemi.comSigned-off-by: NDmitry Torokhov <dmitry.torokhov@gmail.com>

Change Zhu's working email to his private one.

Link: https://lore.kernel.org/r/20201203190659.126932-1-leon@kernel.orgSigned-off-by: NZhu Yanjun <yanjunz@nvidia.com>
Signed-off-by: NLeon Romanovsky <leonro@nvidia.com>
Signed-off-by: NJason Gunthorpe <jgg@nvidia.com>

I would like to help in reviewing CADENCE USB3 DRD IP DRIVER patches
Signed-off-by: NAswath Govindraju <a-govindraju@ti.com>
Signed-off-by: NPeter Chen <peter.chen@nxp.com>

Align the clock branch name with other renesas-* branches pulled by
subsystem maintainers.
Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Acked-by: NStephen Boyd <sboyd@kernel.org>
Link: https://lore.kernel.org/r/20200925110713.2652-1-geert+renesas@glider.be

Add maintainers info for new Marvell Prestera Ethernet switch driver.
Signed-off-by: NMickey Rachamim <mickeyr@marvell.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

This adds driver for the ARM MHUv2 (Message Handling Unit) mailbox
controller.

This is based on the accepted DT bindings of the controller and supports
combination of both transport protocols, i.e. doorbell and data-transfer.

Transmitting and receiving data through the mailbox framework is done
through struct arm_mhuv2_mbox_msg.

Based on the initial work done by Morten Borup Petersen from ARM.
Co-developed-by: NTushar Khandelwal <tushar.khandelwal@arm.com>
Signed-off-by: NTushar Khandelwal <tushar.khandelwal@arm.com>
Tested-by: NUsama Arif <usama.arif@arm.com>
Signed-off-by: NViresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: NJassi Brar <jaswinder.singh@linaro.org>

Header adds defines for the gpio number of each pad from the driver view.

The gpio block seems to have enough registers for 128 lines but what line
is mapped to a physical pin depends on the chip. The gpio block also seems
to contain some registers that are not related to gpio but needed somewhere
to go.

Because of the above the driver itself uses the index of a pin's offset in
an array of the possible offsets for a chip as the gpio number.
Signed-off-by: NDaniel Palmer <daniel@0x0f.com>
Reviewed-by: NRob Herring <robh@kernel.org>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

Convert the Actions Semi Owl I2C DT binding to a YAML schema for
enabling DT validation.

Additionally, add a new compatible string corresponding to the I2C
controller found in the S500 variant of the Actions Semi Owl SoCs
family.
Signed-off-by: NCristian Ciocaltea <cristian.ciocaltea@gmail.com>
Reviewed-by: NRob Herring <robh@kernel.org>
Signed-off-by: NWolfram Sang <wsa@kernel.org>

I can do more than just review patches here. The plan is to pick up
patches from the list and shuttle them up to gregkh. The korg tree will
be used to hold the pending patches. Move the list away from
linux-arm-msm to just be linux-kernel as SPMI isn't msm specific
anymore.

Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: <linux-arm-msm@vger.kernel.org>
Signed-off-by: NStephen Boyd <sboyd@kernel.org>
Link: https://lore.kernel.org/r/20201207214204.1284946-1-sboyd@kernel.orgSigned-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Helps me use a single account to sign off and send patches use
appropriate email redirection without needing to update MAINTAINERS.
Signed-off-by: NKP Singh <kpsingh@kernel.org>
Signed-off-by: NAlexei Starovoitov <ast@kernel.org>
Link: https://lore.kernel.org/bpf/20201208214900.80684-1-kpsingh@kernel.org

Add initial reset controller API documentation. This is mostly intended
to describe the concepts to users of the consumer API, and to tie the
kerneldoc comments we already have into the driver API documentation.
Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: NRandy Dunlap <rdunlap@infradead.org>
Reviewed-by: NAmjad Ouled-Ameur <aouledameur@baylibre.fr>
Link: https://lore.kernel.org/r/20201201115754.1713-1-p.zabel@pengutronix.deSigned-off-by: NJonathan Corbet <corbet@lwn.net>

Add the pmbus driver for the STMicroelectronics pm6764 voltage regulator.

the output voltage use the MFR_READ_VOUT 0xD4
vout value returned is linear11
Signed-off-by: NCharles Hsu <hsu.yungteng@gmail.com>
[groeck: Fixed various compile errors; marked pm6764tr_of_match __maybe_unused]
Signed-off-by: NGuenter Roeck <linux@roeck-us.net>

Update the status to Supported to reflect the current state of affairs
and add Luiz as additional maintainer.
Signed-off-by: NMarcel Holtmann <marcel@holtmann.org>
Signed-off-by: NJohan Hedberg <johan.hedberg@intel.com>

It is expected for ARM and ARM64 SoC related code to go through
sub-architecture maintainers.  Their addresses were therefore not
documented to push patch traffic through sub-architecture maintainers.

However when patches touch generic code, e.g. multi_v7_defconfig, the
patch might not be picked up by them and instead should go to the SoC
maintainers - Arnd and Olof.

Add a minimal maintainer's entry for SoC covering only Makefile, so it
will not appear on most of submissions (except new devicetree boards).
It will though serve as a documentation and reference for cases when
submitter does not know where to send his SoC-related patches.
Signed-off-by: NKrzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20201201211516.24921-2-krzk@kernel.org'
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

The SoC Git was moved from arm/arm-soc.git to soc/soc.git.  Correct the
ARM Sub-architectures entry.
Signed-off-by: NKrzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20201201211516.24921-1-krzk@kernel.org'
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

Add new entry to MAINTAINERS.

[hverkuil: added changelog]
Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com>
Signed-off-by: NHans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: NMauro Carvalho Chehab <mchehab+huawei@kernel.org>

Two files under drivers/macintosh are actually m68k-only. I think that
patches for these files should be reviewed in the appropriate forum and
merged via the appropriate tree, rather than falling to the powerpc
maintainers to deal with. Update the "M68K ON APPLE MACINTOSH" section
accordingly.

Cc: Michael Ellerman <mpe@ellerman.id.au>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Joshua Thompson <funaho@jurai.org>
Cc: linuxppc-dev@lists.ozlabs.org
Cc: linux-m68k@lists.linux-m68k.org
Signed-off-by: NFinn Thain <fthain@telegraphics.com.au>
Acked-by: NMichael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/fbac2cd8632bb719f48cd1368910abd310548a0e.1607139987.git.fthain@telegraphics.com.auSigned-off-by: NGeert Uytterhoeven <geert@linux-m68k.org>

This adds a driver that supports the GPIO block found in
MStar/SigmaStar ARMv7 SoCs.

The controller seems to have enough register for 128 lines
but where they are wired up differs between chips and
no currently known chip uses anywhere near 128 lines so there
needs to be some per-chip data to collect together what lines
actually have physical pins attached and map the right names to them.

The core peripherals seem to use the same lines on the
currently known chips but the lines used for the sensor
interface, lcd controller etc pins seem to be totally
different between the infinity and mercury chips

The code tries to collect all of the re-usable names,
offsets etc together so that it's easy to build the extra
per-chip data for other chips in the future.

So far this only supports the MSC313 and MSC313E chips.

Support for the SSC8336N (mercury5) is trivial to add once
all of the lines have been mapped out.
Signed-off-by: NDaniel Palmer <daniel@0x0f.com>
Link: https://lore.kernel.org/r/20201129110803.2461700-4-daniel@0x0f.comSigned-off-by: NLinus Walleij <linus.walleij@linaro.org>

Add a binding description for the MStar/SigmaStar GPIO controller
found in the MSC313 and later ARMv7 SoCs.
Signed-off-by: NDaniel Palmer <daniel@0x0f.com>
Reviewed-by: NRob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20201129110803.2461700-3-daniel@0x0f.comSigned-off-by: NLinus Walleij <linus.walleij@linaro.org>

Header adds defines for the gpio number of each pad from the driver view.

The gpio block seems to have enough registers for 128 lines but what line
is mapped to a physical pin depends on the chip. The gpio block also seems
to contain some registers that are not related to gpio but needed somewhere
to go.

Because of the above the driver itself uses the index of a pin's offset in
an array of the possible offsets for a chip as the gpio number.
Signed-off-by: NDaniel Palmer <daniel@0x0f.com>
Reviewed-by: NRob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20201129110803.2461700-2-daniel@0x0f.comSigned-off-by: NLinus Walleij <linus.walleij@linaro.org>

Adjust MAINTAINERS since Emese hasn't sent email to LKML in almost
3 years.
Signed-off-by: NKees Cook <keescook@chromium.org>

The sysfs in batman-adv support was marked as deprecated by the commit
42cdd521 ("batman-adv: ABI: Mark sysfs files as deprecated") and
scheduled for removal in 2021.
Signed-off-by: NSven Eckelmann <sven@narfation.org>
Signed-off-by: NSimon Wunderlich <sw@simonwunderlich.de>

Signed-off-by: NWilliam Breathitt Gray <vilhelm.gray@gmail.com>
Acked-by: NKamel Bouhara <kamel.bouhara@bootlin.com>
Acked-by: NNicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20201121185824.451477-1-vilhelm.gray@gmail.comSigned-off-by: NJonathan Cameron <Jonathan.Cameron@huawei.com>

MIPI CCS replaces SMIA and SMIA++ as the current standard. CCS brings new
features while existing functionality will be supported. Rename the
smiapp-pll as ccs-pll accordingly.

Also add Intel copyright to the files.
Signed-off-by: NSakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: NMauro Carvalho Chehab <mchehab+huawei@kernel.org>