- 22 7月, 2021 12 次提交
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由 Louis Peens 提交于
Change the action related offload functions to take in flow_rule * as input instead of flow_cls_offload * as input. The flow_rule parts of flow_cls_offload is the only part that is used in any case, and this is required for more conntrack offload patches which will follow later. Signed-off-by: NLouis Peens <louis.peens@corigine.com> Signed-off-by: NYinjun Zhang <yinjun.zhang@corigine.com> Signed-off-by: NSimon Horman <simon.horman@corigine.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Louis Peens 提交于
This is a small cleanup to pass in flow->rule to some of the compile functions instead of extracting it every time. This is will also be useful for conntrack patches later. Signed-off-by: NLouis Peens <louis.peens@corigine.com> Signed-off-by: NYinjun Zhang <yinjun.zhang@corigine.com> Signed-off-by: NSimon Horman <simon.horman@corigine.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Yinjun Zhang 提交于
Expose and refactor the match compilation functions so that they can be invoked externally. Also update the functions so they can be called multiple times with the results OR'd together. This is applicable for the flows-merging scenario, in which there could be overlapped and non-conflicting match fields. This will be used in upcoming conntrack patches. This is safe to do in the in the single call case as well since both unmasked_data and mask_data gets initialised to 0. Signed-off-by: NYinjun Zhang <yinjun.zhang@corigine.com> Signed-off-by: NLouis Peens <louis.peens@corigine.com> Signed-off-by: NSimon Horman <simon.horman@corigine.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Oleksij Rempel 提交于
Add missing stop and let phylib framework suspend attached PHY. Fixes: e532a096 ("net: usb: asix: ax88772: add phylib support") Signed-off-by: NOleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Oleksij Rempel 提交于
asix_get_phyid() is used for two reasons here. To print debug message with the PHY ID and to wait until the PHY is powered up. After migrating to the phylib, we can read PHYID from sysfs. If polling for the PHY is really needed, then we will need to handle it in the phylib as well. This change was tested with: - ax88772a + internal PHY - ax88772b + external PHY Signed-off-by: NOleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Vladimir Oltean 提交于
Starting with commit 4f2673b3 ("net: bridge: add helper to replay port and host-joined mdb entries"), DSA has introduced some bridge helpers that replay switchdev events (FDB/MDB/VLAN additions and deletions) that can be lost by the switchdev drivers in a variety of circumstances: - an IP multicast group was host-joined on the bridge itself before any switchdev port joined the bridge, leading to the host MDB entries missing in the hardware database. - during the bridge creation process, the MAC address of the bridge was added to the FDB as an entry pointing towards the bridge device itself, but with no switchdev ports being part of the bridge yet, this local FDB entry would remain unknown to the switchdev hardware database. - a VLAN/FDB/MDB was added to a bridge port that is a LAG interface, before any switchdev port joined that LAG, leading to the hardware database missing those entries. - a switchdev port left a LAG that is a bridge port, while the LAG remained part of the bridge, and all FDB/MDB/VLAN entries remained installed in the hardware database of the switchdev port. Also, since commit 0d2cfbd4 ("net: bridge: ignore switchdev events for LAG ports which didn't request replay"), DSA introduced a method, based on a const void *ctx, to ensure that two switchdev ports under the same LAG that is a bridge port do not see the same MDB/VLAN entry being replayed twice by the bridge, once for every bridge port that joins the LAG. With so many ordering corner cases being possible, it seems unreasonable to expect a switchdev driver writer to get it right from the first try. Therefore, now that DSA has experimented with the bridge replay helpers for a little bit, we can move the code to the bridge driver where it is more readily available to all switchdev drivers. To convert the switchdev object replay helpers from "pull mode" (where the driver asks for them) to a "push mode" (where the bridge offers them automatically), the biggest problem is that the bridge needs to be aware when a switchdev port joins and leaves, even when the switchdev is only indirectly a bridge port (for example when the bridge port is a LAG upper of the switchdev). Luckily, we already have a hook for that, in the form of the newly introduced switchdev_bridge_port_offload() and switchdev_bridge_port_unoffload() calls. These offer a natural place for hooking the object addition and deletion replays. Extend the above 2 functions with: - pointers to the switchdev atomic notifier (for FDB replays) and the blocking notifier (for MDB and VLAN replays). - the "const void *ctx" argument required for drivers to be able to disambiguate between which port is targeted, when multiple ports are lowers of the same LAG that is a bridge port. Most of the drivers pass NULL to this argument, except the ones that support LAG offload and have the proper context check already in place in the switchdev blocking notifier handler. Also unexport the replay helpers, since nobody except the bridge calls them directly now. Note that: (a) we abuse the terminology slightly, because FDB entries are not "switchdev objects", but we count them as objects nonetheless. With no direct way to prove it, I think they are not modeled as switchdev objects because those can only be installed by the bridge to the hardware (as opposed to FDB entries which can be propagated in the other direction too). This is merely an abuse of terms, FDB entries are replayed too, despite not being objects. (b) the bridge does not attempt to sync port attributes to newly joined ports, just the countable stuff (the objects). The reason for this is simple: no universal and symmetric way to sync and unsync them is known. For example, VLAN filtering: what to do on unsync, disable or leave it enabled? Similarly, STP state, ageing timer, etc etc. What a switchdev port does when it becomes standalone again is not really up to the bridge's competence, and the driver should deal with it. On the other hand, replaying deletions of switchdev objects can be seen a matter of cleanup and therefore be treated by the bridge, hence this patch. We make the replay helpers opt-in for drivers, because they might not bring immediate benefits for them: - nbp_vlan_init() is called _after_ netdev_master_upper_dev_link(), so br_vlan_replay() should not do anything for the new drivers on which we call it. The existing drivers where there was even a slight possibility for there to exist a VLAN on a bridge port before they join it are already guarded against this: mlxsw and prestera deny joining LAG interfaces that are members of a bridge. - br_fdb_replay() should now notify of local FDB entries, but I patched all drivers except DSA to ignore these new entries in commit 2c4eca3e ("net: bridge: switchdev: include local flag in FDB notifications"). Driver authors can lift this restriction as they wish, and when they do, they can also opt into the FDB replay functionality. - br_mdb_replay() should fix a real issue which is described in commit 4f2673b3 ("net: bridge: add helper to replay port and host-joined mdb entries"). However most drivers do not offload the SWITCHDEV_OBJ_ID_HOST_MDB to see this issue: only cpsw and am65_cpsw offload this switchdev object, and I don't completely understand the way in which they offload this switchdev object anyway. So I'll leave it up to these drivers' respective maintainers to opt into br_mdb_replay(). So most of the drivers pass NULL notifier blocks for the replay helpers, except: - dpaa2-switch which was already acked/regression-tested with the helpers enabled (and there isn't much of a downside in having them) - ocelot which already had replay logic in "pull" mode - DSA which already had replay logic in "pull" mode An important observation is that the drivers which don't currently request bridge event replays don't even have the switchdev_bridge_port_{offload,unoffload} calls placed in proper places right now. This was done to avoid unnecessary rework for drivers which might never even add support for this. For driver writers who wish to add replay support, this can be used as a tentative placement guide: https://patchwork.kernel.org/project/netdevbpf/patch/20210720134655.892334-11-vladimir.oltean@nxp.com/ Cc: Vadym Kochan <vkochan@marvell.com> Cc: Taras Chornyi <tchornyi@marvell.com> Cc: Ioana Ciornei <ioana.ciornei@nxp.com> Cc: Lars Povlsen <lars.povlsen@microchip.com> Cc: Steen Hegelund <Steen.Hegelund@microchip.com> Cc: UNGLinuxDriver@microchip.com Cc: Claudiu Manoil <claudiu.manoil@nxp.com> Cc: Alexandre Belloni <alexandre.belloni@bootlin.com> Cc: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com> Acked-by: Ioana Ciornei <ioana.ciornei@nxp.com> # dpaa2-switch Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Vladimir Oltean 提交于
On reception of an skb, the bridge checks if it was marked as 'already forwarded in hardware' (checks if skb->offload_fwd_mark == 1), and if it is, it assigns the source hardware domain of that skb based on the hardware domain of the ingress port. Then during forwarding, it enforces that the egress port must have a different hardware domain than the ingress one (this is done in nbp_switchdev_allowed_egress). Non-switchdev drivers don't report any physical switch id (neither through devlink nor .ndo_get_port_parent_id), therefore the bridge assigns them a hardware domain of 0, and packets coming from them will always have skb->offload_fwd_mark = 0. So there aren't any restrictions. Problems appear due to the fact that DSA would like to perform software fallback for bonding and team interfaces that the physical switch cannot offload. +-- br0 ---+ / / | \ / / | \ / | | bond0 / | | / \ swp0 swp1 swp2 swp3 swp4 There, it is desirable that the presence of swp3 and swp4 under a non-offloaded LAG does not preclude us from doing hardware bridging beteen swp0, swp1 and swp2. The bandwidth of the CPU is often times high enough that software bridging between {swp0,swp1,swp2} and bond0 is not impractical. But this creates an impossible paradox given the current way in which port hardware domains are assigned. When the driver receives a packet from swp0 (say, due to flooding), it must set skb->offload_fwd_mark to something. - If we set it to 0, then the bridge will forward it towards swp1, swp2 and bond0. But the switch has already forwarded it towards swp1 and swp2 (not to bond0, remember, that isn't offloaded, so as far as the switch is concerned, ports swp3 and swp4 are not looking up the FDB, and the entire bond0 is a destination that is strictly behind the CPU). But we don't want duplicated traffic towards swp1 and swp2, so it's not ok to set skb->offload_fwd_mark = 0. - If we set it to 1, then the bridge will not forward the skb towards the ports with the same switchdev mark, i.e. not to swp1, swp2 and bond0. Towards swp1 and swp2 that's ok, but towards bond0? It should have forwarded the skb there. So the real issue is that bond0 will be assigned the same hardware domain as {swp0,swp1,swp2}, because the function that assigns hardware domains to bridge ports, nbp_switchdev_add(), recurses through bond0's lower interfaces until it finds something that implements devlink (calls dev_get_port_parent_id with bool recurse = true). This is a problem because the fact that bond0 can be offloaded by swp3 and swp4 in our example is merely an assumption. A solution is to give the bridge explicit hints as to what hardware domain it should use for each port. Currently, the bridging offload is very 'silent': a driver registers a netdevice notifier, which is put on the netns's notifier chain, and which sniffs around for NETDEV_CHANGEUPPER events where the upper is a bridge, and the lower is an interface it knows about (one registered by this driver, normally). Then, from within that notifier, it does a bunch of stuff behind the bridge's back, without the bridge necessarily knowing that there's somebody offloading that port. It looks like this: ip link set swp0 master br0 | v br_add_if() calls netdev_master_upper_dev_link() | v call_netdevice_notifiers | v dsa_slave_netdevice_event | v oh, hey! it's for me! | v .port_bridge_join What we do to solve the conundrum is to be less silent, and change the switchdev drivers to present themselves to the bridge. Something like this: ip link set swp0 master br0 | v br_add_if() calls netdev_master_upper_dev_link() | v bridge: Aye! I'll use this call_netdevice_notifiers ^ ppid as the | | hardware domain for v | this port, and zero dsa_slave_netdevice_event | if I got nothing. | | v | oh, hey! it's for me! | | | v | .port_bridge_join | | | +------------------------+ switchdev_bridge_port_offload(swp0, swp0) Then stacked interfaces (like bond0 on top of swp3/swp4) would be treated differently in DSA, depending on whether we can or cannot offload them. The offload case: ip link set bond0 master br0 | v br_add_if() calls netdev_master_upper_dev_link() | v bridge: Aye! I'll use this call_netdevice_notifiers ^ ppid as the | | switchdev mark for v | bond0. dsa_slave_netdevice_event | Coincidentally (or not), | | bond0 and swp0, swp1, swp2 v | all have the same switchdev hmm, it's not quite for me, | mark now, since the ASIC but my driver has already | is able to forward towards called .port_lag_join | all these ports in hw. for it, because I have | a port with dp->lag_dev == bond0. | | | v | .port_bridge_join | for swp3 and swp4 | | | +------------------------+ switchdev_bridge_port_offload(bond0, swp3) switchdev_bridge_port_offload(bond0, swp4) And the non-offload case: ip link set bond0 master br0 | v br_add_if() calls netdev_master_upper_dev_link() | v bridge waiting: call_netdevice_notifiers ^ huh, switchdev_bridge_port_offload | | wasn't called, okay, I'll use a v | hwdom of zero for this one. dsa_slave_netdevice_event : Then packets received on swp0 will | : not be software-forwarded towards v : swp1, but they will towards bond0. it's not for me, but bond0 is an upper of swp3 and swp4, but their dp->lag_dev is NULL because they couldn't offload it. Basically we can draw the conclusion that the lowers of a bridge port can come and go, so depending on the configuration of lowers for a bridge port, it can dynamically toggle between offloaded and unoffloaded. Therefore, we need an equivalent switchdev_bridge_port_unoffload too. This patch changes the way any switchdev driver interacts with the bridge. From now on, everybody needs to call switchdev_bridge_port_offload and switchdev_bridge_port_unoffload, otherwise the bridge will treat the port as non-offloaded and allow software flooding to other ports from the same ASIC. Note that these functions lay the ground for a more complex handshake between switchdev drivers and the bridge in the future. For drivers that will request a replay of the switchdev objects when they offload and unoffload a bridge port (DSA, dpaa2-switch, ocelot), we place the call to switchdev_bridge_port_unoffload() strategically inside the NETDEV_PRECHANGEUPPER notifier's code path, and not inside NETDEV_CHANGEUPPER. This is because the switchdev object replay helpers need the netdev adjacency lists to be valid, and that is only true in NETDEV_PRECHANGEUPPER. Cc: Vadym Kochan <vkochan@marvell.com> Cc: Taras Chornyi <tchornyi@marvell.com> Cc: Ioana Ciornei <ioana.ciornei@nxp.com> Cc: Lars Povlsen <lars.povlsen@microchip.com> Cc: Steen Hegelund <Steen.Hegelund@microchip.com> Cc: UNGLinuxDriver@microchip.com Cc: Claudiu Manoil <claudiu.manoil@nxp.com> Cc: Alexandre Belloni <alexandre.belloni@bootlin.com> Cc: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com> Tested-by: Ioana Ciornei <ioana.ciornei@nxp.com> # dpaa2-switch: regression Acked-by: Ioana Ciornei <ioana.ciornei@nxp.com> # dpaa2-switch Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com> # ocelot-switch Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Vladimir Oltean 提交于
Make more room for some extra code in the NETDEV_PRECHANGEUPPER handler by moving what already exists into a dedicated function. Cc: Ioana Ciornei <ioana.ciornei@nxp.com> Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com> Acked-by: NIoana Ciornei <ioana.ciornei@nxp.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Vladimir Oltean 提交于
We need to propagate the extack argument for dpaa2_switch_port_bridge_join to use it in a future patch, and it looks like there is already an error message there which is currently printed to the console. Move it over netlink so it is properly transmitted to user space. Cc: Ioana Ciornei <ioana.ciornei@nxp.com> Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com> Tested-by: NIoana Ciornei <ioana.ciornei@nxp.com> Acked-by: NIoana Ciornei <ioana.ciornei@nxp.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Leon Romanovsky 提交于
The failure to register devlink will leave the system with dangled devlink resource, which is not cleaned if devlink_port_register() fails. In order to remove access to ".registered" field of struct devlink_port, require both devlink_register and devlink_port_register to success and check it through device pointer. Fixes: fbfb8031 ("ionic: Add hardware init and device commands") Reviewed-by: NMoshe Shemesh <moshe@nvidia.com> Signed-off-by: NLeon Romanovsky <leonro@nvidia.com> Acked-by: NShannon Nelson <snelson@pensando.io> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Leon Romanovsky 提交于
The driver core will call to .remove callback only if .probe succeeded and it will ensure that driver data has pointer to struct ionic. There is no need to check it again. Fixes: fbfb8031 ("ionic: Add hardware init and device commands") Signed-off-by: NLeon Romanovsky <leonro@nvidia.com> Acked-by: NShannon Nelson <snelson@pensando.io> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Andy Shevchenko 提交于
Eliminate some boilerplate code by using module_pci_driver() instead of init/exit, moving the salient bits from init into probe. Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: NLoic Poulain <loic.poulain@linaro.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 21 7月, 2021 17 次提交
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由 Dongliang Mu 提交于
There are two invocation sites of hso_free_net_device. After refactoring hso_create_net_device, this parameter is useless. Remove the bailout in the hso_free_net_device and change the invocation sites of this function. Signed-off-by: NDongliang Mu <mudongliangabcd@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Dongliang Mu 提交于
The current error handling code of hso_create_net_device is hso_free_net_device, no matter which errors lead to. For example, WARNING in hso_free_net_device [1]. Fix this by refactoring the error handling code of hso_create_net_device by handling different errors by different code. [1] https://syzkaller.appspot.com/bug?id=66eff8d49af1b28370ad342787413e35bbe76efe Reported-by: syzbot+44d53c7255bb1aea22d2@syzkaller.appspotmail.com Fixes: 5fcfb6d0 ("hso: fix bailout in error case of probe") Signed-off-by: NDongliang Mu <mudongliangabcd@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Piotr Kwapulinski 提交于
Add support for external synchronization clock via GPIOs. 1PPS signals are handled via the dedicated 3 GPIOs: SDP3_2, SDP3_3 and GPIO_4. Previously it was not possible to use the external PTP synchronization clock. All possible HW configurations are supported. SDP3_2, SDP3_3, GPIO_4 off, off, off off, in_A, off off, out_A, off off, in_B, off off, out_B, off in_A, off, off in_A, in_B, off in_A, out_B, off out_A, off, off out_A, in_B, off in_B, off, off in_B, in_A, off in_B, out_A, off out_B, off, off out_B, in_A, off off, off, in_A off, out_A, in_A off, in_B, in_A off, out_B, in_A out_A, off, in_A out_A, in_B, in_A in_B, off, in_A in_B, out_A, in_A out_B, off, in_A off, off, out_A off, in_A, out_A off, in_B, out_A off, out_B, out_A in_A, off, out_A in_A, in_B, out_A in_A, out_B, out_A in_B, off, out_A in_B, in_A, out_A out_B, off, out_A out_B, in_A, out_A off, off, in_B off, in_A, in_B off, out_A, in_B off, out_B, in_B in_A, off, in_B in_A, out_B, in_B out_A, off, in_B out_B, off, in_B out_B, in_A, in_B off, off, out_B off, in_A, out_B off, out_A, out_B off, in_B, out_B in_A, off, out_B in_A, in_B, out_B out_A, off, out_B out_A, in_B, out_B in_B, off, out_B in_B, in_A, out_B in_B, out_A, out_B Tested with oscilloscope, 1PPS generator and ts2phc. Reviewed-by: NAleksandr Loktionov <aleksandr.loktionov@intel.com> Reviewed-by: NArkadiusz Kubalewski <arkadiusz.kubalewski@intel.com> Signed-off-by: NPiotr Kwapulinski <piotr.kwapulinski@intel.com> Tested-by: NAshish K <ashishx.k@intel.com> Signed-off-by: NTony Nguyen <anthony.l.nguyen@intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Vladimir Oltean 提交于
The blamed commit was probably not tested on net-next, since it did not refactor the extra phy id check introduced in commit b856150c ("net: phy: at803x: mask 1000 Base-X link mode"). Fixes: 8887ca54 ("net: phy: at803x: simplify custom phy id matching") Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com> Acked-by: NRussell King (Oracle) <rmk+kernel@armlinux.org.uk> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Russell King (Oracle) 提交于
We only need to fiddle about with the supported mask after we have validated the user's requested parameters. Simplify and streamline the code by moving the linkmode copy and update of the autoneg bit after validating the user's request. Signed-off-by: NRussell King (Oracle) <rmk+kernel@armlinux.org.uk> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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As the cycle time is set to maximum of 1s, the TX Hang timeout need to be increase to avoid possible TX Hang. There is no dedicated number specific in data sheet for the timeout factor. Timeout factor was determined during the debugging to solve the "Tx Hang" issues that happen in some cases mainly during ETF(Earliest TxTime First). This can be test by using TSN Schedule Tx Tools udp_tai sample application. Signed-off-by: NMuhammad Husaini Zulkifli <muhammad.husaini.zulkifli@intel.com> Acked-by: NSasha Neftin <sasha.neftin@intel.com> Tested-by: NDvora Fuxbrumer <dvorax.fuxbrumer@linux.intel.com> Signed-off-by: NTony Nguyen <anthony.l.nguyen@intel.com>
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According to datasheet section 8.12.19, when there's no TSN offloading Shadow_QbvCycle bit[29:0] must be set to zero for basic scheduling. Signed-off-by: NMuhammad Husaini Zulkifli <muhammad.husaini.zulkifli@intel.com> Tested-by: NDvora Fuxbrumer <dvorax.fuxbrumer@linux.intel.com> Signed-off-by: NTony Nguyen <anthony.l.nguyen@intel.com>
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由 Sasha Neftin 提交于
i225 devices have only one phy->type: copper. There is no point checking phy->type during the igc_has_link method from the watchdog that invoked every 2 seconds. This patch comes to clean up these pointless checkings. Signed-off-by: NSasha Neftin <sasha.neftin@intel.com> Tested-by: NDvora Fuxbrumer <dvorax.fuxbrumer@linux.intel.com> Signed-off-by: NTony Nguyen <anthony.l.nguyen@intel.com>
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由 Sasha Neftin 提交于
i225 devices have only one PHY vendor. There is no point checking _I_PHY_ID during the link establishment and auto-negotiation process. This patch comes to clean up these pointless checkings. Signed-off-by: NSasha Neftin <sasha.neftin@intel.com> Tested-by: NDvora Fuxbrumer <dvorax.fuxbrumer@linux.intel.com> Signed-off-by: NTony Nguyen <anthony.l.nguyen@intel.com>
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由 Sasha Neftin 提交于
Ensure that the adapter->q_vector[MAX_Q_VECTORS] array isn't accessed beyond its size. It was fixed by using a local variable num_q_vectors as a limit for loop index, and ensure that num_q_vectors is not bigger than MAX_Q_VECTORS. Suggested-by: NAleksandr Loktionov <aleksandr.loktionov@intel.com> Signed-off-by: NSasha Neftin <sasha.neftin@intel.com> Tested-by: NDvora Fuxbrumer <dvorax.fuxbrumer@linux.intel.com> Signed-off-by: NTony Nguyen <anthony.l.nguyen@intel.com>
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由 Tree Davies 提交于
There is a spelling mistake in the comment block. Signed-off-by: NTree Davies <tdavies@darkphysics.net> Signed-off-by: NTony Nguyen <anthony.l.nguyen@intel.com>
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由 Sasha Neftin 提交于
Minor fixes to allow debug prints more readable. Signed-off-by: NSasha Neftin <sasha.neftin@intel.com> Tested-by: NDvora Fuxbrumer <dvorax.fuxbrumer@linux.intel.com> Signed-off-by: NTony Nguyen <anthony.l.nguyen@intel.com>
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由 Sasha Neftin 提交于
Add devices IDs for the next LOM generations that will be available on the next Intel Client platforms This patch provides the initial support for these devices Signed-off-by: NSasha Neftin <sasha.neftin@intel.com> Tested-by: NDvora Fuxbrumer <dvorax.fuxbrumer@linux.intel.com> Signed-off-by: NTony Nguyen <anthony.l.nguyen@intel.com>
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由 Sasha Neftin 提交于
Add devices IDs for the next LOM generations that will be available on the next Intel Client platform (Lunar Lake) This patch provides the initial support for these devices Signed-off-by: NSasha Neftin <sasha.neftin@intel.com> Tested-by: NDvora Fuxbrumer <dvorax.fuxbrumer@linux.intel.com> Signed-off-by: NTony Nguyen <anthony.l.nguyen@intel.com>
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由 Sasha Neftin 提交于
After transferring the MAC-PHY interface to the SMBus set the PHY to S0ix low power idle mode. Suggested-by: NDima Ruinskiy <dima.ruinskiy@intel.com> Signed-off-by: NSasha Neftin <sasha.neftin@intel.com> Tested-by: NDvora Fuxbrumer <dvorax.fuxbrumer@linux.intel.com> Signed-off-by: NTony Nguyen <anthony.l.nguyen@intel.com>
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由 Sasha Neftin 提交于
Per guidance from the CSME architecture team, it may take up to 1 second for unconfiguring dynamic power gating mode. Practically it can take more time. Wait up to 2.5 seconds to indicate dynamic power gating exit from the S0ix configuration. Detect scenarios that take more than 1 second but less than 2.5 seconds will emit warning message. Signed-off-by: NSasha Neftin <sasha.neftin@intel.com> Tested-by: NDvora Fuxbrumer <dvorax.fuxbrumer@linux.intel.com> Signed-off-by: NTony Nguyen <anthony.l.nguyen@intel.com>
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由 Sasha Neftin 提交于
On the corporate system, the driver will ask from the CSME (manageability engine) to perform device settings are required to allow S0ix residency. This patch provides initial support. Reviewed-by: NDima Ruinskiy <dima.ruinskiy@intel.com> Signed-off-by: NSasha Neftin <sasha.neftin@intel.com> Tested-by: NDvora Fuxbrumer <dvorax.fuxbrumer@linux.intel.com> Signed-off-by: NTony Nguyen <anthony.l.nguyen@intel.com>
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- 20 7月, 2021 11 次提交
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由 Russell King 提交于
The at803x driver contains a function, at803x_match_phy_id(), which tests whether the PHY ID matches the value passed, comparing phy_id with phydev->phy_id and testing all bits that in the driver's mask. This is the same test that is used to match the driver, with phy_id replaced with the driver specified ID, phydev->drv->phy_id. Hence, we already know the value of the bits being tested if we look at phydev->drv->phy_id directly, and we do not require a complicated test to check them. Test directly against phydev->drv->phy_id instead. Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk> Reviewed-by: NFabio Estevam <festevam@gmail.com> Reviewed-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Colin Ian King 提交于
The character sequence ??! is a trigraph and causes the following clang warning: drivers/net/ethernet/marvell/mvneta.c:2604:39: warning: trigraph ignored [-Wtrigraphs] Clean this by replacing it with single ?. Signed-off-by: NColin Ian King <colin.king@canonical.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Martin Schiller 提交于
This adds the possibility to configure the RGMII RX/TX clock skew via devicetree. Simply set phy mode to "rgmii-id", "rgmii-rxid" or "rgmii-txid" and add the "rx-internal-delay-ps" or "tx-internal-delay-ps" property to the devicetree. Furthermore, a warning is now issued if the phy mode is configured to "rgmii" and an internal delay is set in the phy (e.g. by pin-strapping), as in the dp83867 driver. Signed-off-by: NMartin Schiller <ms@dev.tdt.de> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Russell King (Oracle) 提交于
Augment the phy link debug prints with the pause state. Signed-off-by: NRussell King (Oracle) <rmk+kernel@armlinux.org.uk> Reviewed-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Russell King (Oracle) 提交于
The documentation for Armada 8040 says: Bit 2 Field InBandAnEn In-band Auto-Negotiation enable. ... When <PortType> = 1 (1000BASE-X) this field must be set to 1. We presently ignore whether userspace requests autonegotiation or not through the ethtool ksettings interface. However, we have some network interfaces that wish to do this. To offer a consistent API across network interfaces, deny the ability to disable autonegotiation on mvpp2 hardware when in 1000BASE-X and 2500BASE-X. This means the only way to switch between 2500BASE-X and 1000BASE-X on SFPs that support this will be: # ethtool -s ethX advertise 0x20000006000 # 1000BASE-X Pause AsymPause # ethtool -s ethX advertise 0xe000 # 2500BASE-X Pause AsymPause Signed-off-by: NRussell King (Oracle) <rmk+kernel@armlinux.org.uk> Acked-by: NMarek Behún <kabel@kernel.org> Acked-by: NMarcin Wojtas <mw@semihalf.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Russell King (Oracle) 提交于
The documentation for Armada 38x says: Bit 2 Field InBandAnEn In-band Auto-Negotiation enable. ... When <PortType> = 1 (1000BASE-X) this field must be set to 1. We presently ignore whether userspace requests autonegotiation or not through the ethtool ksettings interface. However, we have some network interfaces that wish to do this. To offer a consistent API across network interfaces, deny the ability to disable autonegotiation on mvneta hardware when in 1000BASE-X and 2500BASE-X. This means the only way to switch between 2500BASE-X and 1000BASE-X on SFPs that support this will be: # ethtool -s ethX advertise 0x20000002000 # 1000BASE-X Pause # ethtool -s ethX advertise 0xa000 # 2500BASE-X Pause Signed-off-by: NRussell King (Oracle) <rmk+kernel@armlinux.org.uk> Acked-by: NMarek Behún <kabel@kernel.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Alex Elder 提交于
Currently three interconnects are defined for the Qualcomm SC7280 SoC, but this was based on a misunderstanding. There should only be two interconnects defined: one between the IPA and system memory; and another between the AP and IPA config space. The bandwidths defined for the memory and config interconnects do not match what I understand to be proper values, so update these. Signed-off-by: NAlex Elder <elder@linaro.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Xu Liang 提交于
Add driver to support the Maxlinear GPY115, GPY211, GPY212, GPY215, GPY241, GPY245 PHYs. Separate from XWAY PHY driver because this series has different register layout and new features not supported in XWAY PHY. Signed-off-by: NXu Liang <lxu@maxlinear.com> Acked-by: NHauke Mehrtens <hmehrtens@maxlinear.com> Tested-by: NWong Vee Khee <vee.khee.wong@linux.intel.com> Tested-by: NWong Vee Khee <vee.khee.wong@linux.intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Xu Liang 提交于
Add API to read 802.3-c45 IDs so that C22/C45 mixed device can use C45 APIs without failing ID checks. Signed-off-by: NXu Liang <lxu@maxlinear.com> Acked-by: NHauke Mehrtens <hmehrtens@maxlinear.com> Reviewed-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Vladimir Oltean 提交于
The big problem which mandates cross-chip notifiers for tag_8021q is this: | sw0p0 sw0p1 sw0p2 sw0p3 sw0p4 [ user ] [ user ] [ user ] [ dsa ] [ cpu ] | +---------+ | sw1p0 sw1p1 sw1p2 sw1p3 sw1p4 [ user ] [ user ] [ user ] [ dsa ] [ dsa ] | +---------+ | sw2p0 sw2p1 sw2p2 sw2p3 sw2p4 [ user ] [ user ] [ user ] [ dsa ] [ dsa ] When the user runs: ip link add br0 type bridge ip link set sw0p0 master br0 ip link set sw2p0 master br0 It doesn't work. This is because dsa_8021q_crosschip_bridge_join() assumes that "ds" and "other_ds" are at most 1 hop away from each other, so it is sufficient to add the RX VLAN of {ds, port} into {other_ds, other_port} and vice versa and presto, the cross-chip link works. When there is another switch in the middle, such as in this case switch 1 with its DSA links sw1p3 and sw1p4, somebody needs to tell it about these VLANs too. Which is exactly why the problem is quadratic: when a port joins a bridge, for each port in the tree that's already in that same bridge we notify a tag_8021q VLAN addition of that port's RX VLAN to the entire tree. It is a very complicated web of VLANs. It must be mentioned that currently we install tag_8021q VLANs on too many ports (DSA links - to be precise, on all of them). For example, when sw2p0 joins br0, and assuming sw1p0 was part of br0 too, we add the RX VLAN of sw2p0 on the DSA links of switch 0 too, even though there isn't any port of switch 0 that is a member of br0 (at least yet). In theory we could notify only the switches which sit in between the port joining the bridge and the port reacting to that bridge_join event. But in practice that is impossible, because of the way 'link' properties are described in the device tree. The DSA bindings require DT writers to list out not only the real/physical DSA links, but in fact the entire routing table, like for example switch 0 above will have: sw0p3: port@3 { link = <&sw1p4 &sw2p4>; }; This was done because: /* TODO: ideally DSA ports would have a single dp->link_dp member, * and no dst->rtable nor this struct dsa_link would be needed, * but this would require some more complex tree walking, * so keep it stupid at the moment and list them all. */ but it is a perfect example of a situation where too much information is actively detrimential, because we are now in the position where we cannot distinguish a real DSA link from one that is put there to avoid the 'complex tree walking'. And because DT is ABI, there is not much we can change. And because we do not know which DSA links are real and which ones aren't, we can't really know if DSA switch A is in the data path between switches B and C, in the general case. So this is why tag_8021q RX VLANs are added on all DSA links, and probably why it will never change. On the other hand, at least the number of additions/deletions is well balanced, and this means that once we implement reference counting at the cross-chip notifier level a la fdb/mdb, there is absolutely zero need for a struct dsa_8021q_crosschip_link, it's all self-managing. In fact, with the tag_8021q notifiers emitted from the bridge join notifiers, it becomes so generic that sja1105 does not need to do anything anymore, we can just delete its implementation of the .crosschip_bridge_{join,leave} methods. Among other things we can simply delete is the home-grown implementation of sja1105_notify_crosschip_switches(). The reason why that is wrong is because it is not quadratic - it only covers remote switches to which we have a cross-chip bridging link and that does not cover in-between switches. This deletion is part of the same patch because sja1105 used to poke deep inside the guts of the tag_8021q context in order to do that. Because the cross-chip links went away, so needs the sja1105 code. Last but not least, dsa_8021q_setup_port() is simplified (and also renamed). Because our TAG_8021Q_VLAN_ADD notifier is designed to react on the CPU port too, the four dsa_8021q_vid_apply() calls: - 1 for RX VLAN on user port - 1 for the user port's RX VLAN on the CPU port - 1 for TX VLAN on user port - 1 for the user port's TX VLAN on the CPU port now get squashed into only 2 notifier calls via dsa_port_tag_8021q_vlan_add. And because the notifiers to add and to delete a tag_8021q VLAN are distinct, now we finally break up the port setup and teardown into separate functions instead of relying on a "bool enabled" flag which tells us what to do. Arguably it should have been this way from the get go. Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Vladimir Oltean 提交于
Right now, setting up tag_8021q is a 2-step operation for a driver, first the context structure needs to be created, then the VLANs need to be installed on the ports. A similar thing is true for teardown. Merge the 2 steps into the register/unregister methods, to be as transparent as possible for the driver as to what tag_8021q does behind the scenes. This also gets rid of the funny "bool setup == true means setup, == false means teardown" API that tag_8021q used to expose. Note that dsa_tag_8021q_register() must be called at least in the .setup() driver method and never earlier (like in the driver probe function). This is because the DSA switch tree is not initialized at probe time, and the cross-chip notifiers will not work. For symmetry with .setup(), the unregister method should be put in .teardown(). Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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