1. 14 12月, 2015 1 次提交
  2. 15 10月, 2015 5 次提交
  3. 06 10月, 2015 2 次提交
  4. 04 10月, 2015 2 次提交
  5. 23 9月, 2015 1 次提交
    • R
      iommu/io-pgtable-arm: Don't use dma_to_phys() · ffcb6d16
      Robin Murphy 提交于
      In checking whether DMA addresses differ from physical addresses, using
      dma_to_phys() is actually the wrong thing to do, since it may hide any
      DMA offset, which is precisely one of the things we are checking for.
      Simply casting between the two address types, whilst ugly, is in fact
      the appropriate course of action. Further care (and ugliness) is also
      necessary in the comparison to avoid truncation if phys_addr_t and
      dma_addr_t differ in size.
      
      We can also reject any device with a fixed DMA offset up-front at page
      table creation, leaving the allocation-time check for the more subtle
      cases like bounce buffering due to an incorrect DMA mask.
      
      Furthermore, we can then fix the hackish KConfig dependency so that
      architectures without a dma_to_phys() implementation may still
      COMPILE_TEST (or even use!) the code. The true dependency is on the
      DMA API, so use the appropriate symbol for that.
      Signed-off-by: NRobin Murphy <robin.murphy@arm.com>
      [will: folded in selftest fix from Yong Wu]
      Signed-off-by: NWill Deacon <will.deacon@arm.com>
      ffcb6d16
  6. 13 8月, 2015 1 次提交
  7. 06 8月, 2015 1 次提交
    • R
      iommu/io-pgtable-arm: Allow appropriate DMA API use · f8d54961
      Robin Murphy 提交于
      Currently, users of the LPAE page table code are (ab)using dma_map_page()
      as a means to flush page table updates for non-coherent IOMMUs. Since
      from the CPU's point of view, creating IOMMU page tables *is* passing
      DMA buffers to a device (the IOMMU's page table walker), there's little
      reason not to use the DMA API correctly.
      
      Allow IOMMU drivers to opt into DMA API operations for page table
      allocation and updates by providing their appropriate device pointer.
      The expectation is that an LPAE IOMMU should have a full view of system
      memory, so use streaming mappings to avoid unnecessary pressure on
      ZONE_DMA, and treat any DMA translation as a warning sign.
      Signed-off-by: NRobin Murphy <robin.murphy@arm.com>
      Signed-off-by: NWill Deacon <will.deacon@arm.com>
      f8d54961
  8. 28 7月, 2015 1 次提交
  9. 02 6月, 2015 1 次提交
    • G
      break kconfig dependency loop · 06b718c0
      Gerd Hoffmann 提交于
      After adding virtio-gpu I get this funky kconfig dependency loop.
      
      scripts/kconfig/conf --oldconfig Kconfig
      drivers/video/fbdev/Kconfig:5:error: recursive dependency detected!
      drivers/video/fbdev/Kconfig:5:  symbol FB is selected by DRM_KMS_FB_HELPER
      drivers/gpu/drm/Kconfig:34:     symbol DRM_KMS_FB_HELPER is selected by DRM_VIRTIO_GPU
      drivers/gpu/drm/virtio/Kconfig:1:       symbol DRM_VIRTIO_GPU depends on VIRTIO
      drivers/virtio/Kconfig:1:       symbol VIRTIO is selected by REMOTEPROC
      drivers/remoteproc/Kconfig:4:   symbol REMOTEPROC is selected by OMAP_REMOTEPROC
      drivers/remoteproc/Kconfig:12:  symbol OMAP_REMOTEPROC depends on OMAP_IOMMU
      drivers/iommu/Kconfig:141:      symbol OMAP_IOMMU is selected by VIDEO_OMAP3
      drivers/media/platform/Kconfig:96:      symbol VIDEO_OMAP3 depends on VIDEO_V4L2
      drivers/media/v4l2-core/Kconfig:6:      symbol VIDEO_V4L2 depends on I2C
      drivers/i2c/Kconfig:7:  symbol I2C is selected by FB_DDC
      drivers/video/fbdev/Kconfig:59: symbol FB_DDC is selected by FB_CYBER2000_DDC
      drivers/video/fbdev/Kconfig:374:        symbol FB_CYBER2000_DDC depends on FB_CYBER2000
      drivers/video/fbdev/Kconfig:362:        symbol FB_CYBER2000 depends on FB
      
      Making VIDEO_OMAP3 depend on OMAP_IOMMU instead of selecting it breaks the
      loop, which looks like the best way to handle it to me.  Updated OMAP_IOMMU
      help text accordingly.
      Signed-off-by: NGerd Hoffmann <kraxel@redhat.com>
      Acked-by: NMauro Carvalho Chehab <mchehab@osg.samsung.com>
      06b718c0
  10. 29 5月, 2015 1 次提交
    • W
      iommu/arm-smmu: Add initial driver support for ARM SMMUv3 devices · 48ec83bc
      Will Deacon 提交于
      Version three of the ARM SMMU architecture introduces significant
      changes and improvements over previous versions of the specification,
      necessitating a new driver in the Linux kernel.
      
      The main change to the programming interface is that the majority of the
      configuration data has been moved from MMIO registers to in-memory data
      structures, with communication between the CPU and the SMMU being
      mediated via in-memory circular queues.
      
      This patch adds an initial driver for SMMUv3 to Linux. We currently
      support pinned stage-1 (DMA) and stage-2 (KVM VFIO) mappings using the
      generic IO-pgtable code.
      
      Cc: Robin Murphy <robin.murphy@arm.com>
      Signed-off-by: NWill Deacon <will.deacon@arm.com>
      Signed-off-by: NJoerg Roedel <jroedel@suse.de>
      48ec83bc
  11. 04 5月, 2015 1 次提交
  12. 03 3月, 2015 1 次提交
  13. 25 2月, 2015 1 次提交
    • T
      iommu/msm: Mark driver BROKEN · a3f447a4
      Thierry Reding 提交于
      The MSM IOMMU driver unconditionally calls bus_set_iommu(), which is a
      very stupid thing to do on multi-platform kernels. While marking the
      driver BROKEN may seem a little extreme, there is no other way to make
      the driver skip initialization. One of the problems is that it doesn't
      have devicetree binding documentation and the driver doesn't contain a
      struct of_device_id table either, so no way to check that it is indeed
      valid to set up the IOMMU operations for this driver.
      
      This fixes a problem on Tegra20 where the DRM driver will try to use the
      obviously non-existent MSM IOMMU.
      
      Marking the driver BROKEN shouldn't do any harm, since there aren't any
      users currently. There is no struct of_device_id table, so the device
      can't be instantiated from device tree, and I couldn't find any code
      that would instantiate a matching platform_device either, so the driver
      is effectively unused.
      Reported-by: NNicolas Chauvet <kwizart@gmail.com>
      Cc: David Brown <davidb@codeaurora.org>
      Cc: Daniel Walker <dwalker@fifo99.com>
      Cc: Bryan Huntsman <bryanh@codeaurora.org>
      Cc: Olav Haugan <ohaugan@codeaurora.org>
      Acked-by: NRob Clark <robdclark@gmail.com>
      Signed-off-by: NThierry Reding <treding@nvidia.com>
      Signed-off-by: NJoerg Roedel <jroedel@suse.de>
      a3f447a4
  14. 30 1月, 2015 2 次提交
    • J
      iommu: Make more drivers depend on COMPILE_TEST · 477ab7a1
      Joerg Roedel 提交于
      For easier compile testing of these iommu drivers.
      Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com>
      Signed-off-by: NJoerg Roedel <jroedel@suse.de>
      477ab7a1
    • A
      iommu: Disable on !MMU builds · e5144c93
      Arnd Bergmann 提交于
      A lot of the IOMMU support code does not build if the CPU does
      not have an MMU itself, and it's not clear if there is any
      use case for it, so let's just disable it and wait for anybody
      to need it.
      
      This avoids randconfig errors like
      
      ../arch/arm/mm/dma-mapping.c: In function '__iommu_alloc_remap':
      ../arch/arm/mm/dma-mapping.c:1278:34: error: 'VM_ARM_DMA_CONSISTENT' undeclared (first use in this function)
        area = get_vm_area_caller(size, VM_ARM_DMA_CONSISTENT | VM_USERMAP,
                                        ^
      ../arch/arm/mm/dma-mapping.c:1278:34: note: each undeclared identifier is reported only once for each function it appears in
      ../arch/arm/mm/dma-mapping.c: In function '__atomic_get_pages':
      ../arch/arm/mm/dma-mapping.c:1358:27: error: 'atomic_pool' undeclared (first use in this function)
        struct dma_pool *pool = &atomic_pool;
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      Signed-off-by: NJoerg Roedel <jroedel@suse.de>
      e5144c93
  15. 26 1月, 2015 1 次提交
  16. 19 1月, 2015 5 次提交
  17. 17 12月, 2014 1 次提交
    • M
      iommu/exynos: Fix arm64 allmodconfig build · 20911ce6
      Mark Brown 提交于
      The Exynos IOMMU driver uses the ARM specific dmac_flush_range() and
      outer_flush_range() functions. This breaks the build on arm64 allmodconfig
      in -next since support has been merged for some Exynos ARMv8 SoCs. Add a
      dependency on ARM to keep things building until either the driver has the
      ARM dependencies removed or the ARMv8 architecture code implements these
      ARM specific APIs.
      Signed-off-by: NMark Brown <broonie@kernel.org>
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      20911ce6
  18. 04 12月, 2014 1 次提交
    • T
      memory: Add NVIDIA Tegra memory controller support · 89184651
      Thierry Reding 提交于
      The memory controller on NVIDIA Tegra exposes various knobs that can be
      used to tune the behaviour of the clients attached to it.
      
      Currently this driver sets up the latency allowance registers to the HW
      defaults. Eventually an API should be exported by this driver (via a
      custom API or a generic subsystem) to allow clients to register latency
      requirements.
      
      This driver also registers an IOMMU (SMMU) that's implemented by the
      memory controller. It is supported on Tegra30, Tegra114 and Tegra124
      currently. Tegra20 has a GART instead.
      
      The Tegra SMMU operates on memory clients and SWGROUPs. A memory client
      is a unidirectional, special-purpose DMA master. A SWGROUP represents a
      set of memory clients that form a logical functional unit corresponding
      to a single device. Typically a device has two clients: one client for
      read transactions and one client for write transactions, but there are
      also devices that have only read clients, but many of them (such as the
      display controllers).
      
      Because there is no 1:1 relationship between memory clients and devices
      the driver keeps a table of memory clients and the SWGROUPs that they
      belong to per SoC. Note that this is an exception and due to the fact
      that the SMMU is tightly integrated with the rest of the Tegra SoC. The
      use of these tables is discouraged in drivers for generic IOMMU devices
      such as the ARM SMMU because the same IOMMU could be used in any number
      of SoCs and keeping such tables for each SoC would not scale.
      Acked-by: NJoerg Roedel <jroedel@suse.de>
      Signed-off-by: NThierry Reding <treding@nvidia.com>
      89184651
  19. 02 12月, 2014 1 次提交
  20. 05 11月, 2014 1 次提交
  21. 04 11月, 2014 1 次提交
    • D
      iommu/rockchip: rk3288 iommu driver · c68a2921
      Daniel Kurtz 提交于
      The rk3288 has several iommus.  Each iommu belongs to a single master
      device.  There is one device (ISP) that has two slave iommus, but that
      case is not yet supported by this driver.
      
      At subsys init, the iommu driver registers itself as the iommu driver for
      the platform bus.  The master devices find their slave iommus using the
      "iommus" field in their devicetree description.  Since each slave iommu
      belongs to exactly one master, their is no additional data needed at probe
      to associate a slave with its master.
      
      An iommu device's power domain, clock and irq are all shared with its
      master device, and the master device must be careful to attach from the
      iommu only after powering and clocking it (and leave it powered and
      clocked before detaching).  Because their is no guarantee what the status
      of the iommu is at probe, and since the driver does not even know if the
      device is powered, we delay requesting its irq until the master device
      attaches, at which point we have a guarantee that the device is powered
      and clocked and we can reset it and disable its interrupt mask.
      
      An iommu_domain describes a virtual iova address space.  Each iommu_domain
      has a corresponding page table that lists the mappings from iova to
      physical address.
      
      For the rk3288 iommu, the page table has two levels:
       The Level 1 "directory_table" has 1024 4-byte dte entries.
       Each dte points to a level 2 "page_table".
       Each level 2 page_table has 1024 4-byte pte entries.
       Each pte points to a 4 KiB page of memory.
      
      An iommu_domain is created when a dma_iommu_mapping is created via
      arm_iommu_create_mapping.  Master devices can then attach themselves to
      this mapping (or attach the mapping to themselves?) by calling
      arm_iommu_attach_device().  This in turn instructs the iommu driver to
      write the page table's physical address into the slave iommu's "Directory
      Table Entry" (DTE) register.
      
      In fact multiple master devices, each with their own slave iommu device,
      can all attach to the same mapping.  The iommus for these devices will
      share the same iommu_domain and therefore point to the same page table.
      Thus, the iommu domain maintains a list of iommu devices which are
      attached.  This driver relies on the iommu core to ensure that all devices
      have detached before destroying a domain.
      
      v6: - add .add/remove_device() callbacks.
          - parse platform_device device tree nodes for "iommus" property
          - store platform device pointer as group iommudata
          - Check for existence of iommu group instead of relying on a
            dev_get_drvdata() to return NULL for a NULL device.
      
      v7: - fixup some strings.
          - In rk_iommu_disable_paging() # and % were reversed.
      Signed-off-by: NDaniel Kurtz <djkurtz@chromium.org>
      Signed-off-by: NSimon Xue <xxm@rock-chips.com>
      Reviewed-by: NGrant Grundler <grundler@chromium.org>
      Reviewed-by: NStéphane Marchesin <marcheu@chromium.org>
      Tested-by: NHeiko Stuebner <heiko@sntech.de>
      Signed-off-by: NJoerg Roedel <jroedel@suse.de>
      c68a2921
  22. 23 10月, 2014 1 次提交
    • S
      iommu/omap: Integrate omap-iommu-debug into omap-iommu · 61c75352
      Suman Anna 提交于
      The debugfs support for OMAP IOMMU is currently implemented
      as a module, warranting certain OMAP-specific IOMMU API to
      be exported. The OMAP IOMMU, when enabled, can only be built-in
      into the kernel, so integrate the OMAP IOMMU debug module
      into the OMAP IOMMU driver. This helps in eliminating the
      need to export most of the current OMAP IOMMU API.
      
      The following are the main changes:
      - The debugfs directory and entry creation logic is reversed,
        the calls are invoked by the OMAP IOMMU driver now.
      - The current iffy circular logic of adding IOMMU archdata
        to the IOMMU devices itself to get a pointer to the omap_iommu
        object in the debugfs support code is replaced by directly
        using the omap_iommu structure while creating the debugfs
        entries.
      - The debugfs root directory is renamed from the generic name
        "iommu" to a specific name "omap_iommu".
      - Unneeded headers have also been cleaned up while at this.
      - There will no longer be a omap-iommu-debug.ko module after
        this patch.
      - The OMAP_IOMMU_DEBUG Kconfig option is converted to boolean
        only, the OMAP IOMMU debugfs support is built alongside the
        OMAP IOMMU driver only when this option is enabled.
      Signed-off-by: NSuman Anna <s-anna@ti.com>
      Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com>
      Signed-off-by: NJoerg Roedel <jroedel@suse.de>
      61c75352
  23. 29 7月, 2014 2 次提交
  24. 10 7月, 2014 1 次提交
  25. 26 5月, 2014 3 次提交
  26. 04 3月, 2014 1 次提交