Skip to content

K
Kernel

openeuler / Kernel
1 年多 前同步成功

通知 8
Star 0
Fork 0
K
Kernel
切换分支/标签
  1. 03 2月, 2015 1 次提交
  3. 10 1月, 2015 3 次提交
  5. 16 12月, 2014 2 次提交
  7. 14 12月, 2014 1 次提交
  9. 12 12月, 2014 1 次提交
  11. 11 12月, 2014 6 次提交
  13. 09 12月, 2014 1 次提交
  15. 08 12月, 2014 3 次提交
  17. 06 12月, 2014 1 次提交
  19. 05 12月, 2014 1 次提交
    • D
      clocksource: arch_timer: Allow the device tree to specify uninitialized timer registers · 65b5732d
      由 Doug Anderson 提交于 
      Some 32-bit (ARMv7) systems are architected like this:

* The firmware doesn't know and doesn't care about hypervisor mode and
  we don't want to add the complexity of hypervisor there.

* The firmware isn't involved in SMP bringup or resume.

* The ARCH timer come up with an uninitialized offset (CNTVOFF)
  between the virtual and physical counters.  Each core gets a
  different random offset.

* The device boots in "Secure SVC" mode.

* Nothing has touched the reset value of CNTHCTL.PL1PCEN or
  CNTHCTL.PL1PCTEN (both default to 1 at reset)

On systems like the above, it doesn't make sense to use the virtual
counter.  There's nobody managing the offset and each time a core goes
down and comes back up it will get reinitialized to some other random
value.

This adds an optional property which can inform the kernel of this
situation, and firmware is free to remove the property if it is going
to initialize the CNTVOFF registers when each CPU comes out of reset.

Currently, the best course of action in this case is to use the
physical timer, which is why it is important that CNTHCTL hasn't been
changed from its reset value and it's a reasonable assumption given
that the firmware has never entered HYP mode.

Note that it's been said that on ARMv8 systems the firmware and
kernel really can't be architected as described above.  That means
using the physical timer like this really only makes sense for ARMv7
systems.
Signed-off-by: NDoug Anderson <dianders@chromium.org>
Signed-off-by: NSonny Rao <sonnyrao@chromium.org>
Reviewed-by: NMark Rutland <mark.rutland@arm.com>
Acked-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: NCatalin Marinas <catalin.marinas@arm.com>
Signed-off-by: NOlof Johansson <olof@lixom.net>
      65b5732d
  21. 04 12月, 2014 2 次提交
  23. 03 12月, 2014 3 次提交
  25. 02 12月, 2014 5 次提交
  27. 01 12月, 2014 4 次提交
  29. 29 11月, 2014 1 次提交
  31. 28 11月, 2014 1 次提交
    • L
      ARM: dt: fix up PL011 device tree bindings · a81a6c65
      由 Linus Walleij 提交于 
      Make the map match the reality, the current binding text is
nonsense:

- The clock required for the clocking of the serial port
  must come first and is not optional (as the driver will
  otherwise proceed to grab and use the apb_pclk as uartclk),
  and the apb_pclk that clocks the logic must come second
  as the code will retrieve the first clock by index,
  whereas the PrimeCell but will explicitly look for
  "apb_pclk" so this can be specified later, as it is
  looked up by name.

- The pin control state "default" is the only mandated
  state, the sleep state is entirely optional.

We also add an example to avoid further confusion.
Reported-by: NArnd Bergmann <arnd@arndb.de>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NGrant Likely <grant.likely@linaro.org>
      a81a6c65
  33. 27 11月, 2014 4 次提交
    • H
      gpio: rcar: Add r8a7793 and r8a7794 support · 1fd2b49d
      由 Hisashi Nakamura 提交于 
      The device tree probing for R-Car M2-N (r8a7793) and R-Car E2 (r8a7794)
is added.
Signed-off-by: NHisashi Nakamura <hisashi.nakamura.ak@renesas.com>
Signed-off-by: NYoshihiro Kaneko <ykaneko0929@gmail.com>
Acked-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      1fd2b49d
    • B
      pinctrl: meson: add device tree bindings documentation · ae76f13b
      由 Beniamino Galvani 提交于 
      Add device tree bindings documentation for Amlogic Meson pin and GPIO
controller.
Signed-off-by: NBeniamino Galvani <b.galvani@gmail.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      ae76f13b
    • J
      pinctrl: tz1090-pinctrl.txt: Fix typo in binding · d0c3d95a
      由 James Hogan 提交于 
      Fix a typo, s/which which/which/ in the img,tz1090-pinctrl.txt binding.
Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: linux-gpio@vger.kernel.org
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      d0c3d95a
    • S
      mailbox/omap: adapt to the new mailbox framework · 8841a66a
      由 Suman Anna 提交于 
      The OMAP mailbox driver and its existing clients (remoteproc
for OMAP4+) are adapted to use the generic mailbox framework.

The main changes for the adaptation are:
  - The tasklet used for Tx is replaced with the state machine from
    the generic mailbox framework. The workqueue used for processing
    the received messages stays intact for minimizing the effects on
    the OMAP mailbox clients.
  - The existing exported client API, omap_mbox_get, omap_mbox_put and
    omap_mbox_send_msg are deleted, as the framework provides equivalent
    functionality. A OMAP-specific omap_mbox_request_channel is added
    though to support non-DT way of requesting mailboxes.
  - The OMAP mailbox driver is integrated with the mailbox framework
    through the proper implementations of mbox_chan_ops, except for
    .last_tx_done and .peek_data. The OMAP mailbox driver does not need
    these ops, as it is completely interrupt driven.
  - The OMAP mailbox driver uses a custom of_xlate controller ops that
    allows phandles for the pargs specifier instead of indexing to avoid
    any channel registration order dependencies.
  - The new framework does not support multiple clients operating on a
    single channel, so the reference counting logic is simplified.
  - The remoteproc driver (current client) is adapted to use the new API.
    The notifier callbacks used within this client is replaced with the
    regular callbacks from the newer framework.
  - The exported OMAP mailbox API are limited to omap_mbox_save_ctx,
    omap_mbox_restore_ctx, omap_mbox_enable_irq & omap_mbox_disable_irq,
    with the signature modified to take in the new mbox_chan handle instead
    of the OMAP specific omap_mbox handle. The first 2 will be removed when
    the OMAP mailbox driver is adapted to runtime_pm. The other exported
    API omap_mbox_request_channel will be removed once existing legacy
    users are converted to DT.
Signed-off-by: NSuman Anna <s-anna@ti.com>
Cc: Ohad Ben-Cohen <ohad@wizery.com>
Signed-off-by: NJassi Brar <jaswinder.singh@linaro.org>
      8841a66a