1. 05 5月, 2020 3 次提交
  2. 04 5月, 2020 1 次提交
  3. 28 4月, 2020 1 次提交
  4. 24 4月, 2020 1 次提交
    • J
      phy: ti: j721e-wiz: Implement DisplayPort mode to the wiz driver · 7ae14cf5
      Jyri Sarha 提交于
      For DisplayPort use we need to set WIZ_CONFIG_LANECTL register's
      P_STANDARD_MODE bits to "mode 3". In the DisplayPort use also the
      P_ENABLE bits of the same register are set to P_ENABLE instead of
      P_ENABLE_FORCE, so that the DisplayPort driver can enable and disable
      the lane as needed. The DisplayPort mode is selected according to
      "cdns,phy-type"-properties found in link subnodes under the managed
      serdes (see "ti,sierra-phy-t0" and "ti,j721e-serdes-10g" devicetree
      bindings for details). All other values of "cdns,phy-type"-property
      but PHY_TYPE_DP will set P_STANDARD_MODE bits to 0 and P_ENABLE bits
      to force enable.
      Signed-off-by: NJyri Sarha <jsarha@ti.com>
      Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
      7ae14cf5
  5. 11 4月, 2020 3 次提交
  6. 10 4月, 2020 1 次提交
  7. 09 4月, 2020 6 次提交
  8. 08 4月, 2020 24 次提交