1. 03 6月, 2020 1 次提交
  2. 25 5月, 2020 2 次提交
  3. 18 5月, 2020 3 次提交
  4. 14 4月, 2020 1 次提交
  5. 25 3月, 2020 2 次提交
  6. 09 3月, 2020 1 次提交
  7. 24 1月, 2020 1 次提交
    • M
      gpio: bd71828: Initial support for ROHM BD71828 PMIC GPIOs · c31f625d
      Matti Vaittinen 提交于
      ROHM BD71828 PMIC contains 4 pins which can be configured by OTP
      to be used for general purposes. First 3 can be used as outputs
      and 4.th pin can be used as input. Allow them to be controlled
      via GPIO framework.
      
      The driver assumes all of the pins are configured as GPIOs and
      trusts that the reserved pins in other OTP configurations are
      excluded from control using "gpio-reserved-ranges" device tree
      property (or left untouched by GPIO users).
      
      Typical use for 4.th pin (input) is to use it as HALL sensor
      input so that this pin state is toggled when HALL sensor detects
      LID position change (from close to open or open to close). PMIC
      HW implements some extra logic which allows PMIC to power-up the
      system when this pin is toggled. Please see the data sheet for
      details of GPIO options which can be selected by OTP settings.
      Signed-off-by: NMatti Vaittinen <matti.vaittinen@fi.rohmeurope.com>
      Reviewed-by: NBartosz Golaszewski <bgolaszewski@baylibre.com>
      Reviewed-by: NLinus Walleij <linus.walleij@linaro.org>
      Signed-off-by: NLee Jones <lee.jones@linaro.org>
      c31f625d
  8. 21 1月, 2020 1 次提交
  9. 15 1月, 2020 3 次提交
  10. 07 1月, 2020 1 次提交
  11. 16 12月, 2019 1 次提交
  12. 13 12月, 2019 2 次提交
  13. 01 11月, 2019 1 次提交
  14. 29 10月, 2019 2 次提交
  15. 09 10月, 2019 1 次提交
  16. 05 10月, 2019 1 次提交
  17. 01 10月, 2019 1 次提交
  18. 20 8月, 2019 1 次提交
  19. 16 8月, 2019 1 次提交
  20. 15 8月, 2019 2 次提交
    • L
      gpio: thunderx: Switch to GPIOLIB_IRQCHIP · a7fc89f9
      Linus Walleij 提交于
      Use the new infrastructure for hierarchical irqchips in
      gpiolib.
      
      The major part of the rewrite was dues to the fact that
      the driver was passing around a per-irq pointer to
      struct thunderx_line * data container, and the central
      handlers will assume struct gpio_chip * to be passed
      to we need to use the hwirq as index to look up the
      struct thunderx_line * for each IRQ.
      
      The pushing and pop:ing of the irqdomain was confusing
      because I've never seen this before, but I tried to
      replicate it as best I could.
      
      I have no chance to test or debug this so I need
      help.
      
      Cc: David Daney <david.daney@cavium.com>
      Cc: Thierry Reding <treding@nvidia.com>
      Cc: Brian Masney <masneyb@onstation.org>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      Link: https://lore.kernel.org/r/20190808123242.5359-4-linus.walleij@linaro.org
      a7fc89f9
    • L
      gpio: ixp4xx: Convert to hierarchical GPIOLIB_IRQCHIP · aa7d618a
      Linus Walleij 提交于
      This modifies the IXP4xx driver to use the new helpers
      to handle the remapping of parent to child hardware irqs
      in the gpiolib core.
      
      This pulls the majority of the code out of the driver
      and use the generic code in gpiolib.
      
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Marc Zyngier <marc.zyngier@arm.com>
      Cc: Lina Iyer <ilina@codeaurora.org>
      Cc: Jon Hunter <jonathanh@nvidia.com>
      Cc: Sowjanya Komatineni <skomatineni@nvidia.com>
      Cc: Bitan Biswas <bbiswas@nvidia.com>
      Cc: linux-tegra@vger.kernel.org
      Cc: Thierry Reding <treding@nvidia.com>
      Cc: Brian Masney <masneyb@onstation.org>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      Link: https://lore.kernel.org/r/20190808123242.5359-2-linus.walleij@linaro.org
      aa7d618a
  21. 14 8月, 2019 2 次提交
  22. 12 8月, 2019 1 次提交
  23. 15 7月, 2019 1 次提交
  24. 04 7月, 2019 1 次提交
  25. 27 6月, 2019 1 次提交
  26. 10 6月, 2019 1 次提交
  27. 08 6月, 2019 1 次提交
  28. 28 5月, 2019 1 次提交
  29. 24 5月, 2019 1 次提交
    • R
      gpio: fix gpio-adp5588 build errors · e9646f0f
      Randy Dunlap 提交于
      The gpio-adp5588 driver uses interfaces that are provided by
      GPIOLIB_IRQCHIP, so select that symbol in its Kconfig entry.
      
      Fixes these build errors:
      
      ../drivers/gpio/gpio-adp5588.c: In function ‘adp5588_irq_handler’:
      ../drivers/gpio/gpio-adp5588.c:266:26: error: ‘struct gpio_chip’ has no member named ‘irq’
                  dev->gpio_chip.irq.domain, gpio));
                                ^
      ../drivers/gpio/gpio-adp5588.c: In function ‘adp5588_irq_setup’:
      ../drivers/gpio/gpio-adp5588.c:298:2: error: implicit declaration of function ‘gpiochip_irqchip_add_nested’ [-Werror=implicit-function-declaration]
        ret = gpiochip_irqchip_add_nested(&dev->gpio_chip,
        ^
      ../drivers/gpio/gpio-adp5588.c:307:2: error: implicit declaration of function ‘gpiochip_set_nested_irqchip’ [-Werror=implicit-function-declaration]
        gpiochip_set_nested_irqchip(&dev->gpio_chip,
        ^
      
      Fixes: 459773ae ("gpio: adp5588-gpio: support interrupt controller")
      Reported-by: Nkbuild test robot <lkp@intel.com>
      Signed-off-by: NRandy Dunlap <rdunlap@infradead.org>
      Cc: linux-gpio@vger.kernel.org
      Reviewed-by: NBartosz Golaszewski <bgolaszewski@baylibre.com>
      Acked-by: NMichael Hennerich <michael.hennerich@analog.com>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      e9646f0f
  30. 21 5月, 2019 1 次提交