add support for SG lists on dwc3 driver. With
this we can e.g. use VFS layer's SG lists on
storage gadgets so that we can start bigger
transfers and improve throughput.
Signed-off-by: NFelipe Balbi <balbi@ti.com>

the LST bit is to be set on the last of a series
of consecutive TRBs. We had a workaround for a
problem where data would get corrupted but that
doesn't happen anymore. It's likely that it was
caused by some FPGA instability during development
phase.
Signed-off-by: NFelipe Balbi <balbi@ti.com>

all that function does is setup a TRB to be sent
to HW later. There's no need to return anything
actually.
Signed-off-by: NFelipe Balbi <balbi@ti.com>

In order to make it easier to add SG support,
let's split the big loop out to its own function.
Signed-off-by: NFelipe Balbi <balbi@ti.com>

After a bus reset, we should move our state to
Default, in order to be able to re-enumerate again.

I only managed to trigger this problem with g_ether
by removing the cable after a few transfers had been
completed.
Signed-off-by: NFelipe Balbi <balbi@ti.com>

ep->max_streams is a mere hint to the gadget
driver that 'ep' supports stream handling. Using
that as a decision variable for enabling streams
was my worst brain-fart to date.

Instead, we should check from the Superspeed
Endpoint Companion Descriptor if the endpoint
has requested streams. For that we need a little
re-factoring but it is now correct.
Debugged-by: NSebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: NFelipe Balbi <balbi@ti.com>

DWC3 revisions <1.88a have an issue which would
case a missing Disconnect event if cable is
disconnected while there's a Setup packet
pending the FIFO.
Signed-off-by: NFelipe Balbi <balbi@ti.com>

DWC3 revisions <1.90a have an issue which would cause
a missing USB3 Reset event. In such cases, it's
suggested that we follow the steps of a normal
USB3 Reset on Connection Done Event.
Signed-off-by: NFelipe Balbi <balbi@ti.com>

RTL revisions <1.83a have an issue where, depending
on the link partner, the USB link might do multiple
entry/exit of low power states before a transfer
takes place causing degraded throughput.

The suggested workaround is to clear bits
12:9 of DCTL register if we see a transition
from U1|U2 to U0 and only re-enable that on
a transfer complete IRQ and we have no pending
transfers on any of the enabled endpoints.
Signed-off-by: NFelipe Balbi <balbi@ti.com>

This patch avoids the compiler spitting out the following warning:
|drivers/usb/dwc3/gadget.c:1304: warning: 'trb' is used uninitialized \
	in this function

This is only uninitialized if the list of to-cleanup TRBs is empty which
should not be the case because we call this functions once a transfer
completed so it should be on list.

In order to make the warning disappear we return early. This should
never happen and the WARN_ON_ONCE(1) is there in case it happens
so we can investigate what went wrong.
Signed-off-by: NSebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: NFelipe Balbi <balbi@ti.com>

There were a few coding style issues with this driver
which are now fixed:

drivers/usb/dwc3/debugfs.c:48: WARNING: Use #include \
	<linux/uaccess.h> instead of <asm/uaccess.h>
drivers/usb/dwc3/debugfs.c:484: ERROR: space required \
	before the open brace '{'
drivers/usb/dwc3/ep0.c:261: WARNING: line over 80 characters
drivers/usb/dwc3/ep0.c:287: WARNING: suspect code indent \
	for conditional statements (16, 23)
drivers/usb/dwc3/gadget.c:749: WARNING: line over 80 characters
drivers/usb/dwc3/gadget.c:1267: WARNING: line over 80 characters
drivers/usb/dwc3/gadget.h:116: WARNING: line over 80 characters
drivers/usb/dwc3/io.h:42: WARNING: Use #include \
	<linux/io.h> instead of <asm/io.h>
Signed-off-by: NFelipe Balbi <balbi@ti.com>

A few inits like the scale value or the removal of the DISSCRAMBLE is
done in the gadget code however it touches a general register.
Move this piece to the core.c file since it is likely to be requied by
both, parts of the core (device and host).
Signed-off-by: NSebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: NFelipe Balbi <balbi@ti.com>

There are two where need to set operational mode:
- during initialization while we decide to run in host,device or DRD
  mode
- at runtime via the debugfs interface.

This patch provides a new function which sets the operational mode and
moves its initialiation to the mode switch instead in the gadget code
itself.
Signed-off-by: NSebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: NFelipe Balbi <balbi@ti.com>

This will allow us to only allocate memory when
we actually need.
Signed-off-by: NFelipe Balbi <balbi@ti.com>

this is mainly for testing. In order to be able
to test if we're enumerating correctly on all
speeds, let that be controlled by a module
parameter.
Signed-off-by: NFelipe Balbi <balbi@ti.com>

when we remove the gadget driver, it will already
do that for us.
Signed-off-by: NFelipe Balbi <balbi@ti.com>

This commit replaces usb_gadget's is_dualspeed field with
a max_speed field.

[ balbi@ti.com : Fixed DWC3 driver ]
Signed-off-by: NMichal Nazarewicz <mina86@mina86.com>
Signed-off-by: NFelipe Balbi <balbi@ti.com>

Without this the gadget will never be able to allocate a stream capable
endpoint. The manual says that the stream id is a 16bit id. It does not
talk about an upper limit in any other way. So I think 15 is a
reasonable limit :)
Signed-off-by: NSebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: NFelipe Balbi <balbi@ti.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

our parameter structures need to be written to
HW, so instead of assuming little endian, we
convert those into bit shifts.
Signed-off-by: NFelipe Balbi <balbi@ti.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

The dwc3 core has internal clock gating support.

Let's allow that to happen by clearing the disable
bit in GCTL register.
Signed-off-by: NFelipe Balbi <balbi@ti.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

The following patch adds support for streams
to dwc3 driver.

While at that, also fix one small issue on
endpoint disable where we should clear all
flags not only ENABLED.
Reviewied-by: NPaul Zimmerman <paulz@synopsys.com>
Signed-off-by: NFelipe Balbi <balbi@ti.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

We already have the value from gadget drivers,
just need to pass it to our controller.
Signed-off-by: NFelipe Balbi <balbi@ti.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

Fix offset calculation in dwc3_trb_dma_offset()
Signed-off-by: NPaul Zimmerman <paulz@synopsys.com>
Signed-off-by: NFelipe Balbi <balbi@ti.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

This makes DWC3_EP_WEDGE do the right thing, which is
prevent DWC3_EP_WEDGE from ever being cleared by a
ClearFeature(HALT) command.

[ balbi@ti.com : allowed set_wedge to send SetHalt command
	to controller ]
Signed-off-by: NPaul Zimmerman <paulz@synopsys.com>
Signed-off-by: NFelipe Balbi <balbi@ti.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

An older version of the databook said to wait for the FIFO to
drain, but that has been removed from the newer databooks.

Waiting for RxFIFO to drain caused problems when testing against
one of the host controllers available in the market.

After talking to one of the RTL engineers, he stated that we
should _not_ wait for RxFIFO to drain.
Signed-off-by: NPaul Zimmerman <paulz@synopsys.com>
Signed-off-by: NFelipe Balbi <balbi@ti.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

DEPSTARTCFG for non-EP0 EPs must only be sent once per config

[ balbi@ti.com : changed config_start to start_config_issued ]
Signed-off-by: NPaul Zimmerman <paulz@synopsys.com>
Signed-off-by: NFelipe Balbi <balbi@ti.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

Some people think that this line is not compatible with the GPL. The
statement was required due to the Buenos Aires Convention and is now
deprecated. I remove it because it is said that it is pointless nowdays.
Signed-off-by: NSebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: NFelipe Balbi <balbi@ti.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

It's useful to know which states core is going
through, as it might help us figure out misbehavior
on specific link states.
Signed-off-by: NFelipe Balbi <balbi@ti.com>

if req->dma isn't DMA_ADDR_INVALID it means gadget driver
mapped the request or allocated from coherent, so it's
unnecessary to do anything.
Signed-off-by: NFelipe Balbi <balbi@ti.com>

ensure a few bits are cleared before enabling
what we need.
Signed-off-by: NFelipe Balbi <balbi@ti.com>

If the gadget drivers sends a ZLP we are trying to map this this request
which does not work on all implementations. So we simply skip mapping
it.
Signed-off-by: NSebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: NFelipe Balbi <balbi@ti.com>

Whenever we issue a Set Stall command on EP0,
the state machine will be restarted and Stall
is cleared automatically, when core receives
the next SETUP packet.

There's no need to track that EP0_STALL state.
Signed-off-by: NFelipe Balbi <balbi@ti.com>

There are two spots where we wait until the HW finishes processing a
certain command. Initially we had a few problems and we used 500ms as a
limit to be on a the safe side. Paul Zimmerman mentioned this is little too
much. After a debugging session, we noticed that we hardly ever go over 20us
and didn't pass 30usec so far. Using mdelay() seems way overloaded.

Giving the current numbers 500usec as the upper limit is more than  enough.
Should it ever timeout then something is definitely wrong.

While here, also replace the type with u32 since long does not really
fit here.

Cc: Paul Zimmerman <paul.zimmerman@synopsys.com>
Signed-off-by: NSebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: NFelipe Balbi <balbi@ti.com>

- since a while we are disabling an endpoint and purging every requests on
  RESET and DISCONNECT which leads to a warning since the endpoint was
  disabled twice (once by the UDC, and second time by the gadget). I
  think UDC should nuke all requests because all those requests
  become invalid. It's gadget driver's responsability, though, to disable
  its used endpoints. This is done by merging dwc3_stop_active_transfer()
  and dwc3_gadget_nuke_reqs() into dwc3_remove_requests().

- dwc3_stop_active_transfer() is now no longer called unconditionaly.
  This has the advantage that it is always called to disable an active
  transfer which means if res_trans_idx 0 than something went wrong and
  it is an error condition because we can't clean up the requests.

- Remove the DWC3_EP_WILL_SHUTDOWN which was introduced while
  introducing the command complete part for dequeue. All requests on
  req_queued list should be removed during the dwc3_cleanup_done_reqs()
  callback so there is no reason to go through the list again.
  We consider it an error condition if requests are still on this
  list since we never queue TRB without LST=1 (the last requests has
  always LST=1, there are no requests with LST=0 behind it).

[ balbi@ti.com : reworked commit log a bit, made patch apply ]
Signed-off-by: NSebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: NFelipe Balbi <balbi@ti.com>

The DesignWare USB3 core tells us which phase
of a control transfer should be started, it
also tells us which physical endpoint needs
that transfer.

With these two informations, we have all we
need to simply EP0 handling quite a lot and
get rid rid of the SW state machine tracking
ep0 states.

For achieving this perfectly, we needed to
add support for situations where we get
XferNotReady while endpoint is still busy
and XferNotReady while gadget driver still
hasn't queued a request.
Signed-off-by: NFelipe Balbi <balbi@ti.com>

This core cannot handle OUT transfers which aren't
aligned to wMaxPacketSize, but that can happen at
least on control endpoint with the USB Audio Class.

This patch adds a bounce buffer to be used on the
case of a non-aligned ep0out request is queued.
Signed-off-by: NFelipe Balbi <balbi@ti.com>

the previous message had too little meaning. Make
it more human readable and use the macro we already
had for extracting the command completion status out
of DEPCMDn register.
Signed-off-by: NFelipe Balbi <balbi@ti.com>

if we don't set DMA address to invalid when unmapping,
we might fall in a situation where request buffer
can't be mapped to DMA again.
Signed-off-by: NFelipe Balbi <balbi@ti.com>

Without this patch we won't clear that bit and instead will
clear all other bits on our endpoint flag.
Signed-off-by: NSebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: NFelipe Balbi <balbi@ti.com>

Type 6 should be used for the first transfer during an interval. This is
also what the reference driver is using. Type 7 seems to be for following
or additional transfers within the same interval.
Signed-off-by: NSebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: NFelipe Balbi <balbi@ti.com>