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- 22 7月, 2019 3 次提交
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由 Joe Perches 提交于
Arguments are supposed to be ordered high then low. Signed-off-by: NJoe Perches <joe@perches.com> Reviewed-by: NNeil Armstrong <narmstrong@baylibre.com> Fixes: ed80a13b ("mmc: meson-mx-sdio: Add a driver for the Amlogic Meson8 and Meson8b SoCs") Cc: stable@vger.kernel.org Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Douglas Anderson 提交于
In commit 46d17952 ("mmc: dw_mmc: Wait for data transfer after response errors.") we fixed a tuning-induced hang that I saw when stress testing tuning on certain SD cards. I won't re-hash that whole commit, but the summary is that as a normal part of tuning you need to deal with transfer errors and there were cases where these transfer errors was putting my system into a bad state causing all future transfers to fail. That commit fixed handling of the transfer errors for me. In downstream Chrome OS my fix landed and had the same behavior for all SD/MMC commands. However, it looks like when the commit landed upstream we limited it to only SD tuning commands. Presumably this was to try to get around problems that Alim Akhtar reported on exynos [1]. Unfortunately while stress testing reboots (and suspend/resume) on some rk3288-based Chromebooks I found the same problem on the eMMC on some of my Chromebooks (the ones with Hynix eMMC). Since the eMMC tuning command is different (MMC_SEND_TUNING_BLOCK_HS200 vs. MMC_SEND_TUNING_BLOCK) we were basically getting back into the same situation. I'm hoping that whatever problems exynos was having in the past are somehow magically fixed now and we can make the behavior the same for all commands. [1] https://lkml.kernel.org/r/CAGOxZ53WfNbaMe0_AM0qBqU47kAfgmPBVZC8K8Y-_J3mDMqW4A@mail.gmail.com Fixes: 46d17952 ("mmc: dw_mmc: Wait for data transfer after response errors.") Signed-off-by: NDouglas Anderson <dianders@chromium.org> Cc: Marek Szyprowski <m.szyprowski@samsung.com> Cc: Alim Akhtar <alim.akhtar@gmail.com> Cc: Enric Balletbo i Serra <enric.balletbo@collabora.com> Cc: stable@vger.kernel.org Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Baolin Wang 提交于
When the SD host controller tries to probe again due to the derferred probe mechanism, it will always keep the SD host device as runtime resume state due to missing the runtime put operation in error path last time. Thus add the pm_runtime_put_noidle() in error path to make the PM runtime counter balance, which can make the SD host device's PM runtime work well. Signed-off-by: NBaolin Wang <baolin.wang@linaro.org> Acked-by: NAdrian Hunter <adrian.hunter@intel.com> Fixes: fb8bd90f ("mmc: sdhci-sprd: Add Spreadtrum's initial host controller") Cc: stable@vger.kernel.org Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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- 10 7月, 2019 8 次提交
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由 YueHaibing 提交于
Fix build error: drivers/mmc/host/sdhci_am654.o: In function `sdhci_am654_probe': drivers/mmc/host/sdhci_am654.c:464: undefined reference to `__devm_regmap_init_mmio_clk' drivers/mmc/host/sdhci_am654.o:(.debug_addr+0x3f8): undefined reference to `__devm_regmap_init_mmio_clk' Reported-by: NHulk Robot <hulkci@huawei.com> Fixes: aff88ff23512 ("mmc: sdhci_am654: Add Initial Support for AM654 SDHCI driver") Signed-off-by: NYueHaibing <yuehaibing@huawei.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Colin Ian King 提交于
A greater or equal comparison on the unsigned int variable tmp_diff is always true as unsigned ints are never negative. Hence the comparison is redundant and can be removed. Addresses-Coverity: ("Unsigned compared against 0") Signed-off-by: NColin Ian King <colin.king@canonical.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Jorge Ramirez-Ortiz 提交于
mutexes can sleep and therefore should not be taken while holding a spinlock. move clk_get_rate (can sleep) outside the spinlock protected region. Fixes: 83736352 ("mmc: sdhci-msm: Update DLL reset sequence") Cc: stable@vger.kernel.org Signed-off-by: NJorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org> Reviewed-by: NBjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: NVinod Koul <vkoul@kernel.org> Acked-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 YueHaibing 提交于
Fix sparse warnings: drivers/mmc/host/sdhci_am654.c:192:6: warning: symbol 'sdhci_j721e_4bit_set_clock' was not declared. Should it be static? drivers/mmc/host/sdhci_am654.c:261:18: warning: symbol 'sdhci_j721e_8bit_ops' was not declared. Should it be static? drivers/mmc/host/sdhci_am654.c:284:18: warning: symbol 'sdhci_j721e_4bit_ops' was not declared. Should it be static? Reported-by: NHulk Robot <hulkci@huawei.com> Signed-off-by: NYueHaibing <yuehaibing@huawei.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Baolin Wang 提交于
For Spreadtrum SD card voltage switching, besides regulator setting, it also need switch related pin's state to output corresponding voltage. This patch adds pin control operation to support voltage switch. Signed-off-by: NBaolin Wang <baolin.wang@linaro.org> Acked-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Baolin Wang 提交于
For Spreadtrum SD host controller, we can not use standard SD registers to change and detect the I/O voltage signals, since our voltage regulator for I/O is fixed in hardware, and no signals were connected to the SD controller. Thus add Spreadtrum specific voltage switch ops to change voltage instead of using standard SD host registers. Signed-off-by: NBaolin Wang <baolin.wang@linaro.org> Acked-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Adrian Hunter 提交于
Add PCI Ids for Intel EHL. Signed-off-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Yoshihiro Shimoda 提交于
Since the commit 133d624b ("dma: Introduce dma_max_mapping_size()") provides a helper function to get the max mapping size, we can use the function instead of the workaround code for swiotlb. Signed-off-by: NYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Acked-by: NWolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: NChristoph Hellwig <hch@lst.de> Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: NSimon Horman <horms+renesas@verge.net.au> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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- 19 6月, 2019 3 次提交
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由 Thomas Gleixner 提交于
Based on 2 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation # extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 4122 file(s). Signed-off-by: NThomas Gleixner <tglx@linutronix.de> Reviewed-by: NEnrico Weigelt <info@metux.net> Reviewed-by: NKate Stewart <kstewart@linuxfoundation.org> Reviewed-by: NAllison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.deSigned-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Thomas Gleixner 提交于
Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of version 2 of the gnu general public license as published by the free software foundation this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details you should have received a copy of the gnu general public license along with this program if not see http www gnu org licenses the full gnu general public license is included in this distribution in the file called copying extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 4 file(s). Signed-off-by: NThomas Gleixner <tglx@linutronix.de> Reviewed-by: NAllison Randal <allison@lohutok.net> Reviewed-by: NEnrico Weigelt <info@metux.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190604081202.258730266@linutronix.deSigned-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Thomas Gleixner 提交于
Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details you should have received a copy of the gnu general public license along with this program if not see http www gnu org licenses extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 503 file(s). Signed-off-by: NThomas Gleixner <tglx@linutronix.de> Reviewed-by: NAlexios Zavras <alexios.zavras@intel.com> Reviewed-by: NAllison Randal <allison@lohutok.net> Reviewed-by: NEnrico Weigelt <info@metux.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190602204653.811534538@linutronix.deSigned-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 18 6月, 2019 3 次提交
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由 Raul E Rangel 提交于
Remove whitespace in front of SDHCI_CTRL_8BITBUS. The value is not part of SDHCI_CTRL_DMA_MASK. Signed-off-by: NRaul E Rangel <rrangel@chromium.org> Acked-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Raul E Rangel 提交于
The O2 controller supports 8-bit EMMC access. JESD84-B51 section A.6.3.a defines the bus testing procedure that `mmc_select_bus_width()` implements. This is used to determine the actual bus width of the eMMC. Signed-off-by: NRaul E Rangel <rrangel@chromium.org> Acked-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Raul E Rangel 提交于
The O2Micro controller only supports tuning at 4-bits. So the host driver needs to change the bus width while tuning and then set it back when done. There was a bug in the original implementation in that mmc->ios.bus_width also wasn't updated. Thus setting the incorrect blocksize in sdhci_send_tuning which results in a tuning failure. Signed-off-by: NRaul E Rangel <rrangel@chromium.org> Fixes: 0086fc21 ("mmc: sdhci: Add support for O2 hardware tuning") Acked-by: NAdrian Hunter <adrian.hunter@intel.com> Cc: stable@vger.kernel.org Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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- 17 6月, 2019 9 次提交
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由 Yangbo Lu 提交于
LS1028A used 1/2 periperhal clock as one reference clock. Signed-off-by: NYangbo Lu <yangbo.lu@nxp.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Yangbo Lu 提交于
This patch is to set the sd clock divisor value above 3 in tuning mode Signed-off-by: NYinbo Zhu <yinbo.zhu@nxp.com> Signed-off-by: NYangbo Lu <yangbo.lu@nxp.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Greg Kroah-Hartman 提交于
When calling debugfs functions, there is no need to ever check the return value. The function can work or not, but the code logic should never do something different based on this. Also, because there is no need to save the file dentries, remove them from the host-specific structure and just recursively delete the directory that the driver created, when shutting down. Cc: Ben Dooks <ben-linux@fluff.org> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Greg Kroah-Hartman 提交于
When calling debugfs functions, there is no need to ever check the return value. The function can work or not, but the code logic should never do something different based on this Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Greg Kroah-Hartman 提交于
When calling debugfs functions, there is no need to ever check the return value. The function can work or not, but the code logic should never do something different based on this. Cc: Nicolas Ferre <nicolas.ferre@microchip.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org> Acked-by: NAlexandre Belloni <alexandre.belloni@bootlin.com> Acked-by: NLudovic Desroches <ludovic.desroches@microchip.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 jjian zhou 提交于
If cmd19 timeout or response crcerr occurs during execute_tuning(), it need invoke msdc_reset_hw(). Otherwise SDIO IRQ can't be detected. Signed-off-by: Njjian zhou <jjian.zhou@mediatek.com> Signed-off-by: NChaotian Jing <chaotian.jing@mediatek.com> Signed-off-by: NYong Mao <yong.mao@mediatek.com> Fixes: 5215b2e9 ("mmc: mediatek: Add MMC_CAP_SDIO_IRQ support") Cc: stable@vger.kernel.org Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 jjian zhou 提交于
SDIO IRQ is triggered by low level. It need disable SDIO IRQ detected function. Otherwise the interrupt register can't be cleared. It will process the interrupt more. Signed-off-by: NJjian Zhou <jjian.zhou@mediatek.com> Signed-off-by: NChaotian Jing <chaotian.jing@mediatek.com> Signed-off-by: NYong Mao <yong.mao@mediatek.com> Fixes: 5215b2e9 ("mmc: mediatek: Add MMC_CAP_SDIO_IRQ support") Cc: stable@vger.kernel.org Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Faiz Abbas 提交于
Add support for 4 bit instances on TI's J721E devices. Because these instances have no DLL, introduce a DLL_PRESENT flag and make sure DLL related registers are only accessed when it is present. Also add a separate set_clock callback for this compatible. Signed-off-by: NFaiz Abbas <faiz_abbas@ti.com> Acked-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Faiz Abbas 提交于
The 8 bit IP on the TI's J721E device departs from the AM654x IP in some ways which require special handling. Create a driver_data structure which holds the pltfm_data and a flags field which is used to indicate these differences. These are the following: 1. The pins are not muxed with anything else inside the SoC and hence the IOMUX_ENABLE field does not exist. Add a flag which is used to indicate the presence of the field. 2. The register field used to select DLL frequency is 3 bit wide as compared to 2 bits in AM65x. Add another flag which differentiates between 3 bit and 2 bit fields. 3. The strobe select field is 8 bit wide as compared to 4 bits for AM65x. Add yet another flag to indicate this difference. Strobe select is used only for HS400 speed mode, support for which has not yet been added in AM65x. Signed-off-by: NFaiz Abbas <faiz_abbas@ti.com> Acked-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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- 10 6月, 2019 14 次提交
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由 Wolfram Sang 提交于
Bools are initialized to 'false' by default. Signed-off-by: NWolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: NNiklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Wolfram Sang 提交于
Quirks show up in new SoCs as well, so the naming should be generic. Describe them by what they do. Signed-off-by: NWolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: NNiklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Thierry Reding 提交于
Recent changes have made it much more likely that clocks are not available, when the SDHCI driver is first probed. However, that is a situation that the driver can cope with just fine. To avoid confusion, don't output an error when this happens. Signed-off-by: NThierry Reding <treding@nvidia.com> Acked-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Baolin Wang 提交于
Set the PHY DLL delay for each timing mode, which is used to sample the clock accurately and make the clock more stable. Signed-off-by: NBaolin Wang <baolin.wang@linaro.org> Acked-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Baolin Wang 提交于
For the Spreadtrum SD host controller, when we changed the clock to be more than 52M, we should enable the PHY DLL which is used to track the clock frequency to make the clock work more stable. Otherwise deviation may occur of the higher clock. Signed-off-by: NBaolin Wang <baolin.wang@linaro.org> Acked-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Baolin Wang 提交于
Add HS400 enhanced strobe mode support for Spreadtrum SD host controller. Signed-off-by: NBaolin Wang <baolin.wang@linaro.org> Acked-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Baolin Wang 提交于
Implement the get_max_timeout_count() interface to set the Spredtrum SD host controller actual maximum timeout count. Signed-off-by: NBaolin Wang <baolin.wang@linaro.org> Acked-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Baolin Wang 提交于
For the Spreadtrum SC9860 platform, we should enable another gate clock '2x_enable' to make the SD host controller work well. Signed-off-by: NBaolin Wang <baolin.wang@linaro.org> Acked-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Baolin Wang 提交于
Missed to check the enable clock's return value, fix it. Signed-off-by: NBaolin Wang <baolin.wang@linaro.org> Acked-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Colin Ian King 提交于
The calculation of slots results in a value in the range 1..8 and so slots can never be zero. The check for slots == 0 is always going to be false, hence it is redundant and can be removed. Addresses-Coverity: ("Logically dead code") Signed-off-by: NColin Ian King <colin.king@canonical.com> Acked-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Faiz Abbas 提交于
Print an error message and return if DLL fails to lock. Signed-off-by: NFaiz Abbas <faiz_abbas@ti.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Faiz Abbas 提交于
Line wrapping with the regmap_*() functions is way more conservative than required by the 80 character rule. Expand the function calls out to use less number of lines. Signed-off-by: NFaiz Abbas <faiz_abbas@ti.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Neil Armstrong 提交于
On the Amlogic G12A SoC family, (only) the SDIO controller fails to access the data from DRAM, leading to a broken controller. But each MMC controller has 1,5KiB of SRAM after the registers, that can be used as bounce buffer to avoid direct DRAM access from the integrated DMAs (this SRAM may be used by the boot ROM when DRAM is not yet initialized). The quirk is to disable the chained descriptor for this controller, and use this SRAM memory zone as buffer for the bounce buffer fallback mode. The performance hit hasn't been evaluated, but the fix has been tested using a WiFi AP6398S SDIO module, and the iperf3 Bandwidth measurement gave 55.2 Mbits/sec over a 63 Hours long test, with the SDIO ios set as High-Speed at 50MHz clock. It gave 170 Mbits/sec as SDR104 and 200MHz clock. Reviewed-by: NKevin Hilman <khilman@baylibre.com> Tested-by: NGuillaume La Roque <glaroque@baylibre.com> Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Neil Armstrong 提交于
Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com> Acked-by: NKevin Hilman <khilman@baylibre.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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