- 04 4月, 2012 1 次提交
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由 Emil Tantilov 提交于
This patch modifies ixgbe_get_pcie_msix_count_generic() to support all current HW and removes the 82598 specific function. - change the type of ixgbe_get_pcie_msix_count_generic() to u16 - include a check to make sure the maximum allowed number of vectors is not exceeded. Signed-off-by: NEmil Tantilov <emil.s.tantilov@intel.com> Tested-by: NPhil Schmitt <phillip.j.schmitt@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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- 14 3月, 2012 1 次提交
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由 Alexander Duyck 提交于
A previous fix had gone though and disabled relaxed ordering for Rx descriptor read fetching. This was not necessary as this functions correctly and has no ill effects on the system. In addition several of the defines used for the DCA control registers were incorrect in that they indicated descriptor effects when they actually had an impact on either data or header write back. As such I have update these to correctly reflect either DATA or HEAD. Signed-off-by: NAlexander Duyck <alexander.h.duyck@intel.com> Tested-by: NStephen Ko <stephen.s.ko@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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- 13 2月, 2012 1 次提交
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由 Joe Perches 提交于
Booleans should not be compared to true or false but be directly tested or tested with !. Done via cocci script: @@ bool t; @@ - t == true + t @@ bool t; @@ - t != true + !t @@ bool t; @@ - t == false + !t @@ bool t; @@ - t != false + t Signed-off-by: NJoe Perches <joe@perches.com> Reviewed-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 03 2月, 2012 1 次提交
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由 Don Skidmore 提交于
New year so bump the copyright date. Signed-off-by: NDon Skidmore <donald.c.skidmore@intel.com> Tested-by: NPhil Schmitt <phillip.j.schmitt@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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- 17 10月, 2011 1 次提交
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由 Emil Tantilov 提交于
Implement support for ethtool -E Signed-off-by: NEmil Tantilov <emil.s.tantilov@intel.com> Tested-by: NPhil Schmitt <phillip.j.schmitt@intel.com> Tested-by: NStephen Ko <stephen.s.ko@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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- 05 10月, 2011 2 次提交
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由 Emil Tantilov 提交于
82598 and 82599 do not ship with this type of PHY Signed-off-by: NEmil Tantilov <emil.s.tantilov@intel.com> Tested-by: NStephen Ko <stephen.s.ko@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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由 Emil Tantilov 提交于
Disabling flow control in ixgbe_check_mac_link() results in incorrect reporting by ethtool when link goes down, so remove it. Signed-off-by: NEmil Tantilov <emil.s.tantilov@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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- 29 9月, 2011 1 次提交
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由 John Fastabend 提交于
Revise high and low threshold marks wrt flow control to account for the X540 devices and latency introduced by the loopback switch. Without this it was in theory possible to drop frames on a supposedly lossless link with X540 or SR-IOV enabled. Previously we used a magic number in a define to calculate the threshold values. This made it difficult to sort out exactly which latencies were or were not being accounted for. Here I was overly explicit and tried to used #define names that would be recognizable after reading the IEEE 802.1Qbb specification. Signed-off-by: NJohn Fastabend <john.r.fastabend@intel.com> Tested-by: NRoss Brattain <ross.b.brattain@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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- 24 9月, 2011 1 次提交
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由 Emil Tantilov 提交于
This change is meant to avoid a hardware lockup when Tx work is still pending and we request a reset. Signed-off-by: NEmil Tantilov <emil.s.tantilov@intel.com> Tested-by: NPhil Schmitt <phillip.j.schmitt@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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- 16 9月, 2011 1 次提交
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由 Alexander Duyck 提交于
The reset paths are overly complicated and are either missing steps or contain extra unnecessary steps such as reading MAC address twice. This change is meant to help clean up the reset paths an get things functioning correctly. Signed-off-by: NAlexander Duyck <alexander.h.duyck@intel.com> Tested-by: NPhil Schmitt <phillip.j.schmitt@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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- 11 8月, 2011 1 次提交
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由 Jeff Kirsher 提交于
Moves the Intel wired LAN drivers into drivers/net/ethernet/intel/ and the necessary Kconfig and Makefile changes. Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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- 21 6月, 2011 2 次提交
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由 Emil Tantilov 提交于
This patch adds support for Dell CEM (Comprehensive Embedded Management)). This consists of informing the management firmware of the driver version during probe on 82599 and X540 HW. Signed-off-by: NEmil Tantilov <emil.s.tantilov@intel.com> Tested-by: NEvan Swanson <evan.swanson@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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由 John Fastabend 提交于
Consolidate packet buffer allocation currently being done in the DCB path and main path. This allows the feature set and packet buffer requirements to be done once. This is prep work to allow DCB to coexist with other features namely, flow director. CC: Alexander Duyck <alexander.h.duyck@intel.com> Signed-off-by: NJohn Fastabend <john.r.fastabend@intel.com> Tested-by: NRoss Brattain <ross.b.brattain@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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- 05 5月, 2011 1 次提交
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由 Emil Tantilov 提交于
Introduce buffered read/writes which greatly improves performance on parts with large EEPROMs. Previously reading/writing a word requires taking/releasing of synchronization semaphores which adds 10ms to each operation. The optimization is to read/write in buffers, but make sure the semaphore is not held for >500ms according to the datasheet. Since we can't read the EEPROM page size ixgbe_detect_eeprom_page_size() is used to discover the EEPROM size when needed and keeps the result in word_page_size for the rest of the run time. Use buffered reads for ethtool -e. Signed-off-by: NEmil Tantilov <emil.s.tantilov@intel.com> Tested-by: NEvan Swanson <evan.swanson@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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- 14 4月, 2011 4 次提交
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由 John Fastabend 提交于
The X540 device has a smaller packet buffer but the DCB configuration never took this into account. Under stress this can result in the DMA engine hanging and TX Unit hang occurring to reset the device. This patch reworks the packet buffer allocation routine used for DCB on 82599 and X540 devices to account for RX packet buffer sizes. This fixes the immediate hang. We should consolidate the various hardware specific routines for configuring features into a single routine. This will make it much harder to miss feature cases like this. Signed-off-by: NJohn Fastabend <john.r.fastabend@intel.com> Tested-by: NRoss Brattain <ross.b.brattain@intel.com> Tested-by: NEvan Swanson <evan.swanson@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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由 Don Skidmore 提交于
Since msleep might not sleep for the desired amount when less than 20ms use usleep_range. Signed-off-by: NDon Skidmore <donald.c.skidmore@intel.com> Tested-by: NStephen Ko <stephen.s.ko@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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由 Emil Tantilov 提交于
Relaxed ordering can lead to issues with some chipsets. This patch makes sure that it is disabled by default and not only when DCA is on. Signed-off-by: NEmil Tantilov <emil.s.tantilov@intel.com> Tested-by: NEvan Swanson <evan.swanson@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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由 Emil Tantilov 提交于
Some 82598 parts have LAN0 disabled and LAN1 enabled and the LAN ID bits in Device Status register report the NIC as having only LAN1 as enabled. This causes ixgbe_set_lan_id_multi_port_pcie() to set bus->func = 1 which is incorrect. Force bus->func to 0 when LAN0 is disabled in the EEPROM. Signed-off-by: NEmil Tantilov <emil.s.tantilov@intel.com> Tested-by: NEvan Swanson <evan.swanson@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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- 12 3月, 2011 1 次提交
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由 Emil Tantilov 提交于
This change updates the PHY setup code to support 100Mbps capable PHYs as well as 10G and 1Gbps. Signed-off-by: NEmil Tantilov <emil.s.tantilov@intel.com> Tested-by: NStephen Ko <stephen.s.ko@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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- 08 3月, 2011 2 次提交
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由 Emil Tantilov 提交于
This patch enables flow control pause parameters auto-negotiation support to 82599 based 10G Base-T, backplane devices and multi-speed fiber optics modules at 1G speed Signed-off-by: NEmil Tantilov <emil.s.tantilov@intel.com> Tested-by: NStephen Ko <stephen.s.ko@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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由 Emil Tantilov 提交于
This change cleans up several situations in which we were either stepping over possible errors, or calling initialization routines multiple times. Also includes whitespace fixes where applicable. Signed-off-by: NEmil Tantilov <emil.s.tantilov@intel.com> Tested-by: NStephen Ko <stephen.s.ko@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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- 03 3月, 2011 7 次提交
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由 Don Skidmore 提交于
Updating the copyrights for 2011 as well as make the ixgbe_copyright string a constant. Signed-off-by: NDon Skidmore <donald.c.skidmore@intel.com> Tested-by: NStephen Ko <stephen.s.ko@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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由 Don Skidmore 提交于
The X540 devices grabs semaphores differently than 82599 and 82598 devices do. They do however also grab them in allot of the same functions. So I'm adding a new MAC operation function pointer to allow us to use the correct function based on our MAC type. I'm also changing all the semaphore calls to use this new function pointer. Signed-off-by: NDon Skidmore <donald.c.skidmore@intel.com> Tested-by: NStephen Ko <stephen.s.ko@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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由 Emil Tantilov 提交于
We were reading the address after it had been initialized and this results in the permanent address on the system being changed. This change corrects that by storing the address before we re-initialize it. Signed-off-by: NEmil Tantilov <emil.s.tantilov@intel.com> Tested-by: NStephen Ko <stephen.s.ko@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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由 Emil Tantilov 提交于
This patch contains a number of whitespace and formatting cleanups. Signed-off-by: NEmil Tantilov <emil.s.tantilov@intel.com> Tested-by: NStephen Ko <stephen.s.ko@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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由 Emil Tantilov 提交于
This change removes the unused code that was setting up the uc_addr_list. Signed-off-by: NEmil Tantilov <emil.s.tantilov@intel.com> Tested-by: NStephen Ko <stephen.s.ko@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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由 Emil Tantilov 提交于
This change makes it so that out of bounds requests to these calls will now return IXGBE_ERR_INVALID_ARGUMENT instead of returning 0. Signed-off-by: NEmil Tantilov <emil.s.tantilov@intel.com> Tested-by: NStephen Ko <stephen.s.ko@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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由 Emil Tantilov 提交于
Double resets are required for recovery from certain error conditions. Between resets, it is necessary to stall to allow time for any pending HW events to complete. We use 1usec since that is what is needed for ixgbe_disable_pcie_master(). The second reset then clears out any effects of those events. Signed-off-by: NEmil Tantilov <emil.s.tantilov@intel.com> Tested-by: NStephen Ko <stephen.s.ko@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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- 17 11月, 2010 2 次提交
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由 Don Skidmore 提交于
The new MAC type X540 shares much of the same functionality of some silicon specific functions. To reduce duplicate code, made these functions generic. Signed-off-by: NDon Skidmore <donald.c.skidmore@intel.com> Tested-by: NStephen Ko <stephen.s.ko@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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由 John Fastabend 提交于
Currently the high and low water marks for PFC are being set conservatively for jumbo frames. This means the RX buffers are being underutilized in the default 1500 MTU. This patch fixes this so that the water marks are set as described in the data sheet considering the MTU size. The equation used is, RTT * 1.44 + MTU * 1.44 + MTU Where RTT is the round trip time and MTU is the max frame size in KB. To avoid floating point arithmetic FC_HIGH_WATER is defined ((((RTT + MTU) * 144) + 99) / 100) + MTU This changes how the hardware field fc.low_water and fc.high_water are used. With this change they are no longer storing the actual low water and high water markers but are storing the required head room in the buffer. This simplifies the logic and we do not need to account for the size of the buffer when setting the thresholds. Testing with iperf and 16 threads showed a slight uptick in throughput over a single traffic class .1-.2Gbps and a reduction in pause frames. Without the patch a 30 second run would show ~10-15 pause frames being transmitted with the patch ~2-5 are seen. Test were run back to back with 82599. Note RXPBSIZE is in KB and low and high water marks fields are also in KB. However the FCRT* registers are 32B granularity and right shifted 5 into the register, (((rx_pbsize - water_mark) * 1024) / 32) << 5 is the most explicit conversion here we simplify (rx_pbsize - water_mark) * 32 << 5 = (rx_pbsize - water_mark) << 10 This patch updates the PFC thresholds and legacy FC thresholds. Signed-off-by: NJohn Fastabend <john.r.fastabend@intel.com> Tested-by: NRoss Brattain <ross.b.brattain@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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- 21 5月, 2010 1 次提交
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由 Mallikarjuna R Chilakala 提交于
This adds support for a new copper device for 82599, device id 0x151c. This 82599 10GBase-T device uses the PHY's internal temperature sensor to guard against over-temp conditions. In this scenario the PHY will be put in a low power mode and link will no longer be able to transmit or receive any data. When this occurs, the over-temp interrupt is latched and driver logs this error message. A HW reset or power cycle is required to clear this status. Signed-off-by: NMallikarjuna R Chilakala <mallikarjuna.chilakala@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 14 5月, 2010 1 次提交
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由 Mallikarjuna R Chilakala 提交于
Some of the following MAC functions are moved from 82598 & 82599 specific hardware files to common.[ch] to accommodate new silicon changes. Also fixed some white space issues * get_san_mac_addr, check_link, set_vmdq, clear_vmdq, clear_vfta, * set_vfta, fc_enable, init_uta_tables Signed-off-by: NMallikarjuna R Chilakala <mallikarjuna.chilakala@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 16 2月, 2010 1 次提交
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由 Don Skidmore 提交于
The 82598 has an erratum that receipt of pause frames at 1G could lead to a Tx Hang. To avoid this this patch disables Rx FC while at 1G speed for all 82598 parts. Signed-off-by: NDon Skidmore <donald.c.skidmore@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 14 1月, 2010 1 次提交
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由 Shannon Nelson 提交于
Signed-off-by: NShannon Nelson <shannon.nelson@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 16 12月, 2009 1 次提交
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由 Mallikarjuna R Chilakala 提交于
Modified patch with Dave's comments to replace mdelay with proper msleep. Fix 82598 copper link issue, where the phy prematurely indicates link before it is ready to process packets. The new function looks for phy link and indicates that, when it is available. If phy is not ready within few seconds of MAC indicating link, the function will return failure which translates to link down indication. Signed-off-by: NMallikarjuna R Chilakala <mallikarjuna.chilakala@intel.com> Acked-by: NPeter P Waskiewicz Jr <peter.p.waskiewicz.jr@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 01 10月, 2009 1 次提交
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由 Peter P Waskiewicz Jr 提交于
Backplane flow control autonegotiation is currently broken for ixgbe devices. This patch fixes the flow control issues with clause 37 autoneg. Signed-off-by: NPeter P Waskiewicz Jr <peter.p.waskiewicz.jr@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 15 9月, 2009 1 次提交
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由 Peter P Waskiewicz Jr 提交于
Currently the media type detection for CX4 adapters lumps them into a type of fiber. This causes some strange fallout when firmware verification is done on the NIC, and certain fiber NIC rules get enforced incorrectly. This patch introduces a new media type for CX4, and puts both 82598 and 82599 CX4 adapters into this bucket. Signed-off-by: NPeter P Waskiewicz Jr <peter.p.waskiewicz.jr@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: NDon Skidmore <donald.c.skidmore@intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 02 9月, 2009 1 次提交
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由 Mallikarjuna R Chilakala 提交于
Link code cleanup: a number of redundant functions and MAC variables are cleaned up, with some functions being consolidated into a single-purpose code path. Removed following deprecated link functions and mac variables * ixgbe_setup_copper_link_speed_82598 * ixgbe_setup_mac_link_speed_multispeed_fiber * ixgbe_setup_mac_link_speed_82599 * mac.autoneg, mac.autoneg_succeeded, phy.autoneg_wait_to_complete Signed-off-by: NMallikarjuna R Chilakala <mallikarjuna.chilakala@intel.com> Acked-by: NPeter P Waskiewicz Jr <peter.p.waskiewicz.jr@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 27 8月, 2009 1 次提交
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由 Don Skidmore 提交于
We have some ~40 functions that were being called out with 'make namespacecheck'. This patch changes these functions to be static. Signed-off-by: NDon Skidmore <donald.c.skidmore@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 04 8月, 2009 1 次提交
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由 Mallikarjuna R Chilakala 提交于
The default completion timeout values for 82598 should be in the range of 50us to 50ms, however the hardware default for these parts is 500us to 1ms which is less than the 10ms recommended by the pcie spec. To address this we need to increase the value to either 10ms to 250ms for capability version 1 configuration, or 16ms to 55ms for version 2. Signed-off-by: NMallikarjuna R Chilakala <mallikarjuna.chilakala@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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