1. 08 10月, 2007 3 次提交
  2. 05 10月, 2007 8 次提交
  3. 04 10月, 2007 4 次提交
    • S
      [POWERPC] 8xx: Work around CPU15 erratum. · 74016852
      Scott Wood 提交于
      The CPU15 erratum on MPC8xx chips can cause incorrect code execution
      under certain circumstances, where there is a conditional or indirect
      branch in the last word of a page, with a target in the last cache line
      of the next page.  This patch implements one of the suggested
      workarounds, by forcing a TLB miss whenever execution crosses a page
      boundary.  This is done by invalidating the pages before and after the
      one being loaded into the TLB in the ITLB miss handler.
      Signed-off-by: NScott Wood <scottwood@freescale.com>
      Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
      74016852
    • S
      [POWERPC] 8xx: Infrastructure code cleanup. · fb533d0c
      Scott Wood 提交于
      1. Keep a global mpc8xx_immr mapping, rather than constantly
      creating temporary mappings.
      2. Look for new fsl,cpm1 and fsl,cpm1-pic names.
      3. Always reset the CPM when not using the udbg console;
      this is required in case the firmware initialized a device
      that is incompatible with one that the kernel is about to
      use.
      4. Remove some superfluous casts and header includes.
      5. Change a usage of IMAP_ADDR to get_immrbase().
      6. Use phys_addr_t, not uint, for dpram_pbase.
      7. Various sparse-related fixes, such as __iomem annotations.
      8. Remove mpc8xx_show_cpuinfo, which doesn't provide anything
      useful beyond the generic cpuinfo handler.
      9. Move prototypes for 8xx support functions from board files
      to sysdev/commproc.h.
      Signed-off-by: NScott Wood <scottwood@freescale.com>
      Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
      fb533d0c
    • S
      [POWERPC] Add early debug console for CPM serial ports. · c374e00e
      Scott Wood 提交于
      This code assumes that the ports have been previously set up, with
      buffers in DPRAM.
      Signed-off-by: NScott Wood <scottwood@freescale.com>
      Acked-by: NDavid Gibson <david@gibson.dropbear.id.au>
      Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
      c374e00e
    • S
      [POWERPC] Introduce new CPM device bindings. · e631ae3b
      Scott Wood 提交于
      This introduces a new device binding for the CPM and other devices on
      these boards.  Some of the changes include:
      
      1. Proper namespace scoping for Freescale compatibles and properties.
      
      2. Use compatible rather than things like device_type and model
      to determine which particular variant of a device is present.
      
      3. Give the drivers the relevant CPM command word directly, rather than
      requiring it to have a lookup table based on device-id, SCC v. SMC, and
      CPM version.
      
      4. Specify the CPCR and the usable DPRAM region in the CPM's reg property.
      
      Boards that do not require the legacy bindings should select
      CONFIG_PPC_CPM_NEW_BINDING to enable the of_platform CPM devices. Once
      all existing boards are converted and tested, the config option can
      become default y to prevent new boards from using the old model.  Once
      arch/ppc is gone, the config option can be removed altogether.
      Signed-off-by: NScott Wood <scottwood@freescale.com>
      Acked-by: NDavid Gibson <david@gibson.dropbear.id.au>
      Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
      e631ae3b
  4. 03 10月, 2007 15 次提交
  5. 02 10月, 2007 2 次提交
    • L
      [POWERPC] pseries: device node status can be "ok" or "okay" · a7fb7ea7
      Linas Vepstas 提交于
      It seems that some versions of firmware will report a device
      node status as the string "okay". As we are not expecting this
      string, the device node will be ignored by the EEH subsystem.
      Which means EEH will not be enabled.
      
      When EEH is not enabled, PCI errors will be converted into
      Machine Check exceptions, and we'll have a very unhappy system.
      Signed-off-by: NLinas Vepstas <linas@austin.ibm.com>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      a7fb7ea7
    • A
      [POWERPC] Fix xics set_affinity code · e48395f1
      Anton Blanchard 提交于
      On a POWER6 machine running 2.6.23-rc8 I sometimes see the following error:
      
      xics_set_affinity: No online cpus in the mask 00000000,00000000,00000000,00000001 for irq 20
      
      In a desperate attempt to get a changelog entry in 2.6.23, I took a look
      into it.
      
      It turns out we are passing a real and not a virtual irq into
      get_irq_server.  This works for the case where hwirq < NR_IRQS and we
      set virq = hwirq.  In my case however hwirq = 590082 and we try and
      access irq_desc[590082], slightly past the end at 512 entries.
      
      Lucky we ship lots of memory with our machines.
      Signed-off-by: NAnton Blanchard <anton@samba.org>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      e48395f1
  6. 28 9月, 2007 1 次提交
  7. 26 9月, 2007 1 次提交
  8. 22 9月, 2007 5 次提交
  9. 19 9月, 2007 1 次提交