1. 27 9月, 2006 14 次提交
    • G
      SHPCHP: fix __must_check warnings · e1b95dc6
      Greg Kroah-Hartman 提交于
      Cc: Kristen Carlson Accardi <kristen.c.accardi@intel.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      e1b95dc6
    • Z
      PCI-Express AER implemetation: pcie_portdrv error handler · 4bf3392e
      Zhang, Yanmin 提交于
      Patch 4 implements error handlers for pcie_portdrv.
      Signed-off-by: NZhang Yanmin <yanmin.zhang@intel.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      4bf3392e
    • Z
      PCI-Express AER implemetation: AER core and aerdriver · 6c2b374d
      Zhang, Yanmin 提交于
      Patch 3 implements the core part of PCI-Express AER and aerdrv
      port service driver.
      
      When a root port service device is probed, the aerdrv will call
      request_irq to register irq handler for AER error interrupt.
      
      When a device sends an PCI-Express error message to the root port,
      the root port will trigger an interrupt, by either MSI or IO-APIC,
      then kernel would run the irq handler. The handler collects root
      error status register and schedules a work. The work will call
      the core part to process the error based on its type
      (Correctable/non-fatal/fatal).
      
      As for Correctable errors, the patch chooses to just clear the correctable
      error status register of the device.
      
      As for the non-fatal error, the patch follows generic PCI error handler
      rules to call the error callback functions of the endpoint's driver. If
      the device is a bridge, the patch chooses to broadcast the error to
      downstream devices.
      
      As for the fatal error, the patch resets the pci-express link and
      follows generic PCI error handler rules to call the error callback
      functions of the endpoint's driver. If the device is a bridge, the patch
      chooses to broadcast the error to downstream devices.
      Signed-off-by: NZhang Yanmin <yanmin.zhang@intel.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      6c2b374d
    • Z
      PCI-Express AER implemetation: export pcie_port_bus_type · 48408157
      Zhang, Yanmin 提交于
      Patch 2 exports pcie_port_bus_type.
      Signed-off-by: NZhang Yanmin <yanmin.zhang@intel.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      48408157
    • Z
      PCI-Express AER implemetation: aer howto document · 47402400
      Zhang, Yanmin 提交于
      PCI-Express AER (Advanced Error Reporting) provides more robust error reporting.
      The series of patches enable kernel support to AER.
      
      The initial patches were written by Tom Long Nguyen. I ported them to the kernel
      2.6.18-rc3. Many thanks to Rajesh Shah and Narayanan Chandramouli for their great
      review comments and testing help.
      
      Patch 1 consists of the pciaer-howto.txt document.
      Signed-off-by: NZhang Yanmin <yanmin.zhang@intel.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      
      47402400
    • R
      PCIE: check and return bus_register errors · 20d51660
      Randy Dunlap 提交于
      Have pcie_port_bus_register() notice and return errors.
      Mark it __must_check so that its caller(s) must check its return value.
      Signed-off-by: NRandy Dunlap <rdunlap@xenotime.net>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      20d51660
    • B
      MSI: Blacklist PCI-E chipsets depending on Hypertransport MSI capability · 6397c75c
      Brice Goglin 提交于
      Introduce msi_ht_cap_enabled() to check the MSI capability in the
      Hypertransport configuration space.
      It is used in a generic quirk quirk_msi_ht_cap() to check whether
      MSI is enabled on hypertransport chipset, and a nVidia specific quirk
      quirk_nvidia_ck804_msi_ht_cap() where two 2 HT MSI mappings have to
      be checked.
      Both quirks set the PCI_BUS_FLAGS_NO_MSI bus flag when MSI is disabled.
      Signed-off-by: NBrice Goglin <brice@myri.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      6397c75c
    • B
      MSI: Rename PCI_CAP_ID_HT_IRQCONF into PCI_CAP_ID_HT · 46ff3463
      Brice Goglin 提交于
      0x08 is the HT capability, while PCI_CAP_ID_HT_IRQCONF would be
      the subtype 0x80 that mpic_scan_ht_pic() uses.
      Rename PCI_CAP_ID_HT_IRQCONF into PCI_CAP_ID_HT.
      
      And by the way, use it in the ipath driver instead of defining its
      own HT_CAPABILITY_ID.
      Signed-off-by: NBrice Goglin <brice@myri.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      46ff3463
    • B
      MSI: Export the PCI_BUS_FLAGS_NO_MSI flag in sysfs · fe97064c
      Brice Goglin 提交于
      Export the PCI_BUS_FLAGS_NO_MSI flag of a PCI bus in the sysfs files
      of its parent device and make it writable. Could be used to:
      * disable MSI on a device which has not been blacklisted yet
      * allow MSI when some setpci hacks enable MSI support (for instance
        on the ServerWorks HT2000 chipset where the MSI HT cap is disabled
        by default).
      Architecture where some bus have no parent chipset cannot use this
      strategy to change MSI support.
      
      If the chipset does not have a subordinate bus, its 'bus_msi' file
      is empty.
      
      Also document and warn about the possible danger of changing the flag.
      Signed-off-by: NBrice Goglin <brice@myri.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      fe97064c
    • B
      MSI: Factorize common code in pci_msi_supported() · 24334a12
      Brice Goglin 提交于
      pci_enable_msi() and pci_enable_msix() use the same code to detect
      whether MSI might be enabled on this device. Factorize this code in
      pci_msi_supported(). And improve the documentation about the fact
      that only the root chipset must support MSI, but it is hard to
      find the root bus so we check all parent busses MSI flags.
      Signed-off-by: NBrice Goglin <brice@myri.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      24334a12
    • B
      MSI: Cleanup existing MSI quirks · 3f79e107
      Brice Goglin 提交于
      Move MSI quirks in CONFIG_PCI_MSI, document why the serverworks quirk
      does not simply set PCI_BUS_FLAGS_NO_MSI, and create a generic quirk
      for other chipsets where setting PCI_BUS_FLAGS_NO_MSI is fine.
      Signed-off-by: NBrice Goglin <brice@myri.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      3f79e107
    • M
      Resources: insert identical resources above existing resources · d33b6fba
      Matthew Wilcox 提交于
      If you have two resources which aree exactly the same size,
      insert_resource() currently inserts the new one below the existing one. 
      This is wrong because there's no way to insert a resource of the same size
      above an existing one.
      
      I took this opportunity to rewrite the initial loop to be a for-loop
      instead of a goto-loop and fix the documentation.
      Signed-off-by: NMatthew Wilcox <matthew@wil.cx>
      Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru>
      Cc: Dominik Brodowski <linux@dominikbrodowski.net>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      d33b6fba
    • L
      Merge branch 'for-linus' of git://one.firstfloor.org/home/andi/git/linux-2.6 · b2782408
      Linus Torvalds 提交于
      * 'for-linus' of git://one.firstfloor.org/home/andi/git/linux-2.6: (225 commits)
        [PATCH] Don't set calgary iommu as default y
        [PATCH] i386/x86-64: New Intel feature flags
        [PATCH] x86: Add a cumulative thermal throttle event counter.
        [PATCH] i386: Make the jiffies compares use the 64bit safe macros.
        [PATCH] x86: Refactor thermal throttle processing
        [PATCH] Add 64bit jiffies compares (for use with get_jiffies_64)
        [PATCH] Fix unwinder warning in traps.c
        [PATCH] x86: Allow disabling early pci scans with pci=noearly or disallowing conf1
        [PATCH] x86: Move direct PCI scanning functions out of line
        [PATCH] i386/x86-64: Make all early PCI scans dependent on CONFIG_PCI
        [PATCH] Don't leak NT bit into next task
        [PATCH] i386/x86-64: Work around gcc bug with noreturn functions in unwinder
        [PATCH] Fix some broken white space in ia32_signal.c
        [PATCH] Initialize argument registers for 32bit signal handlers.
        [PATCH] Remove all traces of signal number conversion
        [PATCH] Don't synchronize time reading on single core AMD systems
        [PATCH] Remove outdated comment in x86-64 mmconfig code
        [PATCH] Use string instructions for Core2 copy/clear
        [PATCH] x86: - restore i8259A eoi status on resume
        [PATCH] i386: Split multi-line printk in oops output.
        ...
      b2782408
    • L
      Merge master.kernel.org:/pub/scm/linux/kernel/git/gregkh/driver-2.6 · dd77a4ee
      Linus Torvalds 提交于
      * master.kernel.org:/pub/scm/linux/kernel/git/gregkh/driver-2.6: (47 commits)
        Driver core: Don't call put methods while holding a spinlock
        Driver core: Remove unneeded routines from driver core
        Driver core: Fix potential deadlock in driver core
        PCI: enable driver multi-threaded probe
        Driver Core: add ability for drivers to do a threaded probe
        sysfs: add proper sysfs_init() prototype
        drivers/base: check errors
        drivers/base: Platform notify needs to occur before drivers attach to the device
        v4l-dev2: handle __must_check
        add CONFIG_ENABLE_MUST_CHECK
        add __must_check to device management code
        Driver core: fixed add_bind_files() definition
        Driver core: fix comments in drivers/base/power/resume.c
        sysfs_remove_bin_file: no return value, dump_stack on error
        kobject: must_check fixes
        Driver core: add ability for devices to create and remove bin files
        Class: add support for class interfaces for devices
        Driver core: create devices/virtual/ tree
        Driver core: add device_rename function
        Driver core: add ability for classes to handle devices properly
        ...
      dd77a4ee
  2. 26 9月, 2006 26 次提交