1. 13 1月, 2018 3 次提交
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      ARM: dts: Update ti-sysc data for existing users · e14d7e53
      Tony Lindgren 提交于
      Let's update the existing users with features and clock data as
      specified in the binding. This is currently the smartreflex for most
      part, and also few omap4 modules with no child device driver like
      mcasp, abe iss and gfx.
      
      Note that we had few mistakes that did not get noticed as we're still
      probing the SmartReflex driver with legacy platform data and using
      "ti,hwmods" legacy property for ti-sysc driver.
      
      So let's fix the omap4 and dra7 smartreflex registers as there is no
      no revision register.
      
      And on omap4, the mcasp module has a revision register according to
      the TRM.
      
      And for omap34xx we need a different configuration compared to 36xx.
      And the smartreflex on 3517 we've always kept disabled so let's
      remove any references to it.
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      e14d7e53
    • T
      ARM: dts: Fix smartreflex compatible for omap3 shared mpu-iva instance · 7d9bfdac
      Tony Lindgren 提交于
      The smartreflex instance for mpu and iva is shared. Let's fix this as I've
      already gotten confused myself few times wondering where the mpu instance
      is. Note that we are still probing the driver using platform data so this
      change is safe to do.
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      7d9bfdac
    • T
      Merge commit '20a2742e' into omap-for-v4.16/dt-clk · bcc8d312
      Tony Lindgren 提交于
      bcc8d312
  2. 16 12月, 2017 1 次提交
    • T
      dt-bindings: ti-sysc: Update binding for timers and capabilities · 20a2742e
      Tony Lindgren 提交于
      The ti-sysc binding does not yet describe the capabilities of the
      interconnect target module. So to make the ti-sysc binding usable
      for configuring the interconnect target module, we need to add few
      more properties:
      
      1. To detect between omap2 and omap4 timers, let's add compatibles
         for them for "ti,sysc-omap2-timer" and,sysc-omap4-timer". This
         makes it easier to pick up the already initialized system timers
         later on
      
      2. Let's add "ti,sysc-mask" for a mask of features supported by the
         interconnect target module. This describes what we have available
         in the various SYSCONFIG registers
      
      3. Let's add "ti,sysc-midle" and "ti,sysc-sidle" lists for the master
         and slave idle modes supported by the interconnect target module.
         These describe the values available for MIDLE and SIDLE bits in
         the SYSCONFIG registers
      
      4. Some interconnect target modules need a short delay after reset
         before they can be accessed, let's use "ti,sysc-delay-us" for
         that
      
      5. Let's add "ti,syss-mask" bit to describe the optional SYSSTATUS
         register bits for reset done bits
      
      6. Let's support the two existing custom quirk properties already
         listed in Documentation/devicetree/bindings/arm/omap/omap.txt for
         "ti,no-reset-on-init" and "ti,no-idle-on-init"
      
      7. And finally, let's add a header for the binding for the dts
         files and the driver to use
      
      Cc: Benoît Cousson <bcousson@baylibre.com>
      Cc: Dave Gerlach <d-gerlach@ti.com>
      Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
      Cc: Liam Girdwood <lgirdwood@gmail.com>
      Cc: Mark Brown <broonie@kernel.org>
      Cc: Mark Rutland <mark.rutland@arm.com>
      Cc: Mauro Carvalho Chehab <mchehab@kernel.org>
      Cc: Nishanth Menon <nm@ti.com>
      Cc: Matthijs van Duin <matthijsvanduin@gmail.com>
      Cc: Paul Walmsley <paul@pwsan.com>
      Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
      Cc: Sakari Ailus <sakari.ailus@iki.fi>
      Cc: Suman Anna <s-anna@ti.com>
      Cc: Tero Kristo <t-kristo@ti.com>
      Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
      Reviewed-by: NRob Herring <robh@kernel.org>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      20a2742e
  3. 12 12月, 2017 21 次提交
  4. 11 12月, 2017 3 次提交
  5. 04 12月, 2017 7 次提交
  6. 01 12月, 2017 5 次提交