This driver does not do anything special in module init/exit. This patch
eliminates the module init/exit boilerplate code by utilizing the
module_isa_driver macro.
Signed-off-by: NWilliam Breathitt Gray <vilhelm.gray@gmail.com>
[wsa: remove two empty lines while here]
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

This driver does not do anything special in module init/exit. This patch
eliminates the module init/exit boilerplate code by utilizing the
module_isa_driver macro.
Signed-off-by: NWilliam Breathitt Gray <vilhelm.gray@gmail.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Simply sort header block alphabetically.

While here fix an indentation in one place and update a copyright line for
Intel.
Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: NJarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

This patch enables I2C controllers found on Intel Edison board.
Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: NJarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

On some platforms, such as Intel Medfield, the I2C slave devices are enumerated
through SFI tables where bus numbering is expected to be defined in the OS.
Make the bus number allocation robust for such platforms.
Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: NJarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

I believe i2c-designware-baytrail.c doesn't have strict dependency that
Intel SoC IOSF Sideband support must be always built-in in order to be
able to compile support for Intel Baytrail I2C bus sharing HW semaphore.

Redefine build dependencies so that CONFIG_IOSF_MBI=y is required only
when CONFIG_I2C_DESIGNWARE_PLATFORM is built-in.
Signed-off-by: NJarkko Nikula <jarkko.nikula@linux.intel.com>
Acked-by: NDavid Box <david.e.box@linux.intel.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

This allows applications to set the transfer timeout in 10ms increments via
ioctl I2C_TIMEOUT.
Signed-off-by: NWeifeng Voon <weifeng.voon@intel.com>
Acked-by: NJarkko Nikula <jarkko.nikula@linux.intel.com>
Acked-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

qup_i2c_issue_read() derives the address from i2c_msg.
This called in the read path when I2C_M_RD flag is set.
Therefore, use the 8 bit address helper function.
Signed-off-by: NNaveen Kaje <nkaje@codeaurora.org>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Among the bus errors reported from the QUP_MASTER_STATUS register
only NACK is considered and transfer gets suspended, while
other errors are ignored. Correct this and suspend the transfer
for other errors as well. This avoids unnecessary 'timeouts' which
happens when waiting for events that would never happen when there
is already an error condition on the bus. Also the error handling
procedure should be the same for both NACK and other bus errors in
case of dma mode. So correct that as well.
Signed-off-by: NSricharan R <sricharan@codeaurora.org>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

With CONFIG_DEBUG_SG is enabled and when dma mode is used, below dump is seen,

------------[ cut here ]------------
kernel BUG at include/linux/scatterlist.h:140!
Internal error: Oops - BUG: 0 [#1] PREEMPT SMP
Modules linked in:
CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.4.0-00459-g9f087b9-dirty #7
Hardware name: Qualcomm Technologies, Inc. APQ 8016 SBC (DT)
task: ffffffc036868000 ti: ffffffc036870000 task.ti: ffffffc036870000
PC is at qup_sg_set_buf.isra.13+0x138/0x154
LR is at qup_sg_set_buf.isra.13+0x50/0x154
pc : [<ffffffc0005a0ed8>] lr : [<ffffffc0005a0df0>] pstate: 60000145
sp : ffffffc0368735c0
x29: ffffffc0368735c0 x28: ffffffc036873752
x27: ffffffc035233018 x26: ffffffc000c4e000
x25: 0000000000000000 x24: 0000000000000004
x23: 0000000000000000 x22: ffffffc035233668
x21: ffffff80004e3000 x20: ffffffc0352e0018
x19: 0000004000000000 x18: 0000000000000028
x17: 0000000000000004 x16: ffffffc0017a39c8
x15: 0000000000001cdf x14: ffffffc0019929d8
x13: ffffffc0352e0018 x12: 0000000000000000
x11: 0000000000000001 x10: 0000000000000001
x9 : ffffffc0012b2d70 x8 : ffffff80004e3000
x7 : 0000000000000018 x6 : 0000000030000000
x5 : ffffffc00199f018 x4 : ffffffc035233018
x3 : 0000000000000004 x2 : 00000000c0000000
x1 : 0000000000000003 x0 : 0000000000000000

Process swapper/0 (pid: 1, stack limit = 0xffffffc036870020)
Stack: (0xffffffc0368735c0 to 0xffffffc036874000)

sg_set_bug expects that the buf parameter passed in should be from
lowmem and a valid pageframe. This is not true for pages from
dma_alloc_coherent which can be carveouts, hence the check fails.
Change allocation of sg buffers from dma_coherent memory to kzalloc
to fix the issue. Note that now dma_map/unmap is used to make the
kzalloc'ed buffers coherent before passing it to the dmaengine.
Signed-off-by: NSricharan R <sricharan@codeaurora.org>
Reviewed-by: NAndy Gross <andy.gross@linaro.org>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Implement fast mode plus that allows bus speeds of up to 1MHz.
Signed-off-by: NDavid Wu <david.wu@rock-chips.com>
Reviewed-by: NDouglas Anderson <dianders@chromium.org>
Tested-by: NCaesar Wang <wxt@rock-chips.com>
Reviewed-by: NHeiko Stuebner <heiko@sntech.de>
Tested-by: NHeiko Stuebner <heiko@sntech.de>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

- new method to caculate i2c timings for rk3399:
  There was an timing issue about "repeated start" time at the I2C
  controller of version0, controller appears to drop SDA at .875x (7/8)
  programmed clk high. On version 1 of the controller, the rule(.875x)
  isn't enough to meet tSU;STA
  requirements on 100k's Standard-mode. To resolve this issue,
  sda_update_config, start_setup_config and stop_setup_config for I2C
  timing information are added, new rules are designed to calculate
  the timing information at new v1.
- pclk and function clk are separated at rk3399
Signed-off-by: NDavid Wu <david.wu@rock-chips.com>
Tested-by: NCaesar Wang <wxt@rock-chips.com>
Tested-by: NHeiko Stuebner <heiko@sntech.de>
Reviewed-by: NDouglas Anderson <dianders@chromium.org>
[wsa: fixed whitespace issue]
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

The i2c timing specs are really just constant data. There's no reason
to write code to init them, so move them out to structures. This not
only is a cleaner solution but it will reduce code duplication when we
introduce a new variant of rk3x_i2c_calc_divs() in a future patch.
Signed-off-by: NDavid Wu <david.wu@rock-chips.com>
Suggested-by: NDouglas Anderson <dianders@chromium.org>
Reviewed-by: NDouglas Anderson <dianders@chromium.org>
Tested-by: NHeiko Stuebner <heiko@sntech.de>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Specifying the i2c SoC data in an array provides very little benefit and
gets unwieldly / confusing as the array grows since the next bit of code
needs to refer to elements in the array by their raw integral index.

Let's just create a single 'static const' structure for each SoC so that
we can refer to these structures by ID.
Signed-off-by: NDavid Wu <david.wu@rock-chips.com>
Reviewed-by: NHeiko Stuebner <heiko@sntech.de>
Suggested-by: NDouglas Anderson <dianders@chromium.org>
Reviewed-by: NDouglas Anderson <dianders@chromium.org>
Tested-by: NHeiko Stuebner <heiko@sntech.de>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

rk3x_i2c_setup() gets called directly before rk3x_i2c_start(),
and the last thing in setup was to clean the IPD, so no reason
to do it at the beginning of start.
Signed-off-by: NDavid Wu <david.wu@rock-chips.com>
Reviewed-by: NDouglas Anderson <dianders@chromium.org>
Reviewed-by: NHeiko Stuebner <heiko@sntech.de>
Tested-by: NHeiko Stuebner <heiko@sntech.de>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

The "div_high" and "div_low" values are always used together.
Group them into a structure to make it easier to pass them
both around. This structure also provides a place for future
calculated timings.
Signed-off-by: NDavid Wu <david.wu@rock-chips.com>
Reviewed-by: NDouglas Anderson <dianders@chromium.org>
Tested-by: NHeiko Stuebner <heiko@sntech.de>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Add kernel-doc documentation for the elements of the previously
undocumented struct rk3x_i2c.
Signed-off-by: NDavid Wu <david.wu@rock-chips.com>
Reviewed-by: NDouglas Anderson <dianders@chromium.org>
Reviewed-by: NHeiko Stuebner <heiko@sntech.de>
Tested-by: NHeiko Stuebner <heiko@sntech.de>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

osif_table is never modified, so declare it as const.
Signed-off-by: NAxel Lin <axel.lin@ingics.com>
Acked-by: NAndrew Lunn <andrew@lunn.ch>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

David reported that the length for memset was incorrect (element sizes
were not taken into account). Then I saw that we are clearing kzalloced
memory, so we can simply drop this code.
Reported-by: NDavid Binderman <dcb314@hotmail.com>
Reviewed-by: NAxel Lin <axel.lin@ingics.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

The interrupt handling code makes it look like several status values
may be merged together before being processed, while this will never
happen. Change from bit-wise OR to simple assignment to make it more
obvious and avoid misunderstanding.
Signed-off-by: NJean Delvare <jdelvare@suse.de>
Reviewed-by: NMika Westerberg <mika.westerberg@linux.intel.com>
Reviewed-by: NDaniel Kurtz <djkurtz@chromium.org>
Reviewed-by: NBenjamin Tissoires <benjamin.tissoires@redhat.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Remove the warning about a too long SMBUS message because
the ipmi_ssif driver triggers this warning too frequently so it
spams the message log.
Signed-off-by: NJan Glauber <jglauber@cavium.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

During receive the controller requires the AAK flag for all
bytes but the final one. This was wrong in case of I2C_M_RECV_LEN,
where the decision if the final byte is to be transmitted
happened before adding the additional received length byte.

Set the AAK flag if additional bytes are to be received.
Signed-off-by: NJan Glauber <jglauber@cavium.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Many Intel systems the BIOS declares a SystemIO OpRegion below the SMBus
PCI device as can be seen in ACPI DSDT table from Lenovo Yoga 900:

  Device (SBUS)
  {
      OperationRegion (SMBI, SystemIO, (SBAR << 0x05), 0x10)
      Field (SMBI, ByteAcc, NoLock, Preserve)
      {
          HSTS,   8,
          Offset (0x02),
          HCON,   8,
          HCOM,   8,
          TXSA,   8,
          DAT0,   8,
          DAT1,   8,
          HBDR,   8,
          PECR,   8,
          RXSA,   8,
          SDAT,   16
      }

There are also bunch of AML methods that that the BIOS can use to access
these fields. Most of the systems in question AML methods accessing the
SMBI OpRegion are never used.

Now, because of this SMBI OpRegion many systems fail to load the SMBus
driver with an error looking like one below:

  ACPI Warning: SystemIO range 0x0000000000003040-0x000000000000305F
       conflicts with OpRegion 0x0000000000003040-0x000000000000304F
       (\_SB.PCI0.SBUS.SMBI) (20160108/utaddress-255)
  ACPI: If an ACPI driver is available for this device, you should use
       it instead of the native driver

The reason is that this SMBI OpRegion conflicts with the PCI BAR used by
the SMBus driver.

It turns out that we can install a custom SystemIO address space handler
for the SMBus device to intercept all accesses through that OpRegion. This
allows us to share the PCI BAR with the AML code if it for some reason is
using it. We do not expect that this OpRegion handler will ever be called
but if it is we print a warning and prevent all access from the SMBus
driver itself.

Link: https://bugzilla.kernel.org/show_bug.cgi?id=110041Reported-by: NAndy Lutomirski <luto@kernel.org>
Reported-by: NPali Rohár <pali.rohar@gmail.com>
Suggested-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com>
Acked-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
Reviewed-by: NJean Delvare <jdelvare@suse.de>
Reviewed-by: NBenjamin Tissoires <benjamin.tissoires@redhat.com>
Tested-by: NPali Rohár <pali.rohar@gmail.com>
Tested-by: NJean Delvare <jdelvare@suse.de>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
Cc: stable@vger.kernel.org

The ARCH name was changed during the review process of the mach, and
this driver was forgotten to be converted. Fix it now.
http://article.gmane.org/gmane.linux.ports.arm.kernel/456331Signed-off-by: NMarc Gonzalez <marc_gonzalez@sigmadesigns.com>
[wsa: updated commit message slightly]
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

When the DMA configuration fails, there is a log reporting that we can't
use DMA and indicating the error number. When booting the kernel, it is
annoying to see this error number. Moreover, people can think something
is going wrong. It is not the case, it means that DMA can't be used but
it doesn't prevent to use i2c.
Signed-off-by: NLudovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

If NO_DMA=y:

    drivers/built-in.o: In function `rcar_i2c_dma_unmap':
    i2c-rcar.c:(.text+0x6f06c6): undefined reference to `bad_dma_ops'
    drivers/built-in.o: In function `rcar_i2c_dma':
    i2c-rcar.c:(.text+0x6f07e2): undefined reference to `bad_dma_ops'
    i2c-rcar.c:(.text+0x6f0838): undefined reference to `bad_dma_ops'

Add a dependency on HAS_DMA to fix this.
Signed-off-by: NGeert Uytterhoeven <geert@linux-m68k.org>
Acked-by: NNiklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

New drivers should not use dma_request_slave_channel_reason() but
dma_request_chan(). The former is a macro to the later so this change do
not effect the driver in any way.
Reported-by: NArnd Bergmann <arnd@arndb.de>
Signed-off-by: NNiklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Make it possible to transfer i2c message buffers via DMA.
Start/Stop/Sending_Slave_Address and some data is still handled using
the old state machine, it is sending the bulk of the data that is done
via DMA.

The first byte of a transmission and the last two bytes of reception are
sent/received using PIO. This is needed for the HW to have access to the
first byte before DMA transmit and to be able to set the STOP condition
for DMA reception.
Signed-off-by: NNiklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Acked-by: NRob Herring <robh@kernel.org>
Tested-by: NWolfram Sang <wsa+renesas@sang-engineering.com>
[wsa: fixed a checkpatch warning]
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

>From I2C specifications:
      http://www.nxp.com/documents/user_manual/UM10204.pdf

Chapter 3.1.16, when the i2c device held the SDA line low, the master
should send 9 clocks pulses to try to recover.
Signed-off-by: NFrederic Pillon <frederic.pillon@st.com>
Signed-off-by: NPeter Griffin <peter.griffin@linaro.org>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Disable clock before returning error in tegra_i2c_init() as its leaves
i2c clock ON in case of error and never turns off again as it will have
unbalanced clock enable/disable
Signed-off-by: NShardar Shariff Md <smohammed@nvidia.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Just in case.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

When clock support was added to the i2c-mv64xxx, not all clk functions
had stubs when for !CONFIG_HAVE_CLK configurations. However, nowadays,
both "struct clk" and all the clock framework functions have stubs
when CONFIG_HAVE_CLK is not enabled, so it no longer makes sense to
carry such compile-time conditionals in the driver.

This commit was compile tested on both ARM64 (which has both
CONFIG_OF=y and CONFIG_HAVE_CLK=y) and PowerPC c2k_defconfig (which
has CONFIG_OF=y, CONFIG_HAVE_CLK disabled, and the i2c-mv64xxx driver
enabled).

The only non-trivial change is in the mv64xxx_of_config() function,
which was returning -ENODEV unconditionally if CONFIG_HAVE_CLK was
disabled. Simply removing this condition works fine because the first
test done by the function is to verify if drv_data->clk points to a
valid clock, and if it doesn't, we return -ENODEV. When
CONFIG_HAVE_CLK is disabled, devm_clk_get() unconditionally returns
NULL, so mv64xxx_of_config() will return -ENODEV when no clock is
provided, which is the intended behavior.
Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Instead of separately calling clk_prepare()/clk_enable(), use
clk_prepare_enable(), and instead of calling
clk_disable()/clk_unprepare(), use clk_disable_unprepare(). Those
handy shortcuts have been introduced specifically to simplify the
numerous call sites were both functions were called in sequence.
Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

If a clock is registered by a platform driver and not by the
OF_CLK_DECLARE() mechanism, it might show up after the first attempt
to probe i2c-mv64xxx. In order to solve this, we need to handle
-EPROBE_PREFER as a special return value of devm_clk_get(), and return
the same error code from probe().

This gives us three situations:

 - There is no reference to a clock in the DT. In this case,
   devm_clk_get() returns an error that is not -EPROBE_DEFER
   (something like -ENODEV), and we continue the probing without
   enabling the clock.

 - There is a reference to the clock in the DT, and the clock is
   ready. devm_clk_get() returns a valid reference to the clock, and
   we prepare/enable it.

 - There is a reference to the clock in the DT, but the clock is not
   ready. devm_clk_get() returns -EPROBE_DEFER, and we exit from
   probe() with the same error code so that probe() is tried again
   later.

This is needed for Marvell Armada 7K/8K, where the clock driver is a
platform driver.
Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

The new ARM64 Marvell Armada 7K/8K SoC family is using the same I2C
controller as the 32-bits Marvell EBU SoCs, so this commit allows
mv64xxx to be enabled when ARCH_MVEBU=y.
Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

CN3860 does not interrupt the CPU when the i2c status changes. If
we get a timeout, and see the status has in fact changed, we know we
have this problem, and drop back to polling.
Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com>
Signed-off-by: NJan Glauber <jglauber@cavium.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

The IS_ENABLED() macro checks if a Kconfig symbol has been enabled either
built-in or as a module, use that macro instead of open coding the same.
Signed-off-by: NJavier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Documentation/timers/timers-howto.txt recommends to use
usleep_range on delays > 10usec. According to my test results
with Neonode zForce touchscreen driver, usleep_range indeed
reduces CPU load.

Stats collected with "./perf record -a -g -F 1000 sleep 10"

i2c-imx with udelay(50):
34.19% 0.00% irq/220-Neonode [kernel.kallsyms] [k] irq_thread
    ---irq_thread
       |--33.75%--irq_thread_fn
       |    |--19.27%--0x7f08a878
       |    |     i2c_master_recv
       |    |     i2c_transfer
       |    |     __i2c_transfer
       |    |     i2c_imx_xfer
       |    |     |--11.71%--i2c_imx_trx_complete
       |    |     |--5.70%--i2c_imx_start <<<<----------------
       |    |     |     |--5.38%--__timer_const_udelay
       |    |     |     |      __timer_delay
       |    |     |     |      --5.07%--read_current_timer

i2c-imx with usleep_range(50,100)
29.08% 0.00% irq/220-Neonode  [kernel.kallsyms] [k] irq_thread
    ---irq_thread
       |--28.89%--irq_thread_fn
       |    |--17.21%--0x7f08a878
       |    |     i2c_master_recv
       |    |     |--17.14%--i2c_transfer
       |    |     |     __i2c_transfer
       |    |     |     i2c_imx_xfer
       |    |     |     |--14.29%--i2c_imx_trx_complete
       |    |     |     |--1.42%--i2c_imx_start <<<<----------
       |    |     |     |      |--0.71%--usleep_range
       |    |     |     |      |--0.53%--i2c_imx_bus_busy
Signed-off-by: NOleksij Rempel <linux@rempel-privat.de>
Signed-off-by: NDirk Behme <dirk.behme@de.bosch.com>
Reviewed-by: NVladimir Zapolskiy <vladimir_zapolskiy@mentor.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

There is a race between the TWSI interrupt and the condition
that is required before proceeding:

Low-level: interrupt flag bit must be set
High-level controller: valid bit must be clear

If the interrupt comes too early and the condition is not met
the wait will time out, and the transfer is aborted leading
to very poor performance.

To avoid this race retry for the condition ~80 µs later.
The retry is avoided on the very first invocation of
wait_event_timeout() (which tests the condition before entering
the wait and is therefore always wrong in this case).

EEPROM reads on 100kHz i2c now measure ~5.2kB/s, about 1/2 what's
achievable, and much better than the worst-case 100 bytes/sec before.

While at it remove the debug print from the low-level wait function.
Signed-off-by: NPeter Swain <pswain@cavium.com>
Signed-off-by: NJan Glauber <jglauber@cavium.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Zero-length message support (SMBUS QUICK or i2c) never worked with
the Octeon hardware. Disable SMBUS QUICK support and bail out in
case of a zero-length i2c request.

After this change 'i2c-detect -q' will return an error on Octeon but
the previously reported results were wrong anyway.
Signed-off-by: NJan Glauber <jglauber@cavium.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>