1. 21 7月, 2011 1 次提交
    • P
      ath5k: merge ath5k_hw and ath5k_softc · e0d687bd
      Pavel Roskin 提交于
      Both ath5k_hw and ath5k_softc represent one instance of the hardware.
      This duplication is historical and is not needed anymore.
      
      Keep the name "ath5k_hw" for the merged structure and "ah" for the
      variable pointing to it.  "ath5k_hw" is shorter than "ath5k_softc", more
      descriptive and more widely used.
      
      Put the combined structure to ath5k.h where the old ath5k_softc used to
      be. Move some code from base.h to ath5k.h as needed.
      
      Remove memory allocation for struct ath5k_hw and the corresponding error
      handling.  Merge iobase and ah_iobase fields.
      Signed-off-by: NPavel Roskin <proski@gnu.org>
      Acked-by: NNick Kossifidis <mickflemm@gmail.com>
      Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
      e0d687bd
  2. 12 7月, 2011 1 次提交
  3. 08 7月, 2011 2 次提交
  4. 13 4月, 2011 2 次提交
  5. 31 3月, 2011 1 次提交
  6. 28 1月, 2011 1 次提交
  7. 01 12月, 2010 5 次提交
  8. 12 10月, 2010 1 次提交
  9. 29 9月, 2010 3 次提交
  10. 17 9月, 2010 1 次提交
  11. 26 8月, 2010 1 次提交
  12. 25 8月, 2010 1 次提交
  13. 17 8月, 2010 1 次提交
  14. 03 6月, 2010 1 次提交
  15. 17 4月, 2010 1 次提交
    • B
      ath5k/ath9k: Fix 64 bits TSF reads · 1c0fc65e
      Benoit Papillault 提交于
      According to tests, both TSF lower and upper registers kept counting, so
      the higher part could have been updated after the lower part has been
      read, as shown in the following log where the upper part is read first
      and the lower part next.
      
      tsf = {00000003-fffffffd}
      tsf = {00000003-00000001}
      tsf = {00000004-0000000b}
      
      This patch corrects this by checking that the upper part has not been
      changed while the lower part was read. It has been tested in an IBSS
      network where artifical IBSS merges have been done in order to trigger
      hundreds of rollover for the TSF lower part.
      
      It follows the logic mentionned by Derek, with only 2 register reads
      needed at each additional steps instead of 3 (the minimum number of
      register reads is still 3).
      Signed-off-by: NBenoit Papillault <benoit.papillault@free.fr>
      Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
      1c0fc65e
  16. 15 4月, 2010 1 次提交
  17. 08 4月, 2010 1 次提交
    • B
      ath5k: Adaptive Noise Immunity (ANI) Implementation · 2111ac0d
      Bruno Randolf 提交于
      This is an Adaptive Noise Imunity (ANI) implementation for ath5k. I have looked
      at both ath9k and HAL sources (they are nearly the same), and even though i
      have implemented some things differently, the basic algorithm is practically
      the same, for now. I hope that this can serve as a clean start to improve the
      algorithm later.
      
      This also adds a possibility to manually control ANI settings, right now only
      thru a debugfs file:
        * set lowest sensitivity (=highest noise immunity):
      	echo sens-low > /sys/kernel/debug/ath5k/phy0/ani
        * set highest sensitivity (=lowest noise immunity):
      	echo sens-high > /sys/kernel/debug/ath5k/phy0/ani
        * automatically control immunity (default):
      	echo ani-on > /sys/kernel/debug/ath5k/phy0/ani
        * to see the parameters in use and watch them change:
      	cat /sys/kernel/debug/ath5k/phy0/ani
      
      Manually setting sensitivity will turn the automatic control off. You can also
      control each of the five immunity parameters (noise immunity, spur immunity,
      firstep, ofdm weak signal detection, cck weak signal detection) manually thru
      the debugfs file.
      
      This is tested on AR5414 and nearly doubles the thruput in a noisy 2GHz band.
      Signed-off-by: NBruno Randolf <br1@einfach.org>
      Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
      2111ac0d
  18. 01 4月, 2010 1 次提交
  19. 16 3月, 2010 2 次提交
  20. 11 3月, 2010 1 次提交
  21. 10 3月, 2010 1 次提交
  22. 13 1月, 2010 2 次提交
  23. 08 10月, 2009 8 次提交