- 06 11月, 2018 1 次提交
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由 Amber Lin 提交于
After amdkfd module is merged into amdgpu, KFD can call amdgpu directly and no longer needs to use the function pointer. Replace those function pointers with functions if they are not ASIC dependent. Signed-off-by: NAmber Lin <Amber.Lin@amd.com> Acked-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: NFelix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 27 9月, 2018 6 次提交
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由 Shaoyun Liu 提交于
Firmware have the workaround to replace the atomic Ops with read-modify-write on CP side. User should not expect atomic Ops on system memory works normally if system didn't not support it. Signed-off-by: NShaoyun Liu <Shaoyun.Liu@amd.com> Acked-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-By: NFelix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Shaoyun Liu 提交于
Add Vega20 device IDs, device info and enable it in KFD. Signed-off-by: NShaoyun Liu <Shaoyun.Liu@amd.com> Acked-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: NFelix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NFelix Kuehling <Felix.Kuehling@amd.com>
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由 Shaoyun Liu 提交于
Vega20 supports 8 SDMA queues per engine Signed-off-by: NShaoyun Liu <Shaoyun.Liu@amd.com> Reviewed-by: NFelix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NFelix Kuehling <Felix.Kuehling@amd.com> Acked-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Felix Kuehling 提交于
Also save the version in struct kfd_dev so we only need to query it once. Signed-off-by: NPhilip Yang <Philip.Yang@amd.com> Signed-off-by: NFelix Kuehling <Felix.Kuehling@amd.com> Acked-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Emily Deng 提交于
KFD module doesn't support TONGA SRIOV, if init KFD module in TONGA SRIOV environment, it will let compute ring IB test fail. Signed-off-by: NEmily Deng <Emily.Deng@amd.com> Reviewed-by: NShaoyun.liu <Shaoyun.liu@amd.com> Signed-off-by: NFelix Kuehling <Felix.Kuehling@amd.com> Acked-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Eric Huang 提交于
Add the flags of properties according to Asic type and pcie capabilities. Signed-off-by: NEric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: NFelix Kuehling <Felix.Kuehling@amd.com> Acked-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 20 9月, 2018 1 次提交
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由 Yong Zhao 提交于
CWSR fails on Raven if the control stack is MTYPE_UC, which is used for regular GART mappings. As a workaround we map it using MTYPE_NC. The MEC firmware expects the control stack at one page offset from the start of the MQD so it is part of the MQD allocation on GFXv9. AMDGPU added a memory allocation flag just for this purpose. Acked-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NYong Zhao <yong.zhao@amd.com> Reviewed-by: NFelix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: NFelix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 11 9月, 2018 1 次提交
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由 Shaoyun Liu 提交于
Thunk will generate the XGMI topology information when necessary with the hive_id for each specified device Signed-off-by: NShaoyun Liu <Shaoyun.Liu@amd.com> Reviewed-by: NFelix Kuehling <Felix.Kuehling@amd.com> Acked-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 14 7月, 2018 2 次提交
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由 Yong Zhao 提交于
Add DID and kfd_device_info for Raven. Signed-off-by: NYong Zhao <Yong.Zhao@amd.com> Reviewed-by: NFelix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: NFelix Kuehling <Felix.Kuehling@amd.com> Acked-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NOded Gabbay <oded.gabbay@gmail.com>
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由 Yong Zhao 提交于
On Raven there is only one SDMA engine instead of previously assumed two, so we need to adapt our code to this new scenario. Signed-off-by: NYong Zhao <yong.zhao@amd.com> Reviewed-by: NFelix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: NFelix Kuehling <Felix.Kuehling@amd.com> Acked-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NOded Gabbay <oded.gabbay@gmail.com>
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- 12 7月, 2018 5 次提交
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由 Shaoyun Liu 提交于
Signed-off-by: NShaoyun Liu <Shaoyun.Liu@amd.com> Reviewed-by: NFelix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: NFelix Kuehling <Felix.Kuehling@amd.com> Acked-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NOded Gabbay <oded.gabbay@gmail.com>
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由 Shaoyun Liu 提交于
Lock KFD and evict existing queues on reset. Notify user mode by signaling hw_exception events. Signed-off-by: NShaoyun Liu <Shaoyun.Liu@amd.com> Reviewed-by: NFelix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: NFelix Kuehling <Felix.Kuehling@amd.com> Acked-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NOded Gabbay <oded.gabbay@gmail.com>
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由 Shaoyun Liu 提交于
Signed-off-by: NShaoyun Liu <Shaoyun.Liu@amd.com> Reviewed-by: NFelix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: NFelix Kuehling <Felix.Kuehling@amd.com> Acked-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NOded Gabbay <oded.gabbay@gmail.com>
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由 Lan Xiao 提交于
Upon VM Fault, the VMID and PASID written by HW are zeros in Hawaii. Instead of reading from ih_ring_entry, read directly from the registers. This workaround fix the soft hang issues caused by mishandled VM Fault in Hawaii. Signed-off-by: NLan Xiao <Lan.Xiao@amd.com> Signed-off-by: NFelix Kuehling <Felix.Kuehling@amd.com> Acked-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NOded Gabbay <oded.gabbay@gmail.com>
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由 Felix Kuehling 提交于
This is no longer needed with the memalloc_nofs_save/restore in dqm_lock/unlock. Signed-off-by: NFelix Kuehling <Felix.Kuehling@amd.com> Acked-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NOded Gabbay <oded.gabbay@gmail.com>
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- 02 5月, 2018 2 次提交
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由 Yong Zhao 提交于
Since the assembly code is inside "#if 0", it is ineffective. Despite that, during debugging, we need to change the assembly code, extract it into a separate file and compile the new file into hex values using sp3. That process also requires us to remove "#if 0" and modify lines starting with "#", so that sp3 can successfully compile the new file. With this change, all the above chore is no longer needed, and cwsr_trap_handler_gfx*.asm can be directly used by sp3 to generate its hex values. Signed-off-by: NYong Zhao <yong.zhao@amd.com> Reviewed-by: NFelix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: NFelix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: NOded Gabbay <oded.gabbay@gmail.com>
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由 Felix Kuehling 提交于
Signed-off-by: NFelix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: NOded Gabbay <oded.gabbay@gmail.com> Signed-off-by: NOded Gabbay <oded.gabbay@gmail.com>
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- 11 4月, 2018 5 次提交
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由 Felix Kuehling 提交于
* Report 64-bit doorbells as HSA_CAP_DOORBELL_TYPE_2_0 in topology * Report cache information in topology (duplicates GFXv8 info for now) * Add device info for Vega10 support in KFD Raven is not enabled at this time as it needs additional changes in DQM to work with a single SDMA engine. Signed-off-by: NFelix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: NOded Gabbay <oded.gabbay@gmail.com> Signed-off-by: NOded Gabbay <oded.gabbay@gmail.com>
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由 welu 提交于
Report failure to enable atomics only on GPUs that require them. This allows GPUs that don't require atomics to function, but can benefit if they are available. This is the case for Vega10, which doesn't use atomics for basic functioning of the MEC, AQL and HWS microcode. So it can work without atomics. But shader programs can still use atomic instructions on systems that support PCIe atomics. Signed-off-by: Nwelu <Wei.Lu2@amd.com> Signed-off-by: NFelix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: NOded Gabbay <oded.gabbay@gmail.com> Signed-off-by: NOded Gabbay <oded.gabbay@gmail.com>
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由 Felix Kuehling 提交于
Signed-off-by: NShaoyun Liu <Shaoyun.Liu@amd.com> Signed-off-by: NJay Cornwall <Jay.Cornwall@amd.com> Signed-off-by: NFelix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: NOded Gabbay <oded.gabbay@gmail.com> Signed-off-by: NOded Gabbay <oded.gabbay@gmail.com>
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由 Felix Kuehling 提交于
Signed-off-by: NJohn Bridgman <john.bridgman@amd.com> Signed-off-by: NJay Cornwall <Jay.Cornwall@amd.com> Signed-off-by: NFelix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: NOded Gabbay <oded.gabbay@gmail.com> Signed-off-by: NOded Gabbay <oded.gabbay@gmail.com>
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由 Felix Kuehling 提交于
This prepares for GFXv9 (Vega10), which has 64-bit doorbells. Signed-off-by: NFelix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: NOded Gabbay <oded.gabbay@gmail.com> Signed-off-by: NOded Gabbay <oded.gabbay@gmail.com>
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- 24 3月, 2018 2 次提交
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由 Felix Kuehling 提交于
These interfaces allow KGD to stop and resume all GPU user mode queue access to a process address space. This is needed for handling MMU notifiers of userptrs mapped for GPU access in KFD VMs. Signed-off-by: NFelix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: NOded Gabbay <oded.gabbay@gmail.com> Signed-off-by: NOded Gabbay <oded.gabbay@gmail.com>
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由 Felix Kuehling 提交于
When an MMU notifier runs in memory reclaim context, it can deadlock trying to take locks that are already held in the thread causing the memory reclaim. The solution is to avoid memory reclaim while holding locks that are taken in MMU notifiers by using GFP_NOIO. This commit fixes memory allocations done while holding the dqm->lock which is needed in the MMU notifier (dqm->ops.evict_process_queues). Signed-off-by: NFelix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: NOded Gabbay <oded.gabbay@gmail.com> Signed-off-by: NOded Gabbay <oded.gabbay@gmail.com>
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- 07 2月, 2018 1 次提交
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由 Felix Kuehling 提交于
When the TTM memory manager in KGD evicts BOs, all user mode queues potentially accessing these BOs must be evicted temporarily. Once user mode queues are evicted, the eviction fence is signaled, allowing the migration of the BO to proceed. A delayed worker is scheduled to restore all the BOs belonging to the evicted process and restart its queues. During suspend/resume of the GPU we also evict all processes to allow KGD to save BOs in system memory, since VRAM will be lost. v2: * Account for eviction when updating of q->is_active in MQD manager Signed-off-by: NHarish Kasiviswanathan <Harish.Kasiviswanathan@amd.com> Signed-off-by: NFelix Kuehling <Felix.Kuehling@amd.com> Acked-by: NOded Gabbay <oded.gabbay@gmail.com> Signed-off-by: NOded Gabbay <oded.gabbay@gmail.com>
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- 09 12月, 2017 1 次提交
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由 Felix Kuehling 提交于
dGPUs work without IOMMUv2. Make IOMMUv2 initialization dependent on ASIC information. Also allow building KFD without IOMMUv2 support. This is still useful for dGPUs and prepares for enabling KFD on architectures that don't support AMD IOMMUv2. v2: * Centralize IOMMUv2 code to avoid #ifdefs in too many places v3: * Imply AMD_IOMMU_V2 in Kconfig Signed-off-by: NFelix Kuehling <Felix.Kuehling@amd.com> Acked-by: NChristian Konig <christian.koenig@amd.com> Reviewed-by: NOded Gabbay <oded.gabbay@gmail.com> Signed-off-by: NOded Gabbay <oded.gabbay@gmail.com>
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- 05 1月, 2018 3 次提交
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由 Felix Kuehling 提交于
v2: remove needs_iommu field as it doesn't exists CC: linux-pci@vger.kernel.org Signed-off-by: NFelix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: NOded Gabbay <oded.gabbay@gmail.com> Signed-off-by: NOded Gabbay <oded.gabbay@gmail.com>
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由 Felix Kuehling 提交于
Some dGPUs don't support HWS. Allow them to use a per-device sched_policy that may be different from the global default. Signed-off-by: NFelix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: NOded Gabbay <oded.gabbay@gmail.com> Signed-off-by: NOded Gabbay <oded.gabbay@gmail.com>
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由 Felix Kuehling 提交于
This will be needed for most dGPUs. CC: linux-pci@vger.kernel.org Signed-off-by: NFelix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: NOded Gabbay <oded.gabbay@gmail.com> Signed-off-by: NOded Gabbay <oded.gabbay@gmail.com>
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- 28 11月, 2017 1 次提交
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由 Felix Kuehling 提交于
Allow HWS to to execute multiple processes on the hardware concurrently. The number of concurrent processes is limited by the number of VMIDs allocated to the HWS. A module parameter can be used for limiting this further or turn it off altogether (mainly for debugging purposes). Signed-off-by: NYong Zhao <yong.zhao@amd.com> Signed-off-by: NJay Cornwall <Jay.Cornwall@amd.com> Signed-off-by: NFelix Kuehling <Felix.Kuehling@amd.com> Acked-by: NOded Gabbay <oded.gabbay@gmail.com> Signed-off-by: NOded Gabbay <oded.gabbay@gmail.com>
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- 15 11月, 2017 1 次提交
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由 Felix Kuehling 提交于
This hardware feature allows the GPU to preempt shader execution in the middle of a compute wave, save the state and restore it later to resume execution. Memory for saving the state is allocated per queue in user mode and the address and size passed to the create_queue ioctl. The size depends on the number of waves that can be in flight simultaneously on a given ASIC. Signed-off-by: NShaoyun.liu <shaoyun.liu@amd.com> Signed-off-by: NYong Zhao <yong.zhao@amd.com> Signed-off-by: NFelix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: NOded Gabbay <oded.gabbay@gmail.com>
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- 28 10月, 2017 1 次提交
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由 Andres Rodriguez 提交于
In systems under heavy load the IH work may experience significant scheduling delays. Under load + system workqueue: Max Latency: 7.023695 ms Avg Latency: 0.263994 ms Under load + high priority workqueue: Max Latency: 1.162568 ms Avg Latency: 0.163213 ms Further work is required to measure the impact of per-cpu settings on IH performance. Signed-off-by: NAndres Rodriguez <andres.rodriguez@amd.com> Signed-off-by: NFelix Kuehling <Felix.Kuehling@amd.com> Acked-by: NOded Gabbay <oded.gabbay@gmail.com> Signed-off-by: NOded Gabbay <oded.gabbay@gmail.com>
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- 27 9月, 2017 1 次提交
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由 Felix Kuehling 提交于
PASID management is moving into KGD. Limiting the PASID range to the number of doorbell pages is no longer practical. Signed-off-by: NFelix Kuehling <Felix.Kuehling@amd.com> Acked-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: NOded Gabbay <oded.gabbay@gmail.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 21 9月, 2017 3 次提交
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由 Yong Zhao 提交于
The hard-coded values related to VMID were removed in KFD, as those values can be calculated in the KFD initialization function. v2: remove unnecessary local variable Signed-off-by: NYong Zhao <yong.zhao@amd.com> Signed-off-by: NFelix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: NOded Gabbay <oded.gabbay@gmail.com> Signed-off-by: NOded Gabbay <oded.gabbay@gmail.com>
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由 Yong Zhao 提交于
When we do suspend/resume through "sudo pm-suspend" while there is HSA activity running, upon resume we will encounter HWS hanging, which is caused by memory read/write failures. The root cause is that when suspend, we neglected to unbind pasid from kfd device. Another major change is that the bind/unbinding is changed to be performed on a per process basis, instead of whether there are queues in dqm. v2: - free IOMMU device if kfd_bind_processes_to_device fails in kfd_resume - add comments to kfd_bind/unbind_processes_to/from_device - minor cleanups Signed-off-by: NYong Zhao <yong.zhao@amd.com> Signed-off-by: NFelix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: NOded Gabbay <oded.gabbay@gmail.com> Signed-off-by: NOded Gabbay <oded.gabbay@gmail.com>
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由 Yong Zhao 提交于
The idea is to let kfd init and resume function share the same code path as much as possible, rather than to have two copies of almost identical code. That way improves the code readability and maintainability. Signed-off-by: NYong Zhao <yong.zhao@amd.com> Signed-off-by: NFelix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: NOded Gabbay <oded.gabbay@gmail.com> Signed-off-by: NOded Gabbay <oded.gabbay@gmail.com>
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- 16 8月, 2017 3 次提交
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由 Felix Kuehling 提交于
To match current firmware. The map process packet has been extended to support scratch. This is a non-backwards compatible change and it's about two years old. So no point keeping the old version around conditionally. Signed-off-by: NFelix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: NOded Gabbay <oded.gabbay@gmail.com> Signed-off-by: NOded Gabbay <oded.gabbay@gmail.com>
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由 Yong Zhao 提交于
v2: Turned WARN into dev_warn and made the message more helpful Signed-off-by: NYong Zhao <Yong.Zhao@amd.com> Signed-off-by: NFelix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: NOded Gabbay <oded.gabbay@gmail.com>
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由 Felix Kuehling 提交于
In most cases, BUG_ONs can be replaced with WARN_ON with an error return. In some void functions just turn them into a WARN_ON and possibly an early exit. v2: * Cleaned up error handling in pm_send_unmap_queue * Removed redundant WARN_ON in kfd_process_destroy_delayed Signed-off-by: NFelix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: NOded Gabbay <oded.gabbay@gmail.com>
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