Initial commit of BMIPS SMP support code.  Smoke-tested on a variety of
BMIPS4350, BMIPS4380, and BMIPS5000 platforms.
Signed-off-by: NKevin Cernekee <cernekee@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2977/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Some systems need to relocate the MIPS exception vector base during
trap initialization.  Add a hook to make this possible.
Signed-off-by: NKevin Cernekee <cernekee@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2959/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Allow the board support code to register a raw notifier callback for
NMI, similar to what is done for CU2 exceptions.
Signed-off-by: NKevin Cernekee <cernekee@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2958/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

bmips.h contains BMIPS definitions that are useful for SMP, vector
relocation, performance counters, etc.
Signed-off-by: NKevin Cernekee <cernekee@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2973/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Several BMIPS-specific CP0 registers are used for SMP boot and other
operations.
Signed-off-by: NKevin Cernekee <cernekee@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2956/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Add CONFIG_CPU_BMIPS* in all of the right places, so that BMIPS kernel
images will compile and run.
Signed-off-by: NKevin Cernekee <cernekee@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2955/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Use a tab on second and subsequent lines of multiline #if's, for
consistency with the next commit.
Signed-off-by: NKevin Cernekee <cernekee@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2954/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Factor out common BMIPS options into "CPU_BMIPS".  Add L2 cache for
BMIPS5000.  Add CPU_MIPS32 to satisfy checks in page.h, r4k_switch.S,
tlb-r4k.c, etc.
Signed-off-by: NKevin Cernekee <cernekee@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2953/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

The code located at arch/mips/lantiq/ included module.h to be able to use
the EXPORT_SYMBOL* macros. These can now be directly included using
export.h.
Signed-off-by: NJohn Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2937/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

I am running SMP Linux 2.6.37-rc1 on BMIPS5000 (single core dual thread)
and observe some abnormalities when doing system suspend/resume which I
narrowed down to cpu hotplugging. The suspend brings the second thread
processor down and then restarts it, after which I see memory corruption
in userspace. I started digging and found out that problem occurs because
while doing execve() the child process is getting the same ASID as the
parent, which obviously corrupts parent's address space.

Further digging showed that activate_mm() calls get_new_mmu_context() to
get a new ASID, but at this time ASID field in entryHi is 1, and
asid_cache(cpu) is 0x100 (it was just reset to ASID_FIRST_VERSION when
the secondary TP was booting).

So, get_new_mmu_context() increments the asid_cache(cpu) value to
0x101, and thus puts 0x01 into entryHi. The result - ASID field does
not get changed as it was supposed to.

My solution is very simple - do not reset asid_cache(cpu) on TP warm
restart.

Patchwork: https://patchwork.linux-mips.org/patch/1797/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

The parse_mtd_partitions() and mtd_device_register() functions were
combined into mtd_device_parse_register().  So call that instead.
Signed-off-by: NDavid Daney <david.daney@cavium.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2923/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Fix the following compilation failure with v3.2-rc1 by including module.h:

  CC [M]  arch/mips/kernel/cpufreq/loongson2_clock.o
arch/mips/kernel/cpufreq/loongson2_clock.c:39:1: error: data definition has no type or storage class [-Werror]
arch/mips/kernel/cpufreq/loongson2_clock.c:39:1: error: type defaults to 'int' in declaration of 'EXPORT_SYMBOL_GPL' [-Werror=implicit-int]
arch/mips/kernel/cpufreq/loongson2_clock.c:39:1: error: parameter names (without types) in function declaration [-Werror]
arch/mips/kernel/cpufreq/loongson2_clock.c:51:1: error: data definition has no type or storage class [-Werror]
arch/mips/kernel/cpufreq/loongson2_clock.c:51:1: error: type defaults to 'int' in declaration of 'EXPORT_SYMBOL' [-Werror=implicit-int]
arch/mips/kernel/cpufreq/loongson2_clock.c:51:1: error: parameter names (without types) in function declaration [-Werror]
arch/mips/kernel/cpufreq/loongson2_clock.c:71:1: error: data definition has no type or storage class [-Werror]
arch/mips/kernel/cpufreq/loongson2_clock.c:71:1: error: type defaults to 'int' in declaration of 'EXPORT_SYMBOL' [-Werror=implicit-int]
arch/mips/kernel/cpufreq/loongson2_clock.c:71:1: error: parameter names (without types) in function declaration [-Werror]
arch/mips/kernel/cpufreq/loongson2_clock.c:76:1: error: data definition has no type or storage class [-Werror]
arch/mips/kernel/cpufreq/loongson2_clock.c:76:1: error: type defaults to 'int' in declaration of 'EXPORT_SYMBOL' [-Werror=implicit-int]
arch/mips/kernel/cpufreq/loongson2_clock.c:76:1: error: parameter names (without types) in function declaration [-Werror]
arch/mips/kernel/cpufreq/loongson2_clock.c:82:1: error: data definition has no type or storage class [-Werror]
arch/mips/kernel/cpufreq/loongson2_clock.c:82:1: error: type defaults to 'int' in declaration of 'EXPORT_SYMBOL' [-Werror=implicit-int]
arch/mips/kernel/cpufreq/loongson2_clock.c:82:1: error: parameter names (without types) in function declaration [-Werror]
arch/mips/kernel/cpufreq/loongson2_clock.c:87:1: error: data definition has no type or storage class [-Werror]
arch/mips/kernel/cpufreq/loongson2_clock.c:87:1: error: type defaults to 'int' in declaration of 'EXPORT_SYMBOL' [-Werror=implicit-int]
arch/mips/kernel/cpufreq/loongson2_clock.c:87:1: error: parameter names (without types) in function declaration [-Werror]
arch/mips/kernel/cpufreq/loongson2_clock.c:93:1: error: data definition has no type or storage class [-Werror]
arch/mips/kernel/cpufreq/loongson2_clock.c:93:1: error: type defaults to 'int' in declaration of 'EXPORT_SYMBOL_GPL' [-Werror=implicit-int]
arch/mips/kernel/cpufreq/loongson2_clock.c:93:1: error: parameter names (without types) in function declaration [-Werror]
arch/mips/kernel/cpufreq/loongson2_clock.c:131:1: error: data definition has no type or storage class [-Werror]
arch/mips/kernel/cpufreq/loongson2_clock.c:131:1: error: type defaults to 'int' in declaration of 'EXPORT_SYMBOL_GPL' [-Werror=implicit-int]
arch/mips/kernel/cpufreq/loongson2_clock.c:131:1: error: parameter names (without types) in function declaration [-Werror]
arch/mips/kernel/cpufreq/loongson2_clock.c:147:1: error: data definition has no type or storage class [-Werror]
arch/mips/kernel/cpufreq/loongson2_clock.c:147:1: error: type defaults to 'int' in declaration of 'EXPORT_SYMBOL_GPL' [-Werror=implicit-int]
arch/mips/kernel/cpufreq/loongson2_clock.c:147:1: error: parameter names (without types) in function declaration [-Werror]
arch/mips/kernel/cpufreq/loongson2_clock.c:166:1: error: data definition has no type or storage class [-Werror]
arch/mips/kernel/cpufreq/loongson2_clock.c:166:1: error: type defaults to 'int' in declaration of 'EXPORT_SYMBOL_GPL' [-Werror=implicit-int]
arch/mips/kernel/cpufreq/loongson2_clock.c:166:1: error: parameter names (without types) in function declaration [-Werror]
arch/mips/kernel/cpufreq/loongson2_clock.c:168:15: error: expected declaration specifiers or '...' before string constant
arch/mips/kernel/cpufreq/loongson2_clock.c:169:20: error: expected declaration specifiers or '...' before string constant
arch/mips/kernel/cpufreq/loongson2_clock.c:170:16: error: expected declaration specifiers or '...' before string constant
Signed-off-by: NAaro Koskinen <aaro.koskinen@iki.fi>
To: linux-mips@linux-mips.org
To: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/2922/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Commit 5f7efb4c (Kbuild: append missing-syscalls to the default target
list) broke MIPS build.
Reported-tested-and-acked-by: NRalf Baechle <ralf@linux-mips.org>
Signed-off-by: NDavid Daney <david.daney@cavium.com>
Signed-off-by: NMichal Marek <mmarek@suse.cz>

Signed-off-by: NDavid Daney <david.daney@cavium.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2918/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

The Kernel hangs occasionally during boot after "Calibrating delay loop..".
This is caused by the c0_compare_int_usable() routine in cevt-r4k.c
returning false which causes the system to disable the timer and hang later.
The false return happens because the routine is using a series of four calls
to irq_disable_hazard() as a delay while it waits for the timer changes to
propagate to the cp0 cause register. On newer MIPS cores, like the 74K, the
series of irq_disable_hazard() calls turn into ehb instructions and can take
as little as a few clock ticks for all 4 instructions. This is not enough of
a delay, so the routine thinks the timer is not working.  This fix uses up
to a max number of cycle counter ticks for the delay and uses
back_to_back_c0_hazard() instead of irq_disable_hazard() to handle the
hazard condition between cp0 writes and cp0 reads.
Signed-off-by: NAl Cooper <alcooperx@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/2911/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

This is to exclude it from force threading to allow RT patch set to work.
And while on this line
* Remove IRQF_DISABLED as as this flag is NOOP
* Add IRQF_PERCPU as this is a per cpu interrupt.
Signed-off-by: NVenkat Subbiah <venkat.subbiah@cavium.com>
Acked-by: NDavid Daney <david.daney@cavium.com>
To: linux-mips@linux-mips.org
To: linux-rt-users@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/2817/Acked-by: NThomas Gleixner <tglx@linutronix.de>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Since eb9ae7f2 (gpio: fix build error in include/asm-generic/gpio.h)
the generic version of gpio.h calls __gpio_{set,get}_value which we
do not define. Get rid of asm-generic/gpio.h and define the missing
stubs directly for BCM47xx to build.
Reported-by: NRalf Baechle <ralf@linux-mips.org>
To: linux-mips@linux-mips.org
CC: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: NFlorian Fainelli <florian@openwrt.org>
Patchwork: https://patchwork.linux-mips.org/patch/2885/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

The NXP code was moved for 2.6.36 but two files survived unused in the
old location.
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Cause is a misplaced bracket.

The code

    strlen(buf+1)

will be two bytes less than

    strlen(buf)+1

The +1 is in this code to reserve space for an additional space character.

[ralf@linux-mips.org: Thomas' original patch fixed the issue only for
 Yosemite but the same bug exists also in Emma.]
Signed-off-by: NThomas Jarosch <thomas.jarosch@intra2net.com>
Patchwork: https://patchwork.linux-mips.org/patch/2861/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Or else we get lots of variations on this:

arch/mips/pci/pci.c:330: warning: type defaults to 'int' in declaration of 'EXPORT_SYMBOL'

scattered throughout the build.
Signed-off-by: NPaul Gortmaker <paul.gortmaker@windriver.com>

None of these files are using modular infrastructure, and build
tests reveal that none of these files are really relying on any
implicit inclusions via. module.h either.  So delete them.
Signed-off-by: NPaul Gortmaker <paul.gortmaker@windriver.com>

These files are not modules, but were including module.h only for
EXPORT_SYMBOL and/or THIS_MODULE.  Now that we have the lightweight
export.h, use it in these kinds of cases.
Signed-off-by: NPaul Gortmaker <paul.gortmaker@windriver.com>

We need to call out inclusion of smp.h, or with the module.h cleanup
we'll get things like:

arch/mips/loongson/common/platform.c:21: error: implicit declaration of function 'smp_processor_id'

arch/mips/vr41xx/common/giu.c:84: error: implicit declaration of function 'smp_processor_id'

arch/mips/vr41xx/common/rtc.c:85: error: implicit declaration of function 'smp_processor_id'
Signed-off-by: NPaul Gortmaker <paul.gortmaker@windriver.com>

We are relying on asm/elf.h being present implicitly.  Once we clean
up the root cause of that, we'll see this, so fix it in advance.

arch/mips/kernel/cpu-probe.c: In function 'set_elf_platform':
arch/mips/kernel/cpu-probe.c:298: error: '__elf_platform' undeclared (first use in this function)
Signed-off-by: NPaul Gortmaker <paul.gortmaker@windriver.com>

Signed-off-by: NPaul Bolle <pebolle@tiscali.nl>
Signed-off-by: NMichal Marek <mmarek@suse.cz>

Replace the usage of "volatile"s with register accessor functions.
Signed-off-by: NManuel Lauss <manuel.lauss@googlemail.com>
Signed-off-by: NBen Dooks <ben-linux@fluff.org>

This was found by inspection while tracking a similar
bug in compat_statfs64, that has been fixed in mainline
since decemeber.

- This fixes a bug where not all of the f_spare fields
  were cleared on mips and s390.
- Add the f_flags field to struct compat_statfs
- Copy f_flags to userspace in case someone cares.
- Use __clear_user to copy the f_spare field to userspace
  to ensure that all of the elements of f_spare are cleared.
  On some architectures f_spare is has 5 ints and on some
  architectures f_spare only has 4 ints.  Which makes
  the previous technique of clearing each int individually
  broken.

I don't expect anyone actually uses the old statfs system
call anymore but if they do let them benefit from having
the compat and the native version working the same.
Signed-off-by: NEric W. Biederman <ebiederm@xmission.com>
Signed-off-by: NChristoph Hellwig <hch@lst.de>

Later IRIX versions provide them in <sys/regdef.h> and gas also accepts
$ta0 .. $ta3 since binutils 2.18 so Linux should do the same for source
compatibility.

Enable hardware counters for Octeon, and add the corresponding event
mappings.
Signed-off-by: NDavid Daney <david.daney@cavium.com>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
Cc: Deng-Cheng Zhu <dengcheng.zhu@gmail.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2790/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

The hard coded constants are moved to struct mips_pmu.  All counter
register access move to the read_counter and write_counter function
pointers, which are set to either 32-bit or 64-bit access methods at
initialization time.

Many of the function pointers in struct mips_pmu were not needed as
there was only a single implementation, these were removed.

I couldn't figure out what made struct cpu_hw_events.msbs[] at all
useful, so I removed it too.

Some functions and other declarations were reordered to reduce the
need for forward declarations.
Signed-off-by: NDavid Daney <david.daney@cavium.com>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
Cc: Deng-Cheng Zhu <dengcheng.zhu@gmail.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2792/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

The contents of arch/mips/kernel/perf_event.c and
arch/mips/kernel/perf_event_mipsxx.c were divided in a seemingly ad
hoc manner, with the first including the second.

I moved all the hardware counter support code to perf_event_mipsxx.c
and removed the gating #ifdefs to the Kconfig and Makefile.

Now perf_event.c contains only the callchain support, everything else
is in perf_event_mipsxx.c

There are no code changes, only moving of functions from one file to
the other, or removing empty unneeded functions.
Signed-off-by: NDavid Daney <david.daney@cavium.com>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
Cc: Dezhong Diao <dediao@cisco.com>
Cc: Gabor Juhos <juhosg@openwrt.org>
Cc: Deng-Cheng Zhu <dengcheng.zhu@gmail.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2791/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Get rid of a bunch of useless inline declarations, and join a bunch of
improperly split lines.
Signed-off-by: NDavid Daney <david.daney@cavium.com>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
Cc: Deng-Cheng Zhu <dengcheng.zhu@gmail.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2793/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NDavid Daney <david.daney@cavium.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2789/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Detect cn61XX, cn66XX and cn68XX CPUs in cpu_probe_cavium().
Signed-off-by: NDavid Daney <david.daney@cavium.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2777/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

The CPU identifiers for cn68XX, cn66XX and cn61XX are known, so add
them.
Signed-off-by: NDavid Daney <david.daney@cavium.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2776/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

It seems that BSP could be setup twice, but the nlm_cpu_ready array is only
set for ASPs in smpboot.S, not including BSP.
Signed-off-by: NHillf Danton <dhillf@gmail.com>
Cc: "Jayachandran C." <jayachandranc@netlogicmicro.com>
Cc: LKML <linux-kernel@vger.kernel.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2695/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>,

Check the trigger direction for the triggered IRQ instead of the parent IRQ.
Signed-off-by: NLars-Peter Clausen <lars@metafoo.de>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: http://patchwork.linux-mips.org/patch/2433/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

We already know the base IRQ for a GPIO chip, so there is no need to
recalculate it in the demux handler.
Signed-off-by: NLars-Peter Clausen <lars@metafoo.de>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Cc: Lars-Peter Clausen <lars@metafoo.de>
Patchwork: http://patchwork.linux-mips.org/patch/2432/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Use the generic irq chip framework to implement the jz4740 INTC and GPIO irq
chips.
Signed-off-by: NLars-Peter Clausen <lars@metafoo.de>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/2434/
Patchwork: https://patchwork.linux-mips.org/patch/2771/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>