Interrupt-parent property is defined in the root node as
"interrupt-parent = <&intc>". This interrupt-parent value becomes
the default for the system, so removed redundant "interrupt-parent"
property from mmc, mac, lcdc and tscadc nodes.
Signed-off-by: NSuniel Mahesh <sunil.m@techveda.org>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Compiling the DT file with W=1, DTC warns like follows:

Warning (unit_address_vs_reg): Node /opp_table0/opp@1000000000 has a
unit name, but no reg property

Fix this by replacing '@' with '-' as the OPP nodes will never have a
"reg" property.
Reported-by: NKrzysztof Kozlowski <krzk@kernel.org>
Reported-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Suggested-by: NMark Rutland <mark.rutland@arm.com>
Signed-off-by: NViresh Kumar <viresh.kumar@linaro.org>
Acked-by: NRob Herring <robh@kernel.org>
Acked-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

After the ti-cpufreq driver has been added, we can now drop the
operating-points table present in am33xx.dtsi for the cpu and add an
operating-points-v2 table with all OPPs available for all silicon
revisions. Also add necessary data for use by ti-cpufreq to selectively
enable the appropriate OPPs at runtime as part of the operating-points
table.

Information from AM335x Data Manual, SPRS717i, Revised December 2015,
Table 5-7.
Signed-off-by: NDave Gerlach <d-gerlach@ti.com>
eviewed-by: NLukasz Majewski <lukma@denx.de>
Acked-by: NViresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Even if no_bd_ram property is described in TI CPSW bindings the support for
it has never been introduced in CPSW driver, so there are no real users of
it. Hence, remove no_bd_ram property from documentation and DT files.

Cc: 'Rob Herring <robh+dt@kernel.org>'
Signed-off-by: NGrygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Without these changes children of the scn syscon
won't probe.
Signed-off-by: NTony Lindgren <tony@atomide.com>

Commit f8bf0161 ("ARM: dts: am33xx: Remove skeleton.dtsi usage")
removed the skeleton.dtsi usage since we want to get rid of it.

But this can cause issues when booting a kernel with a boot-loader
that doesn't create a chosen node if this isn't present in the DTB
since the decompressor relies on a pre-existing chosen node to be
available to insert the command line and merge other ATAGS info.

Fixes: f8bf0161 ("ARM: dts: am33xx: Remove skeleton.dtsi usage")
Reported-by: NPali Rohar <pali.rohar@gmail.com>
Signed-off-by: NJavier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

rtc can either be supplied from internal 32k clock or external crystal
generated 32k clock. Internal clock is SoC specific and the external
clock is board dependent. Assigning the corresponding clocks.
Signed-off-by: NKeerthy <j-keerthy@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Add DMA properties for tscadc
Signed-off-by: NMugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Drivers using pinctrl-single,pins have #pinctrl-cells = <1>, while
pinctrl-single,bits need #pinctrl-cells = <2>.

Note that this patch can be optionally applied separately from the
driver changes as the driver supports also the legacy binding without
#pinctrl-cells.
Acked-by: NRob Herring <robh@kernel.org>
Reviewed-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NTony Lindgren <tony@atomide.com>

This reverts commit 4317be11.

The original commit updated the cpufreq operating points tables for
am33xx but was merged before the driver making use of the node was
merged, which breaks the existing cpufreq implementation on the system,
so revert the patch until the ti-cpufreq driver is merged.
Signed-off-by: NDave Gerlach <d-gerlach@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

The skeleton.dtsi file was removed in ARM64 for different reasons as
explained in commit ("3ebee5a2 arm64: dts: kill skeleton.dtsi").

These also applies to ARM and it will also allow to get rid of the
following DTC warnings in the future:

"Node /memory has a reg or ranges property, but no unit name"

The disassembled DTB are almost the same besides an empty chosen
node being removed and nodes reordered, so it should not have
functional changes.
Signed-off-by: NJavier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Add "ti,cpsw-mdio" for am335x/am437x/dra7 SoCs where MDIO is
implemented as part of TI CPSW and, this way, enable PM runtime auto
suspend for Davinci MDIO driver on these paltforms.
Signed-off-by: NGrygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

There is no reason to hold s/w dependent parameter in device tree.
Even more, there is no reason in this parameter because davinici_cpdma
driver splits pool of descriptors equally between tx and rx channels
anyway.
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NIvan Khoronzhuk <ivan.khoronzhuk@linaro.org>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Correct misspelling, "emda3" -> "edma3".
Reported-by: NAdam J Allison <adamj.allison@gmail.com>
Signed-off-by: NRobert P. J. Day <rpjday@crashcourse.ca>
Acked-by: NRob Herring <robh@kernel.org>
Acked-by: NPeter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Drop the operating-points table present in am33xx.dtsi and add an
operating-points-v2 table with all OPPs available for all silicon
revisions along with necessary data for use by ti-cpufreq to selectively
enable the appropriate OPPs at runtime. Also, drop the voltage-tolerance
value and provide voltages for each OPP using the <target min max>
format instead.

Information from AM335x Data Manual, SPRS717i, Revised December 2015,
Table 5-7.
Signed-off-by: NDave Gerlach <d-gerlach@ti.com>
Acked-by: NViresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Previous patches switched the ECAP and EPWM to use the new bindings.
These bindings explicitly adds the various required clocks via DT rather
than depending on hwmod.

Therefore, it is safe to remove the hwmod entries since they are no longer
needed.
Signed-off-by: NFranklin S Cooper Jr <fcooper@ti.com>
Acked-by: NRob Herring <robh@kernel.org>
Acked-by: NPaul Walmsley <paul@pwsan.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Switch to a new ECAP and EPWM bindings that doesn't depend on hwmod to
provide the various required clocks.

For AM437 and AM335x, add the required clocks explicitly to DT. The
hwmod entries for ECAP and EPWM will be removed and this will prevent
anything from breaking.
Signed-off-by: NFranklin S Cooper Jr <fcooper@ti.com>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NTony Lindgren <tony@atomide.com>

This patch updates the GPMC's DT DMA property to reflect the updated eDMA
bindings.

Fixes: b5e50906 ("ARM: DTS: am33xx: Use the new DT bindings for the eDMA3")
Signed-off-by: NFranklin S Cooper Jr <fcooper@ti.com>
Acked-by: NRoger Quadros <rogerq@ti.com>
Acked-by: NPeter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

GPMC driver provides GPI support for the GPMC_WAIT pins.
Mark it gpio controller capable.
Signed-off-by: NRoger Quadros <rogerq@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

When possible generic node names should be used. So change the node name
from ehrpwm to pwm.
Signed-off-by: NFranklin S Cooper Jr <fcooper@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Add compatible id, GPMC register resource and interrupt
resource to NAND controller nodes.

The GPMC node will provide an interrupt controller for the
NAND IRQs.

Cc: Teresa Remmet <t.remmet@phytec.de>
Cc: Ilya Ledvich <ilya@compulab.co.il>
Cc: Yegor Yefremov <yegorslists@googlemail.com>
Cc: Rostislav Lisovy <lisovy@gmail.com>
Cc: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Signed-off-by: NRoger Quadros <rogerq@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Add ti,mbox-send-noirq to wkup_m3 mailbox so that messages using
wkup_m3 mailbox are sent without triggering any further interrupts.
This is needed to achieve lower power numbers during CPU idle on
AM33xx.
Signed-off-by: NDave Gerlach <d-gerlach@ti.com>
[s-anna@ti.com: revise commit description]
Signed-off-by: NSuman Anna <s-anna@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Switch to use the ti,edma3-tpcc and ti,edma3-tptc binding for the eDMA3 and
enable the DMA even crossbar with ti,am335x-edma-crossbar.
With the new bindings boards can customize and tweak the DMA channel
priority to match their needs. With the new binding the memcpy is safe
to be used since with the old binding it was not possible for a driver
to know which channel is allowed to be used as non HW triggered channel.
Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Add dma channel information to the gpmc. Although not enabled by
default this will allow prefetch-dma to be used.
Signed-off-by: NFranklin S Cooper Jr <fcooper@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

This reverts commit d871cd2e as it causes
regression in BBB
Reported-by: NOlof Johansson <olof@lixom.net>
Signed-off-by: NVinod Koul <vinod.koul@intel.com>

Switch to use the ti,edma3-tpcc and ti,edma3-tptc binding for the eDMA3 and
enable the DMA even crossbar with ti,am335x-edma-crossbar.
With the new bindings boards can customize and tweak the DMA channel
priority to match their needs. With the new binding the memcpy is safe
to be used since with the old binding it was not possible for a driver
to know which channel is allowed to be used as non HW triggered channel.
Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: NVinod Koul <vinod.koul@intel.com>

CPSW driver has been updated with compatibles for enabling errata
workarounds. So updating cpsw compatibles.
Signed-off-by: NMugunthan V N <mugunthanvnm@ti.com>
Acked-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Add the Wakeup M3 IPC node for the wkup_m3_ipc driver on AM33xx SoCs.
This node uses the IPC registers, part of the Control Module, and is
therefore added as a child of the scm node.
Signed-off-by: NSuman Anna <s-anna@ti.com>
Signed-off-by: NDave Gerlach <d-gerlach@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Use of of_machine_is_compatible() for handling AM335x specific
"DMA kick" quirk in 8250_omap driver makes it ugly to extend the
quirk for other platforms. Instead use a new compatible.

The new compatible will also make it easier to take care of
other quirks on AM335x and like SoCs.

In order to not break backward DTB compatibility for users of
8250_omap driver on AM335x based boards, existing use of
of_machine_is_compatible() has not been removed.
Signed-off-by: NSekhar Nori <nsekhar@ti.com>
Acked-by: NTony Lindgren <tony@atomide.com>
Reviewed-by: NPeter Hurley <peter@hurleysoftware.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

The WakeupM3 remote processor device node has been moved to
be a child node of the newly created l4_wkup node, to reflect
its presence properly within the SoC. The node was added
previously before any driver support, it is now updated as
per the wkup_m3_rproc bindings added alongside the driver
support.
Signed-off-by: NSuman Anna <s-anna@ti.com>
Signed-off-by: NDave Gerlach <d-gerlach@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

This patch creates an l4_wkup interconnect for AM33xx, and moves some of
the generic peripherals under it. System control module nodes are moved
under this new interconnect also, and the SCM clock layout is changed
to use the renamed SCM node as the clock provider.
Signed-off-by: NTero Kristo <t-kristo@ti.com>

Enable am33xx specific RTC features (e.g. PMIC control) by adding
"ti,am3352-rtc" to the compatible property of the rtc node.
Signed-off-by: NJohan Hovold <johan@kernel.org>
Reviewed-by: NFelipe Balbi <balbi@ti.com>
Tested-by: NFelipe Balbi <balbi@ti.com>
Cc: Alessandro Zummo <a.zummo@towertech.it>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Benot Cousson <bcousson@baylibre.com>
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Cc: Guenter Roeck <linux@roeck-us.net>
Cc: Sekhar Nori <nsekhar@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
Cc: Keerthy J <j-keerthy@ti.com>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

Add "raminit-syscon" property to specify the RAMINIT register.
Add clock information.
Rename can nodes from "d_can" to "can" to be compliant
with the ePAPR specs.
Signed-off-by: NRoger Quadros <rogerq@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Use syscon regmap to expose the Control module register space.
This register space is shared between many users e.g. DCAN, USB, display, etc.
Signed-off-by: NRoger Quadros <rogerq@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Cc: devicetree@vger.kernel.org
Reviewed-by: NTony Lindgren <tony@atomide.com>
Tested-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NSebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: NTony Lindgren <tony@atomide.com>

The '#mbox-cells' property is added to all the OMAP mailbox
nodes. This property is mandatory with the new mailbox framework.

Cc: "Benoît Cousson" <bcousson@baylibre.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Signed-off-by: NSuman Anna <s-anna@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

There are 2 MACIDs stored in the control module of the am33xx. These are
read by the cpsw driver if no valid MACID was found in the devicetree.
Signed-off-by: NMarkus Pargmann <mpa@pengutronix.de>
Reviewed-by: NWolfram Sang <wsa@the-dreams.de>
Acked-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Signed-off-by: NMarkus Pargmann <mpa@pengutronix.de>
Reviewed-by: NWolfram Sang <wsa@the-dreams.de>
Acked-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Use drivers/misc/sram.c driver to manage SRAM on all DT only
OMAP platforms (am33xx, am43xx, omap4 and omap5) instead of
the existing private plat-omap/sram.c

Address and size related data  is removed from mach-omap2/sram.c
and now passed to drivers/misc/sram.c from DT.

Users can hence use general purpose allocator apis instead of
OMAP private ones to manage and use SRAM.
Signed-off-by: NRajendra Nayak <rnayak@ti.com>
Signed-off-by: NDave Gerlach <d-gerlach@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

we are now infering number of IRQ lines based
on correct compatible flag, which renders this
binding completely useless.
Signed-off-by: NFelipe Balbi <balbi@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>