Adding support for i2c controller driver for Broadcom settop
SoCs.
Signed-off-by: NKamal Dasu <kdasu.kdev@gmail.com>
[wsa: removed superfluous owner in platform_driver]
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

The mediatek SoCs have I2C controller that handle I2C transfer.
This patch include common I2C bus driver.
This driver is compatible with I2C controller on mt65xx/mt81xx.
Signed-off-by: NXudong Chen <xudong.chen@mediatek.com>
Signed-off-by: NLiguo Zhang <liguo.zhang@mediatek.com>
Signed-off-by: NEddie Huang <eddie.huang@mediatek.com>
Acked-by: NSascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Add SLIMpro I2C device driver on APM X-Gene platform. This I2C
device driver use the SLIMpro Mailbox driver to tunnel message to
the SLIMpro coprocessor to do the work of accessing I2C components.
Signed-off-by: NFeng Kan <fkan@apm.com>
Signed-off-by: NHieu Le <hnle@apm.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Add an I2C bus driver i2c-xlp9xx.c to support the I2C block in the
XLP9xx/XLP5xx MIPS SoC. Update Kconfig and Makefile to add the
CONFIG_I2C_XLP9XX option.
Signed-off-by: NSubhendu Sekhar Behera <sbehera@broadcom.com>
Signed-off-by: NJayachandran C <jchandra@broadcom.com>
Reviewed-by: NRay Jui <rjui@broadcom.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Adds the i2c bus controller driver for the Ingenic JZ4780 SoC.
Signed-off-by: NZubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

The CX92755 is an SoC in the Conexant Digicolor series. The devicetree binding
document describes the I2C controller on the CX92755 SoC, that is also shared
by some other SoCs in the Digicolor series. The driver adds support.
Signed-off-by: NBaruch Siach <baruch@tkos.co.il>
[wsa: fixed spaces around operators]
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Add initial support to the Broadcom iProc I2C controller found in the
iProc family of SoCs.

The iProc I2C controller has separate internal TX and RX FIFOs, each has
a size of 64 bytes. The iProc I2C controller supports two bus speeds
including standard mode (100kHz) and fast mode (400kHz)
Signed-off-by: NRay Jui <rjui@broadcom.com>
Reviewed-by: NScott Branden <sbranden@broadcom.com>
Reviewed-by: NKevin Cernekee <cernekee@chromium.org>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

This patch implements an I2C bus sharing mechanism between the host and platform
hardware on select Intel BayTrail SoC platforms using the X-Powers AXP288 PMIC.

On these platforms access to the PMIC must be shared with platform hardware. The
hardware unit assumes full control of the I2C bus and the host must request
access through a special semaphore. Hardware control of the bus also makes it
necessary to disable runtime pm to avoid interfering with hardware transactions.
Signed-off-by: NDavid E. Box <david.e.box@linux.intel.com>
Reviewed-by: NMika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

The patch exposes the available i2c busses on the PowerNV platform
to the kernel and implements the bus driver to support i2c and
smbus commands.
The driver uses the platform device infrastructure to probe the busses
on the platform and registers them with the i2c driver framework.
Signed-off-by: NNeelesh Gupta <neelegup@linux.vnet.ibm.com>
Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
Acked-by: Wolfram Sang <wsa@the-dreams.de> (I2C part, excluding the bindings)
Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>

This is a driver for the I2C controller found in Amlogic Meson SoCs.
Signed-off-by: NBeniamino Galvani <b.galvani@gmail.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Add support for the IMG I2C Serial Control Bus (SCB) found on the
Pistachio and TZ1090 SoCs.
Reviewed-by: NAndrew Bresticker <abrestic@chromium.org>
Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
[Ezequiel: code cleaning and rebasing]
Signed-off-by: NEzequiel Garcia <ezequiel.garcia@imgtec.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

This patch adds support for the Diolan DLN-2 I2C master module. Due
to hardware limitations it does not support SMBUS quick commands.

Information about the USB protocol interface can be found in the
Programmer's Reference Manual [1], see section 6.2.2 for the I2C
master module commands and responses.

[1] https://www.diolan.com/downloads/dln-api-manual.pdfSigned-off-by: NLaurentiu Palcu <laurentiu.palcu@intel.com>
Signed-off-by: NOctavian Purdila <octavian.purdila@intel.com>
Acked-by: NWolfram Sang <wsa@the-dreams.de>
Reviewed-by: NJohan Hovold <johan@kernel.org>
[Lee: Fixed some whitespace issues in Kconfig]
Signed-off-by: NLee Jones <lee.jones@linaro.org>

I2C drivers for hix5hd2 soc series, including following chipset
Hi3716CV200, Hi3719CV100, Hi3718CV100, Hi3719MV100, Hi3718MV100.
Signed-off-by: NWei Yan <sledge.yanwei@huawei.com>
Signed-off-by: NZhangfei Gao <zhangfei.gao@linaro.org>
[wsa: folded dt docs into this patch]
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Add I2C bus driver for the controller found in the LSI Axxia family SoCs. The
driver implements 10-bit addressing and SMBus transfer modes via emulation
(including SMBus block data read).
Signed-off-by: NAnders Berg <anders.berg@avagotech.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

This driver is marked as deprecated since the pre-git era. Any user
left(?) should really have switched to i2c-gpio meanwhile.
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
Acked-by: NJim Cromie <jim.cromie@gmail.com>

It turned out that the s6000 simply has a designware IP core and should
use the designated driver for it which is way more maintained and
feature complete. There are currently no users in tree, and not even a
toolchain for s6000 seems to be available. So, simply remove this
duplicate. If someone needs assistance in converting to the designware
driver, the i2c list will be there to help.
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

The P2WI controller looks like an SMBus controller which only supports byte
data transfers. But, it differs from standard SMBus protocol on several
aspects:
- it supports only one slave device, and thus drop the address field
- it adds a parity bit every 8bits of data
- only one read access is required to read a byte (instead of a write
  followed by a read access in standard SMBus protocol)
- there's no Ack bit after each byte transfer

This means this bus cannot be used to interface with standard SMBus
devices (the only known device to support this interface is the AXP221
PMIC).
However the P2WI protocol is close enough to SMBus to be integrated in
the I2C subsystem (see this thread [1] for detailed reasons that led to
integrating this driver in the I2C subsystem).

[1] http://www.spinics.net/lists/linux-i2c/msg15066.htmlSigned-off-by: NBoris BREZILLON <boris.brezillon@free-electrons.com>
Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: NArnd Bergmann <arnd@arndb.de>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Driver for the native I2C adapter found in Rockchip RK3xxx SoCs.

Configuration is only possible through devicetree. The driver is
interrupt driven and supports the I2C_M_IGNORE_NAK mangling bit.
Signed-off-by: NMax Schwarz <max.schwarz@online.de>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

On ARM Chromebooks we have a few devices that are accessed by both the
AP (the main "Application Processor") and the EC (the Embedded
Controller).  These are:
* The battery (sbs-battery).
* The power management unit tps65090.

On the original Samsung ARM Chromebook these devices were on an I2C
bus that was shared between the AP and the EC and arbitrated using
some extranal GPIOs (see i2c-arb-gpio-challenge).

The original arbitration scheme worked well enough but had some
downsides:
* It was nonstandard (not using standard I2C multimaster)
* It only worked if the EC-AP communication was I2C
* It was relatively hard to debug problems (hard to tell if i2c issues
  were caused by the EC, the AP, or some device on the bus).

On the HP Chromebook 11 the design was changed to:
* The AP/EC comms were still i2c, but the battery/tps65090 were no
  longer on the bus used for AP/EC communication.  The battery was
  exposed to the AP through a limited i2c tunnel and tps65090 was
  exposed to the AP through a custom Linux driver.

On the Samsung ARM Chromebook 2 the scheme is changed yet again, now:
* The AP/EC comms are now using SPI for faster speeds.
* The EC's i2c bus is exposed to the AP through a full i2c tunnel.

The upstream "tegra124-venice2" uses the same scheme as the Samsung
ARM Chromebook 2, though it has a different set of components on the
other side of the bus.

This driver supports the scheme used by the Samsung ARM Chromebook 2.
Future patches to this driver could add support for the battery tunnel
on the HP Chromebook 11 (and perhaps could even be used to access
tps65090 on the HP Chromebook 11 instead of using a special driver,
but I haven't researched that enough).
Signed-off-by: NVincent Palatin <vpalatin@chromium.org>
Signed-off-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NDoug Anderson <dianders@chromium.org>
Reviewed-by: NWolfram Sang <wsa@the-dreams.de>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

Arnd said in another patch:

"As far as I can tell, this driver must have produced this
error for as long as it has been merged into the mainline kernel, but
it was never part of the normal build tests:

drivers/i2c/busses/i2c-nuc900.c: In function 'nuc900_i2c_probe':
drivers/i2c/busses/i2c-nuc900.c:601:17: error: request for member
'apbfreq' in something not a structure or union
  ret = (i2c->clk.apbfreq)/(pdata->bus_freq * 5) - 1;
                 ^
This is an attempt to get the driver to build and possibly
work correctly, although I do wonder whether we should just
remove it, as it has clearly never worked."

I agree with removing it since nobody showed interest in Arnd's fixup
patch.
Reported-by: NArnd Bergmann <arnd@arndb.de>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
Cc: Wan ZongShun <mcuos.com@gmail.org>
Acked-by: NArnd Bergmann <arnd@arndb.de>

Add a driver for the Cadence I2C controller. This controller is for
example found in Xilinx Zynq.
Signed-off-by: NSoren Brinkmann <soren.brinkmann@xilinx.com>
Tested-by: NMichal Simek <michal.simek@xilinx.com>
Reviewed-by: NHarini Katakam <harinik@xilinx.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

This bus driver supports the QUP i2c hardware controller in the Qualcomm SOCs.
The Qualcomm Universal Peripheral Engine (QUP) is a general purpose data path
engine with input/output FIFOs and an embedded i2c mini-core. The driver
supports FIFO mode (for low bandwidth applications) and block mode (interrupt
generated for each block-size data transfer).
Signed-off-by: NIvan T. Ivanov <iivanov@mm-sol.com>
Signed-off-by: NBjorn Andersson <bjorn.andersson@sonymobile.com>
Reviewed-by: NAndy Gross <agross@codeaurora.org>
Tested-by: NPhilip Elcan <pelcan@codeaurora.org>
[wsa: removed needless IS_ERR_VALUE]
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

This was tested on a EFM32GG-DK3750 devboard that has a temperature
sensor and an eeprom on its i2c bus.
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

OSIF, Open Source InterFace, is a USB based i2c bus master.  The
origional design was based on i2c-tiny-usb, but more modern versions
of the firmware running on the MegaAVR microcontroller use a different
protocol over the USB. This code is based on Barry Carter
<barry.carter@gmail.com> driver.
Signed-off-by: NAndrew Lunn <andrew@lunn.ch>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Tested with a r7s72100 genmai board acessing an eeprom.
Signed-off-by: NWolfram Sang <wsa@sang-engineering.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Introduce support for Broadcom Serial Controller (BSC) I2C bus found
in the Kona family of Mobile SoCs.  FIFO hardware is utilized but only
standard mode (100kHz), fast mode (400kHz), fast mode plus (1MHz), and
I2C high-speed (3.4 MHz) bus speeds are supported.
Signed-off-by: NTim Kryger <tim.kryger@linaro.org>
Reviewed-by: NMatt Porter <matt.porter@linaro.org>
Reviewed-by: NMarkus Mayer <markus.mayer@linaro.org>
[wsa: fixed Kconfig sorting, squashed broken out patches into one]
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

This patch adds support to SSC (Synchronous Serial Controller)
I2C driver. This IP also supports SPI protocol, but this is not
the aim of this driver.

This IP is embedded in all ST SoCs for Set-top box platorms, and
supports I2C Standard and Fast modes.
Signed-off-by: NMaxime Coquelin <maxime.coquelin@st.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Adds support for High Speed I2C driver found in Exynos5 and
later SoCs from Samsung.

Driver only supports Device Tree method.
Signed-off-by: NNaveen Krishna Chatradhi <ch.naveen@samsung.com>
Signed-off-by: NTaekgyun Ko <taeggyun.ko@samsung.com>
Reviewed-by: NSimon Glass <sjg@google.com>
Signed-off-by: NYuvaraj Kumar C D <yuvaraj.cd@samsung.com>
Signed-off-by: NAndrew Bresticker <abrestic@google.com>
[wsa: rebased to v3.12-rc4 (no of_i2c.h anymore)]
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Add i2c support for the on-board PLD found on some Kontron embedded
modules.

Originally-From: Michael Brunner <michael.brunner@kontron.com>
Signed-off-by: NKevin Strasser <kevin.strasser@linux.intel.com>
Acked-by: NGuenter Roeck <linux@roeck-us.net>
Acked-by: NDarren Hart <dvhart@linux.intel.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

This patch adds support for the I2C bus controllers found on Wondermedia
8xxx-series SoCs. Only master-mode is supported.
Signed-off-by: NTony Prisk <linux@prisktech.co.nz>
[wsa: fixed one macro to shift 8 instead of 16]
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Moorestown support is removed from kernel and Medfield is supported by
i2c-designware-pci. But i2c-intel-mid is still in upstream and community
resources are wasted to maintain it.
Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

This implements a very basic I2C host driver for the BCM2835 SoC. Missing
features so far are:

* 10-bit addressing.
* DMA.
Reviewed-by: NGrant Likely <grant.likely@secretlab.ca>
Signed-off-by: NStephen Warren <swarren@wwwdotorg.org>
Signed-off-by: NWolfram Sang <wolfram@the-dreams.de>

The iSMT (Intel SMBus Message Transport) supports multi-master I2C/SMBus,
as well as IPMI.  It's operation is DMA-based and utilizes descriptors to
initiate transactions on the bus.

The iSMT hardware can act as both a master and a target, although this
driver only supports being a master.
Signed-off-by: NNeil Horman <nhorman@tuxdriver.com>
Signed-off-by: NBill Brown <bill.e.brown@intel.com>
Tested-by: NSeth Heasley <seth.heasley@intel.com>
Reviewed-by: NJean Delvare <khali@linux-fr.org>
Signed-off-by: NWolfram Sang <wolfram@the-dreams.de>

This adds the mfd cell to use the i2c part of the Nano River Technologies
viperboard as i2c master.
Signed-off-by: NLars Poeschel <poeschel@lemonage.de>
Signed-off-by: NSamuel Ortiz <sameo@linux.intel.com>

Add i2c driver to enable access to devices behind CBUS on Nokia Internet
Tablets.

The patch also adds CBUS I2C configuration for N8x0 which is one of the
users of this driver.
Acked-by: NFelipe Balbi <balbi@ti.com>
Acked-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NAaro Koskinen <aaro.koskinen@iki.fi>
Signed-off-by: NWolfram Sang <w.sang@pengutronix.de>

Move the i2c-stub driver to drivers/i2c, to match the Kconfig entry.
This is less confusing that way.

I also fixed all checkpatch warnings and errors.
Signed-off-by: NJean Delvare <khali@linux-fr.org>
Cc: Peter Huewe <peterhuewe@gmx.de>

R-Car I2C is similar with SH7760 I2C.
But the SH7760 I2C driver had many workaround operations, since H/W had bugs.
Thus, it was pointless to keep compatible between SH7760 and R-Car I2C drivers.
This patch creates new Renesas R-Car I2C driver.
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: NWolfram Sang <w.sang@pengutronix.de>

This driver has the following properties compared to the old driver:
1. Support for multiple interfaces.
2. Interrupt driven I/O as opposed to polling/busy waiting.
3. Support for _one_ repeated start (Sr) condition, which is enough
   for most real-world applications including all SMBus transfer types.
   (The hardware does not support issuing arbitrary Sr conditions on the
    bus.)

testing: SoC: at91sam9g45
	 - BQ20Z80 battery SMBus client.
	 - on a 2.6.38 kernel with several i2c clients (temp-sensor,
	   audio-codec, touchscreen-controller, w1-bridge, io-expanders)
Signed-off-by: NNikolaus Voss <n.voss@weinmann.de>
Reviewed-by: NFelipe Balbi <balbi@ti.com>
Tested-by: NHubert Feurstein <h.feurstein@gmail.com>
Tested-by: NLudovic Desroches <ludovic.desroches@atmel.com>
Reviewed-by: NNicolas Ferre <nicolas.ferre@atmel.com>

[wsa: squashed with the following patches from Ludovic to have some flaws
fixed:
        i2c: at91: use managed resources
        i2c: at91: add warning about transmission issues for some devices
        i2c: at91: use an id table for SoC dependent parameters
]
Signed-off-by: NLudovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: NWolfram Sang <w.sang@pengutronix.de>

It will get replaced by a superior one. Safe to remove since this one
depends on BROKEN anyhow.
Signed-off-by: NNikolaus Voss <n.voss@weinmann.de>
Tested-by: NLudovic Desroches <ludovic.desroches@atmel.com>
Reviewed-by: NNicolas Ferre <nicolas.ferre@atmel.com>

[wsa: added commit message]
Signed-off-by: NWolfram Sang <w.sang@pengutronix.de>

This patch adds config I2C_DESIGNWARE_CORE in Kconfig, and let
I2C_DESIGNWARE_PLATFORM and I2C_DESIGNWARE_PCI select I2C_DESIGNWARE_CORE.

Because both I2C_DESIGNWARE_PLATFORM and I2C_DESIGNWARE_PCI can be built as
built-in or module, we also need to export the functions in i2c-designware-core.

This fixes below build error when CONFIG_I2C_DESIGNWARE_PLATFORM=y &&
CONFIG_I2C_DESIGNWARE_PCI=y:

  LD      drivers/i2c/busses/built-in.o
drivers/i2c/busses/i2c-designware-pci.o: In function `i2c_dw_clear_int':
i2c-designware-core.c:(.text+0xa10): multiple definition of `i2c_dw_clear_int'
drivers/i2c/busses/i2c-designware-platform.o:i2c-designware-platdrv.c:(.text+0x928): first defined here
drivers/i2c/busses/i2c-designware-pci.o: In function `i2c_dw_init':
i2c-designware-core.c:(.text+0x178): multiple definition of `i2c_dw_init'
drivers/i2c/busses/i2c-designware-platform.o:i2c-designware-platdrv.c:(.text+0x90): first defined here
drivers/i2c/busses/i2c-designware-pci.o: In function `dw_readl':
i2c-designware-core.c:(.text+0xe8): multiple definition of `dw_readl'
drivers/i2c/busses/i2c-designware-platform.o:i2c-designware-platdrv.c:(.text+0x0): first defined here
drivers/i2c/busses/i2c-designware-pci.o: In function `i2c_dw_isr':
i2c-designware-core.c:(.text+0x724): multiple definition of `i2c_dw_isr'
drivers/i2c/busses/i2c-designware-platform.o:i2c-designware-platdrv.c:(.text+0x63c): first defined here
drivers/i2c/busses/i2c-designware-pci.o: In function `i2c_dw_xfer':
i2c-designware-core.c:(.text+0x4b0): multiple definition of `i2c_dw_xfer'
drivers/i2c/busses/i2c-designware-platform.o:i2c-designware-platdrv.c:(.text+0x3c8): first defined here
drivers/i2c/busses/i2c-designware-pci.o: In function `i2c_dw_is_enabled':
i2c-designware-core.c:(.text+0x9d4): multiple definition of `i2c_dw_is_enabled'
drivers/i2c/busses/i2c-designware-platform.o:i2c-designware-platdrv.c:(.text+0x8ec): first defined here
drivers/i2c/busses/i2c-designware-pci.o: In function `dw_writel':
i2c-designware-core.c:(.text+0x124): multiple definition of `dw_writel'
drivers/i2c/busses/i2c-designware-platform.o:i2c-designware-platdrv.c:(.text+0x3c): first defined here
drivers/i2c/busses/i2c-designware-pci.o: In function `i2c_dw_xfer_msg':
i2c-designware-core.c:(.text+0x2e8): multiple definition of `i2c_dw_xfer_msg'
drivers/i2c/busses/i2c-designware-platform.o:i2c-designware-platdrv.c:(.text+0x200): first defined here
drivers/i2c/busses/i2c-designware-pci.o: In function `i2c_dw_enable':
i2c-designware-core.c:(.text+0x9c8): multiple definition of `i2c_dw_enable'
drivers/i2c/busses/i2c-designware-platform.o:i2c-designware-platdrv.c:(.text+0x8e0): first defined here
drivers/i2c/busses/i2c-designware-pci.o: In function `i2c_dw_read_comp_param':
i2c-designware-core.c:(.text+0xa24): multiple definition of `i2c_dw_read_comp_param'
drivers/i2c/busses/i2c-designware-platform.o:i2c-designware-platdrv.c:(.text+0x93c): first defined here
drivers/i2c/busses/i2c-designware-pci.o: In function `i2c_dw_disable':
i2c-designware-core.c:(.text+0x9dc): multiple definition of `i2c_dw_disable'
drivers/i2c/busses/i2c-designware-platform.o:i2c-designware-platdrv.c:(.text+0x8f4): first defined here
drivers/i2c/busses/i2c-designware-pci.o: In function `i2c_dw_func':
i2c-designware-core.c:(.text+0x710): multiple definition of `i2c_dw_func'
drivers/i2c/busses/i2c-designware-platform.o:i2c-designware-platdrv.c:(.text+0x628): first defined here
drivers/i2c/busses/i2c-designware-pci.o: In function `i2c_dw_disable_int':
i2c-designware-core.c:(.text+0xa18): multiple definition of `i2c_dw_disable_int'
drivers/i2c/busses/i2c-designware-platform.o:i2c-designware-platdrv.c:(.text+0x930): first defined here
make[3]: *** [drivers/i2c/busses/built-in.o] Error 1
make[2]: *** [drivers/i2c/busses] Error 2
make[1]: *** [drivers/i2c] Error 2
make: *** [drivers] Error 2
Signed-off-by: NAxel Lin <axel.lin@gmail.com>
Signed-off-by: NJean Delvare <khali@linux-fr.org>
Tested-by: NJiri Slaby <jslaby@suse.cz>
Cc: stable@vger.kernel.org [3.2+]