Remember, ida IDs start at 0, not 1!
Signed-off-by: NLyude Paul <lyude@redhat.com>
Reviewed-by: NKarol Herbst <kherbst@redhat.com>
Cc: stable@vger.kernel.org
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>

Fix 32-bit arm build.
Signed-off-by: NDave Airlie <airlied@redhat.com>
From: Rob Clark <robdclark@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/CAF6AEGt7s20e4aJmnOFM-uZHfYSsicy0E=ssse1D7LTXX4jnWQ@mail.gmail.com

This time mostly further refinement of dpu1+a6xx for sdm845 and
beyond.. and hurray for more negative diffstat :-)

- Misc cleanups and fixes
- GPU preemption optimization
- a6xx perf improvements and clock fixes (ie. lets actually not run at
  minimum clks)
- a6xx devfreq/DCVS
- Lots of code cleanup across dpu (Bruce, Jeykumar, Sean)
- Fixed a few crashes on startup relating to dsi (Sean)
- Add cursor support (Sravanthi, Sean)
- Properly free mdss irq on destroy (Jordan)
- Use correct encoder_type when initializing, fixes crash on boot (Stephen)
Signed-off-by: NDave Airlie <airlied@redhat.com>
From: Rob Clark <robdclark@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/CAF6AEGsNevCzMiLuNW1EVN6gtP3JZSir6PfnWvnCavSZM+bUFQ@mail.gmail.com

This patch uses the proper do_div() macro to perform u64 division and
guards against overflow if the result is too large for the unsigned long
return type

Fixes: a2c3c0a5 drm/msm/a6xx: Add devfreq support for a6xx
Cc: Sharat Masetty <smasetty@codeaurora.org>
Signed-off-by: NSean Paul <seanpaul@chromium.org>
Signed-off-by: NRob Clark <robdclark@gmail.com>

A small fixup I posted with my v2 patch [1] that was dropped.

[1]- https://lists.freedesktop.org/archives/freedreno/2018-October/003647.htmlSigned-off-by: NSean Paul <seanpaul@chromium.org>
Signed-off-by: NRob Clark <robdclark@gmail.com>

I've realised that the commit 3dae1c09 ("drm/arm/malidp: Implemented
the size validation for AFBC framebuffers") got bungled up in the
upstreaming process and it was missing an important line from the
function that calculates the size of the AFBC framebuffer
Signed-off-by: NDave Airlie <airlied@redhat.com>
From: Liviu Dudau <Liviu.Dudau@arm.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181005152423.GF1156@e110455-lin.cambridge.arm.com

The CP performance counter selects were accidentally marked as protected
so they couldn't be written from PM4 streams. Remove the protection
because user space does have an interest in setting up their own
counters.
Signed-off-by: NJordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: NRob Clark <robdclark@gmail.com>

We are currently leaking a drm_crtc_commit struct for every atomic
commit containing plane state. The dpu plane destroy function cleans up
the fb reference manually, but fails to release the commit ref. As a
result, we just keep allocating drm_crtc_commits without ever freeing
them. Fortunately there's a helper function which will clean up all of
our mess at once, so use that.

Thanks to Doug Anderson for reporting the memory leak (and leaving
breadcrumbs from kmemleak!).
Reported-by: NDoug Anderson <dianders@chromium.org>
Signed-off-by: NSean Paul <seanpaul@chromium.org>
Signed-off-by: NRob Clark <robdclark@gmail.com>

This patch uses the proper do_div() macro to perform u64 division and
guards against overflow if the result is too large for the unsigned long
return type

Fixes: de0a3d09 drm/msm: re-factor devfreq code
Cc: Sharat Masetty <smasetty@codeaurora.org>
Signed-off-by: NSean Paul <seanpaul@chromium.org>
Signed-off-by: NRob Clark <robdclark@gmail.com>

Signed-off-by: NRob Clark <robdclark@gmail.com>

size for AFBC buffers

The size of the superblocks being added to the total AFBC buffer size
got lost in the upstreaming process. Add it back.
Reviewed-by: NAyan Kumar Halder <ayan.halder@arm.com>
Signed-off-by: NLiviu Dudau <liviu.dudau@arm.com>

Implement routines to estimate GPU busy time and fetching the
current frequency for the polling interval. This is required by
the devfreq framework which recommends a frequency change if needed.
The driver code then tries to set this new frequency on the GPU by
sending an Out Of Band(OOB) request to the GMU.
Signed-off-by: NSharat Masetty <smasetty@codeaurora.org>
Signed-off-by: NRob Clark <robdclark@gmail.com>

The devfreq framework requires the drivers to provide busy time estimations.
The GPU driver relies on the hardware performance counteres for the busy time
estimations, but different hardware revisions have counters which can be
sourced from different clocks. So the busy time estimation will be target
dependent.  Additionally on targets where the clocks are completely controlled
by the on chip microcontroller, fetching and setting the current GPU frequency
will be different. This patch aims to embrace these differences by re-factoring
the devfreq code a bit.
Signed-off-by: NSharat Masetty <smasetty@codeaurora.org>
Signed-off-by: NRob Clark <robdclark@gmail.com>

Add a simple function to read 64 registers in the GMU domain
Signed-off-by: NSharat Masetty <smasetty@codeaurora.org>
Signed-off-by: NRob Clark <robdclark@gmail.com>

Devfreq turns on and starts recommending power level as soon as it is
initialized. The GPU is still not powered on by the time the devfreq
init happens and this leads to problems on GPU's where register access
is needed to get/set power levels. So we start suspended and only restart
devfreq when GPU is powered on.
Signed-off-by: NSharat Masetty <smasetty@codeaurora.org>
Signed-off-by: NRob Clark <robdclark@gmail.com>

misc mali-dp updates.
Signed-off-by: NDave Airlie <airlied@redhat.com>
From: Liviu Dudau <Liviu.Dudau@arm.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181003105009.GD1156@e110455-lin.cambridge.arm.com

drm/tilcdc changes for Linux v4.20

suspend/resume update.
Signed-off-by: NDave Airlie <airlied@redhat.com>

From: Jyri Sarha <jsarha@ti.com>
Link: https://patchwork.freedesktop.org/patch/msgid/bd8d6b40-d3d6-8e24-9d48-6201b860aceb@ti.com

I have some pulls based on rc6, and I prefer to have an explicit backmerge.
Signed-off-by: NDave Airlie <airlied@redhat.com>

Merge tag 'exynos-drm-next-for-v4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos into drm-next

Add out-bridge support
- This patch series enables out-bridge for LVDS bridge device support,
  and also includes two cleanups and one relevant dt binding update
  for this.

Add Samsung 16x16 tiled format support
- This patch series adds Samsung 16x16 tiled format to scaler and
  gsc drivers. As for this, it adds Samsung specific format to
  drm_forcc.h header. For the git-pull request with relevant patches,
  I requested ack-by[1] to relevant maintainers but there was no any response.
  I'm pretty sure no problem to go to mainline though Exynos tree
  because the only user of it is Exynos.
(airlied: this looked fine to me)

[1] https://patchwork.freedesktop.org/patch/243921/

Add configurable plane alpha and pixel blend mode support
- This patch series makes mixer driver to be configuragle for
  pixel blend mode and plane alpha, which also includes one fixup
  to set all default values correctly after reset.

One cleanup
- This patch replaces drm_atomic_helper_suspend/resume() with
  drm_mode_config_helper_suspend/resume() to remove exynos specific
  suspend_state.
Signed-off-by: NDave Airlie <airlied@redhat.com>

From: Inki Dae <inki.dae@samsung.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1538380891-24040-1-git-send-email-inki.dae@samsung.com

Merge tag 'omapdrm-4.20-2' of git://git.kernel.org/pub/scm/linux/kernel/git/tomba/linux into drm-next

omapdrm fixes and cleanups for 4.20

- fix memory barrier bug in DMM driver
- fix interrupt management in DMM driver
- partial workaround for errata i878
- fix use of freed memory
- some cleanups
Signed-off-by: NDave Airlie <airlied@redhat.com>

From: Tomi Valkeinen <tomi.valkeinen@ti.com>
Link: https://patchwork.freedesktop.org/patch/msgid/36bdd576-2b5c-d69e-24af-05572652b08e@ti.com

Merge tag 'drm-misc-next-fixes-2018-10-03' of git://anongit.freedesktop.org/drm/drm-misc into drm-next

- Add EXPERT config option to allow phys mem leak from fbdev for blob drivers (Neil)

Cc: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: NDave Airlie <airlied@redhat.com>

From: Sean Paul <sean@poorly.run>
Link: https://patchwork.freedesktop.org/patch/msgid/20181003195957.GA64584@art_vandelay

The target definition for a630 didn't set a reasonable
value for inactive_period so it defaulted to zero and
we were essentially powering down after every submission.
Set it back to the default value to keep the GPU from
bouncing too much during regular workloads.
Signed-off-by: NJordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: NRob Clark <robdclark@gmail.com>

This patch unifies the naming of DRM functions for reference counting
of struct drm_device. The resulting code is more aligned with the rest
of the Linux kernel interfaces.
Signed-off-by: NThomas Zimmermann <tzimmermann@suse.de>
Signed-off-by: NRob Clark <robdclark@gmail.com>

This patch unifies the naming of DRM functions for reference counting
of struct drm_gem_object. The resulting code is more aligned with the
rest of the Linux kernel interfaces.
Signed-off-by: NThomas Zimmermann <tzimmermann@suse.de>
Reviewed-by: NJordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: NRob Clark <robdclark@gmail.com>

This patch unifies the naming of DRM functions for reference counting
of struct drm_framebuffer. The resulting code is more aligned with the
rest of the Linux kernel interfaces.
Signed-off-by: NThomas Zimmermann <tzimmermann@suse.de>
Signed-off-by: NRob Clark <robdclark@gmail.com>

The only HFI communication with the GMU on sdm845 happens
during initialization and all commands are synchronous. A fancy
interrupt tasklet and associated infrastructure is entirely
not eeded and puts us at the mercy of the scheduler.

Instead poll for the message signal and handle the response
immediately and go on our way.
Signed-off-by: NJordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: NRob Clark <robdclark@gmail.com>

The point of the 'force_dma' parameter for of_dma_configure
is to force the device to be set up even if DMA capability is
not described by the firmware which is exactly the use case
 we have for GMU - we need SMMU to get set up but we have no
other dma capabilities since memory is managed by the GPU
driver. Currently we pass false so of_dma_configure() fails
and subsequently GMU and GPU probe does as well.

Fixes: 4b565ca5 ("drm/msm: Add A6XX device support")
Signed-off-by: NJordan Crouse <jcrouse@codeaurora.org>
Tested-by: NSibi Sankar <sibis@codeaurora.org>
Signed-off-by: NRob Clark <robdclark@gmail.com>

In the case where preemption is not enabled, this patch simply skips
preemption related initialization in hardware init sequence.
Signed-off-by: NSharat Masetty <smasetty@codeaurora.org>
Reviewed-by: NJordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: NRob Clark <robdclark@gmail.com>

The return from the call to _mixer_stages can be a negative error
code however this is being assigned to an unsigned variable 'stages'
hence the check is always false. Fix this by making 'stages' an
int.

Detected by Coccinelle ("Unsigned expression compared with zero:
stages < 0")

Fixes: 25fdd593 ("drm/msm: Add SDM845 DPU support")
Signed-off-by: NColin Ian King <colin.king@canonical.com>
Signed-off-by: NRob Clark <robdclark@gmail.com>

The current design greedily takes a big chunk of the PDC
register space instead of just the GPU specific sections
which conflicts with other drivers and generally makes
a mess of things.

Furthermore we only need to map the GPU PDC sections
just once during init so map the memory inside the function
that uses it and adjust the pointers and register offsets
accordingly.
Signed-off-by: NJordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: NRob Clark <robdclark@gmail.com>

>From the review for the DT bindings for the GPU/GMU it
was suggested that the phandle for the GMU be
'qcom,gmu' instead of just 'gmu'.
Signed-off-by: NJordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: NRob Clark <robdclark@gmail.com>

When CONFIG_DEV_COREDUMP isn't defined msm_gpu_crashstate_capture
doesn't pass the correct parameters.
drivers/gpu/drm/msm/msm_gpu.c: In function ‘recover_worker’:
drivers/gpu/drm/msm/msm_gpu.c:479:34: error: passing argument 2 of ‘msm_gpu_crashstate_capture’ from incompatible pointer type [-Werror=incompatible-pointer-types]
  msm_gpu_crashstate_capture(gpu, submit, comm, cmd);
                                  ^~~~~~
drivers/gpu/drm/msm/msm_gpu.c:388:13: note: expected ‘char *’ but argument is of type ‘struct msm_gem_submit *’
 static void msm_gpu_crashstate_capture(struct msm_gpu *gpu, char *comm,
             ^~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/msm/msm_gpu.c:479:2: error: too many arguments to function ‘msm_gpu_crashstate_capture’
  msm_gpu_crashstate_capture(gpu, submit, comm, cmd);
  ^~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/msm/msm_gpu.c:388:13: note: declared here
 static void msm_gpu_crashstate_capture(struct msm_gpu *gpu, char *comm,

In current code the function msm_gpu_crashstate_capture parameters.

Fixes: cdb95931 ("drm/msm/gpu: Add the buffer objects from the submit to the crash dump")
Signed-off-by: NAnders Roxell <anders.roxell@linaro.org>
Reviewed-By: NJordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: NRob Clark <robdclark@gmail.com>

The index of the perf table was being set in the wrong bit position
in the register. With this fix, the GPU clock can be seen running at
desired frequency.
Signed-off-by: NSharat Masetty <smasetty@codeaurora.org>
Signed-off-by: NRob Clark <robdclark@gmail.com>

The [v]snprintf() functions return the size that *would have* been
written into the buffer, rather than the size *actually* written.
Which results in us trying to memcpy() past the end of the stack.

What we really want is [v]scnprintf().
Signed-off-by: NRob Clark <robdclark@gmail.com>

cur_master in dpu_encoder is assigned at modeset and cleared on
.disable(). Unfortunately dpms (or enable/disable) does not guarantee a
modeset, so cur_master is NULL when we try to re-enable it.

This patch moves the NULL assignment to setup_display where it will be
re-assigned later in the function.
Tested-by: NBruce Wang <bzwang@chromium.org>
Reviewed-by: NJeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: NSean Paul <seanpaul@chromium.org>
Signed-off-by: NRob Clark <robdclark@gmail.com>

Remove unneeded checks from _dpu_plane_get_aspace.

v3: change _dpu_plane_get_aspace to return a struct
*msm_gem_address_space instead passing in a pointer of the same
type to edit. Remove uneeded arguments.
Reviewed-by: NJordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: NBruce Wang <bzwang@chromium.org>
Signed-off-by: NSean Paul <seanpaul@chromium.org>
Signed-off-by: NRob Clark <robdclark@gmail.com>

Removed all impossible checks from the function, which eliminates
the need for a return value. This function is also never used
outside of dpu_plane.c, so the function is made static.

v3: Using helper function _dpu_plane_get_kms() instead of doing
it locally.
Signed-off-by: NBruce Wang <bzwang@chromium.org>
Reviewed-by: NSean Paul <seanpaul@chromium.org>
Signed-off-by: NSean Paul <seanpaul@chromium.org>
Signed-off-by: NRob Clark <robdclark@gmail.com>

Removes redundant tests for _dpu_crtc_vblank_enable_no_lock.
Function return type is now void and all function calls have
been changed accordingly.
Signed-off-by: NBruce Wang <bzwang@chromium.org>
Reviewed-by: NSean Paul <seanpaul@chromium.org>
Signed-off-by: NSean Paul <seanpaul@chromium.org>
Signed-off-by: NRob Clark <robdclark@gmail.com>

All checks for _dpu_crtc_power_enable are not true, so the function
can never return an error code. This removes the need for the
function as pm_runtime functions can be used instead.

v3: Separated _dpu_crtc_power_enable into _dpu_crtc_power_enable and
_dpu_crtc_power_disable for clarity.

v4: Removed both _dpu_crtc_power_enable and _dpu_crtc_power_disable
and called pm_runtime_get_sync and pm_runtime_put_sync from all
call points
Reviewed-by: NJordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: NBruce Wang <bzwang@chromium.org>
Signed-off-by: NSean Paul <seanpaul@chromium.org>
Signed-off-by: NRob Clark <robdclark@gmail.com>

Removes impossible checks in dpu_crtc.c.
Variable assignments are moved up to be initializations where
possible. Some variables are no longer used, these are removed.

v3: reverted back to original patch
Reviewed-by: NSean Paul <seanpaul@chromium.org>
Reviewed-by: NJordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: NBruce Wang <bzwang@chromium.org>
Signed-off-by: NSean Paul <seanpaul@chromium.org>
Signed-off-by: NRob Clark <robdclark@gmail.com>