1. 03 6月, 2020 3 次提交
  2. 02 6月, 2020 2 次提交
  3. 01 6月, 2020 1 次提交
    • C
      drm/i915: Handle very early engine initialisation failure · 0b0b2549
      Chris Wilson 提交于
      If we fail during engine setup, we may leave some engines not yet setup.
      During the error cleanup, we have to be careful not to try and use the
      uninitialise engines before discarding them.
      
      [   16.136152] RIP: 0010:__flush_work+0x198/0x1b0
      [   16.136168] Code: ff ff 8b 0b 48 8b 53 08 83 e1 08 48 0f ba 2b 03 80 c9 f0 e9 63 ff ff ff 0f 0b 48 83 c4 48 44 89 f0 5b 5d 41 5c 41 5d 41 5e c3 <0f> 0b 45 31 f6 e9 62 ff ff ff 66 66 2e 0f 1f 84 00 00 00 00 00 0f
      [   16.136186] RSP: 0018:ffffc900003bb928 EFLAGS: 00010246
      [   16.136201] RAX: 0000000000000000 RBX: ffff88844f392168 RCX: 0000000000000000
      [   16.136216] RDX: 0000000000000000 RSI: 0000000000000000 RDI: ffff88844f392168
      [   16.136231] RBP: ffff88844f392130 R08: 0000000000000000 R09: 0000000000000001
      [   16.136246] R10: ffff888441e31e40 R11: ffff88845e329c70 R12: ffff88844f796988
      [   16.136261] R13: ffff888441e4fb80 R14: 0000000000000001 R15: ffff88844f790000
      [   16.136388] FS:  00007fecbd208880(0000) GS:ffff88845e380000(0000) knlGS:0000000000000000
      [   16.136405] CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
      [   16.136420] CR2: 00007ff3ce748f90 CR3: 0000000457a6a001 CR4: 00000000000606e0
      [   16.136437] Call Trace:
      [   16.136456]  ? try_to_del_timer_sync+0x3a/0x50
      [   16.136529]  intel_wakeref_wait_for_idle+0x87/0xb0 [i915]
      [   16.136606]  ? intel_engines_release+0x68/0xc0 [i915]
      [   16.136680]  intel_engines_release+0x49/0xc0 [i915]
      [   16.136757]  intel_gt_init+0x2f4/0x5e0 [i915]
      Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
      Reviewed-by: NMika Kuoppala <mika.kuoppala@linux.intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20200601072446.19548-1-chris@chris-wilson.co.uk
      0b0b2549
  4. 29 5月, 2020 2 次提交
  5. 28 5月, 2020 4 次提交
  6. 27 5月, 2020 1 次提交
  7. 26 5月, 2020 2 次提交
  8. 25 5月, 2020 2 次提交
  9. 21 5月, 2020 3 次提交
  10. 20 5月, 2020 5 次提交
  11. 19 5月, 2020 4 次提交
  12. 18 5月, 2020 1 次提交
  13. 14 5月, 2020 6 次提交
    • C
      drm/i915/gt: Transfer old virtual breadcrumbs to irq_worker · 0f4013fb
      Chris Wilson 提交于
      The second try at staging the transfer of the breadcrumb. In part one,
      we realised we could not simply move to the second engine as we were
      only holding the breadcrumb lock on the first. So in commit 6c81e21a
      ("drm/i915/gt: Stage the transfer of the virtual breadcrumb"), we
      removed it from the first engine and marked up this request to reattach
      the signaling on the new engine. However, this failed to take into
      account that we only attach the breadcrumb if the new request is added
      at the start of the queue, which if we are transferring, it is because
      we know there to be a request to be signaled (and hence we would not be
      attached).
      
      In this attempt, we try to transfer the completed requests to the
      irq_worker on its rq->engine->breadcrumbs. This preserves the coupling
      between the rq and its breadcrumbs, so that
      i915_request_cancel_breadcrumb() does not attempt to manipulate the list
      under the wrong lock.
      
      v2: Code sharing is fun.
      
      Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/1862
      Fixes: 6c81e21a ("drm/i915/gt: Stage the transfer of the virtual breadcrumb")
      Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
      Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
      Reviewed-by: NTvrtko Ursulin <tvrtko.ursulin@intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20200513074809.18194-1-chris@chris-wilson.co.uk
      0f4013fb
    • C
      drm/i915: Show per-engine default property values in sysfs · 7a0ba6b4
      Chris Wilson 提交于
      By providing the default values configured into the kernel via sysfs, it
      is much more convenient for userspace to restore those sane defaults, or
      at least know what are considered good baseline. This is useful, for
      example, to cleanup after any failed userspace prior to commencing new
      jobs.
      
      /sys/class/drm/card0/engine/rcs0/
      ├── capabilities
      ├── class
      ├── .defaults
      │   ├── heartbeat_interval_ms
      │   ├── max_busywait_duration_ns
      │   ├── preempt_timeout_ms
      │   ├── stop_timeout_ms
      │   └── timeslice_duration_ms
      ├── heartbeat_interval_ms
      ├── instance
      ├── known_capabilities
      ├── max_busywait_duration_ns
      ├── mmio_base
      ├── name
      ├── preempt_timeout_ms
      ├── stop_timeout_ms
      └── timeslice_duration_ms
      Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
      Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
      Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
      Reviewed-by: NMaciej Patelczyk <maciej.patelczyk@intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20200514062905.28668-1-chris@chris-wilson.co.uk
      7a0ba6b4
    • C
      drm/i915: Drop no-semaphore boosting · 18e4af04
      Chris Wilson 提交于
      Now that we have fast timeslicing on semaphores, we no longer need to
      prioritise none-semaphore work as we will yield any work blocked on a
      semaphore to the next in the queue. Previously with no timeslicing,
      blocking on the semaphore caused extremely bad scheduling with multiple
      clients utilising multiple rings. Now, there is no impact and we can
      remove the complication.
      Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
      Reviewed-by: NMika Kuoppala <mika.kuoppala@linux.intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20200513173504.28322-1-chris@chris-wilson.co.uk
      18e4af04
    • C
      drm/i915: Mark the addition of the initial-breadcrumb in the request · 795d4d7f
      Chris Wilson 提交于
      The initial-breadcrumb is used to mark the end of the awaiting and the
      beginning of the user payload. We verify that we do not start the user
      payload before all signaler are completed, checking our semaphore setup
      by looking for the initial breadcrumb being written too early. We also
      want to ensure that we do not add semaphore waits after we have already
      closed the semaphore section, an issue for later deferred waits.
      Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
      Reviewed-by: NMika Kuoppala <mika.kuoppala@linux.intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20200513165937.9508-2-chris@chris-wilson.co.uk
      795d4d7f
    • N
      drm/i915: Remove duplicate inline specifier on write_pte · b2379ba2
      Nathan Chancellor 提交于
      When building with clang:
      
       drivers/gpu/drm/i915/gt/gen8_ppgtt.c:392:24: warning: duplicate
       'inline' declaration specifier [-Wduplicate-decl-specifier]
       declaration specifier [-Wduplicate-decl-specifier]
       static __always_inline inline void
                              ^
       include/linux/compiler_types.h:138:16: note: expanded from macro
       'inline'
       #define inline inline __gnu_inline __inline_maybe_unused notrace
                      ^
       1 warning generated.
      
      __always_inline is defined as 'inline __attribute__((__always_inline))'
      so we do not need to specify it twice.
      
      Fixes: 84eac0c6 ("drm/i915/gt: Force pte cacheline to main memory")
      Link: https://github.com/ClangBuiltLinux/linux/issues/1024Reported-by: Nkbuild test robot <lkp@intel.com>
      Signed-off-by: NNathan Chancellor <natechancellor@gmail.com>
      Reviewed-by: NChris Wilson <chris@chris-wilson.co.uk>
      Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
      Link: https://patchwork.freedesktop.org/patch/msgid/20200513182340.3968668-1-natechancellor@gmail.com
      b2379ba2
    • C
      drm/i915/gt: Suspend tasklets before resume sanitization · 4a0ca47a
      Chris Wilson 提交于
      It is possible for a residual tasklet to be pending execution as we
      resume (whether that's some prior test kicking off the tasklet, or if we
      are in a suspend/resume stress test). As such, we do not want that
      tasklet to execute in the middle of our sanitization, such that it sees
      the poisoned state. For example,
      
      <4>[  449.386553] invalid opcode: 0000 [#1] PREEMPT SMP NOPTI
      <4>[  449.386555] CPU: 1 PID: 5115 Comm: i915_selftest Tainted: G     U  W         5.7.0-rc4-CI-CI_DRM_8472+ #1
      <4>[  449.386556] Hardware name: Intel Corporation Ice Lake Client Platform/IceLake U DDR4 SODIMM PD RVP TLC, BIOS ICLSFWR1.R00.3183.A00.1905020411 05/02/2019
      <4>[  449.386585] RIP: 0010:process_csb+0x6bf/0x830 [i915]
      <4>[  449.386588] Code: 00 48 c7 c2 10 bc 4c a0 48 c7 c7 d4 75 34 a0 e8 87 0e e6 e0 bf 01 00 00 00 e8 9d e0 e5 e0 31 f6 bf 09 00 00 00 e8 e1 ba d6 e0 <0f> 0b 8b 87 10 05 00 00 85 c0 0f 85 5f f9 ff ff 48 c7 c1 70 a5 4f
      <4>[  449.386591] RSP: 0018:ffffc90000170ea0 EFLAGS: 00010297
      <4>[  449.386594] RAX: 0000000080000101 RBX: 0000000000000000 RCX: 0000000000000000
      <4>[  449.386596] RDX: ffff88849d5bc040 RSI: 0000000000000000 RDI: 0000000000000009
      <4>[  449.386598] RBP: ffffc90000170f00 R08: 0000000000000000 R09: 0000000000000000
      <4>[  449.386600] R10: 0000000000000000 R11: 0000000000000000 R12: ffff88843ccea018
      <4>[  449.386602] R13: ffff88843ccea658 R14: ffff88843ccea640 R15: ffff88843ccea000
      <4>[  449.386605] FS:  00007f826a813300(0000) GS:ffff88849fe80000(0000) knlGS:0000000000000000
      <4>[  449.386607] CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
      <4>[  449.386609] CR2: 0000560366b94280 CR3: 000000048ba02002 CR4: 0000000000760ee0
      <4>[  449.386611] PKRU: 55555554
      <4>[  449.386613] Call Trace:
      <4>[  449.386616]  <IRQ>
      <4>[  449.386646]  ? execlists_submission_tasklet+0xcf/0x140 [i915]
      <4>[  449.386674]  execlists_submission_tasklet+0x2f/0x140 [i915]
      <4>[  449.386679]  tasklet_action_common.isra.16+0x6c/0x1c0
      <4>[  449.386684]  __do_softirq+0xdf/0x49e
      <4>[  449.386687]  irq_exit+0xba/0xc0
      <4>[  449.386690]  smp_apic_timer_interrupt+0xb7/0x280
      <4>[  449.386693]  apic_timer_interrupt+0xf/0x20
      <4>[  449.386695]  </IRQ>
      <4>[  449.386698] RIP: 0010:_raw_spin_unlock_irqrestore+0x49/0x60
      <4>[  449.386701] Code: c7 02 75 1f 53 9d e8 26 ab 75 ff bf 01 00 00 00 e8 7c a3 69 ff 65 8b 05 7d 9b 5c 7e 85 c0 74 0c 5b 5d c3 e8 09 aa 75 ff 53 9d <eb> df e8 ca 39 5b ff 5b 5d c3 0f 1f 00 66 2e 0f 1f 84 00 00 00 00
      <4>[  449.386703] RSP: 0018:ffffc90000a6b950 EFLAGS: 00000202 ORIG_RAX: ffffffffffffff13
      <4>[  449.386706] RAX: 0000000080000001 RBX: 0000000000000202 RCX: 0000000000000000
      <4>[  449.386708] RDX: ffff88849d5bc040 RSI: ffff88849d5bc900 RDI: ffffffff82386f12
      <4>[  449.386710] RBP: ffff88847d400f00 R08: ffff88849d5bc900 R09: 0000000000000000
      <4>[  449.386712] R10: 0000000000000000 R11: 0000000000000000 R12: 00000000ffff0b0b
      <4>[  449.386714] R13: 000000000000000c R14: ffff88847d40bf70 R15: ffff88847d40cef8
      <4>[  449.386742]  reset_csb_pointers+0x59/0x140 [i915]
      <4>[  449.386769]  execlists_sanitize+0x3e/0x60 [i915]
      <4>[  449.386797]  gt_sanitize+0xd6/0x260 [i915]
      
      As part of the reset preparation, engine->reset.prepare() prevents the
      tasklet from running, so pull the sanitization inside the critical
      section for reset.
      
      Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/1812
      Fixes: 23122a4d ("drm/i915/gt: Scrub execlists state on resume")
      Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
      Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
      Reviewed-by: NMika Kuoppala <mika.kuoppala@linux.intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20200513122826.27484-1-chris@chris-wilson.co.uk
      4a0ca47a
  14. 13 5月, 2020 2 次提交
  15. 12 5月, 2020 2 次提交