- 14 9月, 2019 1 次提交
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由 Hawking Zhang 提交于
For the hardware that can not enable BIF ring for IH cookies for both ras_controller_irq and err_event_athub_irq, the driver has to poll the status register in irq handling and ack the hardware properly when there is interrupt triggered Signed-off-by: NHawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 11 6月, 2019 1 次提交
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由 Sam Ravnborg 提交于
Drop use of drmP.h in all files named amdgpu* in drm/amd/amdgpu/ Fix fallout. Signed-off-by: NSam Ravnborg <sam@ravnborg.org> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Cc: "Christian König" <christian.koenig@amd.com> Cc: "David (ChunMing) Zhou" <David1.Zhou@amd.com> Cc: David Airlie <airlied@linux.ie> Cc: Daniel Vetter <daniel@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/20190609220757.10862-10-sam@ravnborg.org
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- 14 2月, 2019 1 次提交
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由 Christian König 提交于
Remove the callback and call the dispatcher directly. Signed-off-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NFelix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 26 1月, 2019 1 次提交
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由 Christian König 提交于
Previously we only added the ring buffer memory, now add the handling as well. Signed-off-by: NChristian König <christian.koenig@amd.com> Acked-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: NFelix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 15 1月, 2019 1 次提交
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由 Christian König 提交于
To distinct on which IH ring an IV was found. Signed-off-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 08 12月, 2018 2 次提交
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由 Christian König 提交于
The GMC/VM subsystem is causing the faults, so move the handling here as well. Signed-off-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NFelix Kuehling <Felix.Kuehling@amd.com> Acked-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Christian König 提交于
This allows us to filter out VM faults in the GMC code. v2: don't filter out all faults v3: fix copy&paste typo, send all IV to the KFD, don't change message level Signed-off-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NFelix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 06 11月, 2018 1 次提交
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由 Christian König 提交于
Signal a fault to the scheduler on an illegal instruction or register access violation instead of kicking of the reset handler directly. Signed-off-by: NChristian König <christian.koenig@amd.com> Acked-by: NAndrey Grodzovsky <andrey.grodzovsky@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 27 9月, 2018 3 次提交
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由 Christian König 提交于
Everything that isn't related to the IH ring. Signed-off-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NHuang Rui <ray.huang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Christian König 提交于
Add a callback to amdgpu_ih_process to remove most of the IV logic. Signed-off-by: NChristian König <christian.koenig@amd.com> Acked-by: NHuang Rui <ray.huang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Christian König 提交于
Cleanup amdgpu_ih.c to be able to handle multiple interrupt rings. Signed-off-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NHuang Rui <ray.huang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 28 8月, 2018 1 次提交
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由 Christian König 提交于
Check if we should call the function instead of providing the forced flag. v2: rebase on KFD changes (Alex) Signed-off-by: NChristian König <christian.koenig@amd.com> Acked-by: NAndrey Grodzovsky <andrey.grodzovsky@amd.com> Reviewed-by: NHuang Rui <ray.huang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 16 6月, 2018 1 次提交
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由 Slava Abramov 提交于
Add/update function level documentation and add reference to amdgpu_irq.c in amdgpu.rst v2: Added DOC comment Added more explanations for amdgpu_hotplug_work_func Properly formatted unused parameters Properly formatted return values Fixed usage of acronyms More consistent styling v3: Removed duplicate "not" Using '&' to refer to functions and types Signed-off-by: NSlava Abramov <slava.abramov@amd.com> Acked-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NMichel Dänzer <michel.daenzer@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 21 3月, 2018 1 次提交
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由 Rex Zhu 提交于
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NRex Zhu <Rex.Zhu@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 01 3月, 2018 2 次提交
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由 Monk Liu 提交于
since hotplug_work is initialized under the case of no dc support Signed-off-by: NMonk Liu <Monk.Liu@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Monk Liu 提交于
since hotplug_work is initialized under the case of no dc support Signed-off-by: NMonk Liu <Monk.Liu@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 20 2月, 2018 1 次提交
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由 Alex Deucher 提交于
The preinstall callback didn't do anything because not all of the IPs were initialized when it was called. Move the postinstall setup into sequence in the driver. The uninstall callback disabled all interrupt source, but it got called too late in the driver sequence and caused problems with IPs who already freed the relevant data structures. Move the call into the right place in the driver sequence. Acked-by: NChristian König <christian.koenig@amd.com> Acked-by: NHarry Wentland <harry.wentland@amd.com> Tested-By: NMikita Lipski <mikita.lipski@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 18 12月, 2017 1 次提交
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由 Alex Deucher 提交于
add device to the name for consistency. Acked-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 16 12月, 2017 1 次提交
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由 Andrey Grodzovsky 提交于
Add new parameter to control GPU recovery procedure. v2: Add auto logic where reset is disabled for bare metal and enabled for SR-IOV. Allow forced reset from debugfs. Signed-off-by: NAndrey Grodzovsky <andrey.grodzovsky@amd.com> Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 05 12月, 2017 2 次提交
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由 Monk Liu 提交于
1,new imple names amdgpu_gpu_recover which gives more hint on what it does compared with gpu_reset 2,gpu_recover unify bare-metal and SR-IOV, only the asic reset part is implemented differently 3,gpu_recover will increase hang job karma and mark its entity/context as guilty if exceeds limit V2: 4,in scheduler main routine the job from guilty context will be immedialy fake signaled after it poped from queue and its fence be set with "-ECANCELED" error 5,in scheduler recovery routine all jobs from the guilty entity would be dropped 6,in run_job() routine the real IB submission would be skipped if @skip parameter equales true or there was VRAM lost occured. V3: 7,replace deprecated gpu reset, use new gpu recover Signed-off-by: NMonk Liu <Monk.Liu@amd.com> Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 pding 提交于
When this VF stays in exclusive mode for long, other VFs will be impacted. The redundant messages causes exclusive mode timeout when they're redirected. That is a normal use case for cloud service to redirect guest log to virtual serial port. Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: Npding <Pixel.Ding@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 27 9月, 2017 1 次提交
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由 Harry Wentland 提交于
Supported DCE versions: 8.0, 10.0, 11.0, 11.2 v2: rebase against 4.11 Signed-off-by: NHarry Wentland <harry.wentland@amd.com> Acked-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 30 8月, 2017 1 次提交
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由 Emily Deng 提交于
For virtual display, it uses software timer to emulate the vsync interrupt, it doesn't have high precision, so doesn't support disable vblank immediately. BUG: SWDEV-129274 Signed-off-by: NEmily Deng <Emily.Deng@amd.com> Reviewed-by: NMichel Dänzer <michel.daenzer@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 24 8月, 2017 1 次提交
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由 Emily Deng 提交于
For virtual display, it uses software timer to emulate the vsync interrupt, it doesn't have high precision, so doesn't support disable vblank immediately. BUG: SWDEV-129274 Signed-off-by: NEmily Deng <Emily.Deng@amd.com> Reviewed-by: NMichel Dänzer <michel.daenzer@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 14 7月, 2017 1 次提交
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由 Mario Kleiner 提交于
With instantaneous high precision vblank timestamping that updates at leading edge of vblank, a cooked hw vblank counter which increments at leading edge of vblank, and reliable page flip execution and completion at leading edge of vblank, we should meet the requirements for fast/immediate vblank irq disable/enable. Testing on Linux-4.12-rc5 + drm-next on a Radeon R9 380 Tonga Pro (DCE 10) with timing measurement equipment indicates this works fine, so allow immediate vblank disable for power saving. For debugging in case of unexpected trouble, booting with kernel cmdline option drm.vblankoffdelay=0 (or echo 0 > /sys/module/drm/parameters/vblankoffdelay) would keep vblank irqs permanently on to approximate old behavior. Reviewed-by: NMichel Dänzer <michel.daenzer@amd.com> Signed-off-by: NMario Kleiner <mario.kleiner.de@gmail.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 23 6月, 2017 1 次提交
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由 Daniel Vetter 提交于
Both drivers shut down all crtc beforehand already, which will shut up any pending vblank (the only thing vblank_cleanup really does is disable the disable timer). Hence we don't need this here and can remove it. Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Christian König <christian.koenig@amd.com> Acked-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NDaniel Vetter <daniel.vetter@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20170621082850.13224-2-daniel.vetter@ffwll.ch
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- 25 5月, 2017 1 次提交
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由 Monk Liu 提交于
because we don't want to do sriov-gpu-reset under certain cases, so just split those two funtion and don't invoke sr-iov one from bare-metal one. V2: remove debugfs_gpu_reset routine on SRIOV case. Signed-off-by: NMonk Liu <Monk.Liu@amd.com> Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 07 4月, 2017 1 次提交
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由 Christian König 提交于
We need an array of pointers to IRQ sources, not an array of sources. Signed-off-by: NChristian König <christian.koenig@amd.com> Reported-by: NDan Carpenter <dan.carpenter@oracle.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 30 3月, 2017 2 次提交
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由 Christian König 提交于
This allows us to grab IVs without spamming the log. Signed-off-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NFelix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
Newer asics have a two levels of irq ids now: client id - the IP src id - the interrupt src within the IP v2: integrated Christian's comments. v3: fix rebase fail in SI and CIK Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NKen Wang <Qingqing.Wang@amd.com> Reviewed-by: NKen Wang <Qingqing.Wang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 18 12月, 2016 1 次提交
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由 Daniel Vetter 提交于
The list walk will shortcircuit anyway. Cc: Alex Deucher <alexdeucher@gmail.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NDaniel Vetter <daniel.vetter@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20161213230814.19598-4-daniel.vetter@ffwll.ch
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- 24 11月, 2016 1 次提交
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由 Christian König 提交于
Not used any more. Signed-off-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 25 10月, 2016 1 次提交
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由 Alex Deucher 提交于
Cancel any pending reset work when we tear down the driver. Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 08 7月, 2016 1 次提交
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由 Chunming Zhou 提交于
irq need to update when gpu reset happens. Signed-off-by: NChunming Zhou <David1.Zhou@amd.com> Reviewed-by: Christian König christian.koenig@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 21 5月, 2016 1 次提交
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由 Daniel Vetter 提交于
This was added in commit 0a3e67a4 Author: Jesse Barnes <jbarnes@virtuousgeek.org> Date: Tue Sep 30 12:14:26 2008 -0700 drm: Rework vblank-wait handling to allow interrupt reduction. to stay backwards-compatible with old UMS code that didn't even tell the kernel when it did a modeset, so that the kernel could save/restore vblank counters. At worst this means vblanks will be somewhat funky on a setup that very likely no one still runs. So let's just nuke it. Plan B would be to set it unconditionally in drm_vblank_init for kms drivers, instead of in each driver separately. So if this patch breaks anything please only restore the hunks in drmP.h and drm_irq.c, plus add a check for DRIVER_MODESET in drm_vblank_init. Stumbled over this in a discussion on irc with Chris. Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Liviu Dudau <liviu.dudau@arm.com> Cc: Russell King <rmk+kernel@arm.linux.org.uk> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Eric Anholt <eric@anholt.net> Cc: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Cc: Inki Dae <inki.dae@samsung.com> Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> Cc: Mark Yao <mark.yao@rock-chips.com> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: NDaniel Vetter <daniel.vetter@intel.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Acked-by: NLiviu Dudau <Liviu.Dudau@arm.com> Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Tested-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 05 5月, 2016 1 次提交
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由 Nils Wallménius 提交于
This patch marks some compile-time constant tables 'const'. The tables marked in this patch are the low hanging fruit where little other changes were necesary to avoid casting away constness etc. Also mark some tables that are private to a file as static. Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NNils Wallménius <nils.wallmenius@gmail.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 01 4月, 2016 1 次提交
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由 Michel Dänzer 提交于
Without this, since the conversion from drm_vblank_pre/post_modeset to drm_vblank_on/off, the vblank interrupt could never be disabled after userspace triggered enabling it. Signed-off-by: NMichel Dänzer <michel.daenzer@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 14 1月, 2016 1 次提交
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由 Dave Airlie 提交于
this fixes the build on arm. Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 11 1月, 2016 1 次提交
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由 Alex Deucher 提交于
Hardware blocks on the GPU like ACP generate interrupts in the GPU interrupt controller, but are driven by a separate driver. Add an irq domain to the GPU driver so that blocks like ACP can register a Linux interrupt. Acked-by: NDave Airlie <airlied@redhat.com> Acked-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 24 9月, 2015 1 次提交
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由 Alex Deucher 提交于
The value was much too low, which could cause the userspace visible vblank counter to move backwards when the hardware counter wrapped around. Ported from radeon commit: b0b9bb4dReviewed-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NJammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
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