- 12 6月, 2019 6 次提交
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由 Neil Armstrong 提交于
With the default boot settings, the DDC drive strength is too weak, set the driver-strengh to 4mA to avoid errors on the DDC line. Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com> Reviewed-by: NMartin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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由 Jerome Brunet 提交于
Enable the network interface of the SEI510 which use the internal PHY. Tested-by: NKevin Hilman <khilman@baylibre.com> Signed-off-by: NJerome Brunet <jbrunet@baylibre.com> Acked-by: NMartin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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由 Jerome Brunet 提交于
The u200 is the main mother board for the S905D2. It can provide both the internal and external network. However, by default the resistance required for the external RGMII bus are not fitted, so enable the internal PHY. Signed-off-by: NJerome Brunet <jbrunet@baylibre.com> Acked-by: NMartin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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由 Jerome Brunet 提交于
Add the g12a mdio multiplexer which allows to connect to either an external phy through the SoC pins or the internal 10/100 phy Signed-off-by: NJerome Brunet <jbrunet@baylibre.com> Acked-by: NMartin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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由 Jerome Brunet 提交于
Add the ethernet pinctrl settings for RMII, RGMII and internal phy leds Signed-off-by: NJerome Brunet <jbrunet@baylibre.com> Reviewed-by: NMartin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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https://github.com/BayLibre/clk-meson由 Kevin Hilman 提交于
MPLL50M DT bindings typo fix Meson9 VPU typo fixes # gpg: Signature made Tue 11 Jun 2019 05:02:13 AM PDT # gpg: using RSA key F4E159AE18F3F56D5F1BB71BE6FC0F1C37F2DA85 # gpg: Good signature from "Jerome Brunet <jbrunet@baylibre.com>" [full] # gpg: aka "Jerome Brunet <jerome@liltaz.com>" [full] # gpg: aka "Jerome Brunet <jerome.brunet@gmail.com>" [full] * tag 'clk-meson-5.2-1-fixes' of https://github.com/BayLibre/clk-meson: clk: meson: meson8b: fix a typo in the VPU parent names array variable clk: meson: fix MPLL 50M binding id typo
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- 24 5月, 2019 1 次提交
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由 Jerome Brunet 提交于
Add the synopsys ethernet mac controller embedded in the g12a SoC family. Signed-off-by: NJerome Brunet <jbrunet@baylibre.com> Reviewed-by: NMartin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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- 22 5月, 2019 33 次提交
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由 Jerome Brunet 提交于
Add the hdmitx glue device linking the SoC audio interfaces to the embedded Synopsys hdmi controller. Signed-off-by: NJerome Brunet <jbrunet@baylibre.com> Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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由 Jerome Brunet 提交于
Add bluetooth vbat and vddio power supplies Signed-off-by: NJerome Brunet <jbrunet@baylibre.com> Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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由 Rob Herring 提交于
Convert Amlogic SoC bindings to DT schema format using json-schema. Cc: Carlo Caione <carlo@caione.org> Cc: Kevin Hilman <khilman@baylibre.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: devicetree@vger.kernel.org Signed-off-by: NRob Herring <robh@kernel.org> Reviewed-by: NNeil Armstrong <narmstrong@baylibre.com> [khilman: updated maninainers] Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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由 Rob Herring 提交于
It is best practice to have 1 binding per file, so board level bindings should be separate for various misc SoC bindings. Cc: Mark Rutland <mark.rutland@arm.com> Cc: Carlo Caione <carlo@caione.org> Cc: Kevin Hilman <khilman@baylibre.com> Cc: devicetree@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-amlogic@lists.infradead.org Signed-off-by: NRob Herring <robh@kernel.org> Acked-by: NNeil Armstrong <narmstrong@baylibre.com> Acked-by: NKevin Hilman <khilman@baylibre.com> Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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由 Jerome Brunet 提交于
At the moment the sysnopsys hdmi i2s driver provides a single playback DAI. Add the corresponding sound-dai-cell to the hdmi device node. Signed-off-by: NJerome Brunet <jbrunet@baylibre.com> Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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由 Jerome Brunet 提交于
Add the spdif input device node and the pinctrl definition for this capture interface g12a SoC family Signed-off-by: NJerome Brunet <jbrunet@baylibre.com> Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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由 Jerome Brunet 提交于
Add the pdm device node and the pinctrl definition for this capture interface g12a SoC family Signed-off-by: NJerome Brunet <jbrunet@baylibre.com> Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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由 Jerome Brunet 提交于
Add the devices nodes and pinctrl definitions for the spdif outputs of the g12a SoC family Signed-off-by: NJerome Brunet <jbrunet@baylibre.com> Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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由 Jerome Brunet 提交于
Add the devices and pinctrl definitions for the tdm interfaces of the g12a SoC family. Signed-off-by: NJerome Brunet <jbrunet@baylibre.com> Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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由 Jerome Brunet 提交于
Add the playback and capture memory interfaces of the g12a SoC family. Signed-off-by: NJerome Brunet <jbrunet@baylibre.com> Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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由 Jerome Brunet 提交于
Add the audio DDR memory arbitrer of the g12a SoC family. Signed-off-by: NJerome Brunet <jbrunet@baylibre.com> Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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由 Jerome Brunet 提交于
Add the g12a clock controller dedicated to audio. Signed-off-by: NJerome Brunet <jbrunet@baylibre.com> Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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由 Jerome Brunet 提交于
Add the i2c bus used for RGB led controller. Signed-off-by: NJerome Brunet <jbrunet@baylibre.com> Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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由 Jerome Brunet 提交于
Add the 3 i2c busses present on the u200 reference design. Signed-off-by: NJerome Brunet <jbrunet@baylibre.com> Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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由 Guillaume La Roque 提交于
Add pinctrl and nodes for i2c support on amlogic g12a Signed-off-by: NGuillaume La Roque <glaroque@baylibre.com> Signed-off-by: NJerome Brunet <jbrunet@baylibre.com> Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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由 Jerome Brunet 提交于
Now that the AO clock controller is available, make the uarts of the always-on domain claim the appropriate peripheral clock. Signed-off-by: NJerome Brunet <jbrunet@baylibre.com> Reviewed-by: NNeil Armstrong <narmstrong@baylibre.com> Reviewed-by: NMartin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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由 Jerome Brunet 提交于
Enable eMMC and SDCard on the g12a sei510 board Signed-off-by: NJerome Brunet <jbrunet@baylibre.com> Reviewed-by: NMartin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: NNeil Armstrong <narmstrong@baylibre.com> Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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由 Jerome Brunet 提交于
Enable eMMC and SDCard on the g12a u200 board Signed-off-by: NJerome Brunet <jbrunet@baylibre.com> Reviewed-by: NMartin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: NNeil Armstrong <narmstrong@baylibre.com> Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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由 Jerome Brunet 提交于
Add port B (sdcard) and port C (eMMC) pinctrl and controllers nodes to the g12a DT. Signed-off-by: NJerome Brunet <jbrunet@baylibre.com> Reviewed-by: NMartin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: NNeil Armstrong <narmstrong@baylibre.com> Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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由 Jerome Brunet 提交于
Add sdcard uhs modes up to DDR50 and push eMMC up to 200Mhz With the new tuning method, these modes appear to be stable Signed-off-by: NJerome Brunet <jbrunet@baylibre.com> Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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由 Jerome Brunet 提交于
Add UHS ddr50 mode to the nanopi k2 Signed-off-by: NJerome Brunet <jbrunet@baylibre.com> Acked-by: NMartin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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由 Martin Blumenstingl 提交于
The Ethernet PHY documentation (Documentation/devicetree/bindings/net/phy.txt) states that: If the PHY reports an incorrect ID (or none at all) then the "compatible" list may contain an entry with the correct PHY ID in the form: "ethernet-phy-idAAAA.BBBB" An older version of the documentation suggested that the compatible string can be used when the PHY ID is known. Remove the ethernet-phy-id compatible string and add a comment with the PHY ID instead. This is a no-op on boards which are shipped with the PHY that was listed (= all known cases). However, if a board manufacturer decides to ship a different PHY we will now load and use the correct driver because we ask the PHY to identify itself. Signed-off-by: NMartin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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由 Jerome Brunet 提交于
Like order boards, order nodes by address then node names then aliases. Signed-off-by: NJerome Brunet <jbrunet@baylibre.com> Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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由 Jerome Brunet 提交于
Like order boards, order nodes by address then node names then aliases. Signed-off-by: NJerome Brunet <jbrunet@baylibre.com> Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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由 Jerome Brunet 提交于
sd highspeed mode make no sense for an eMMC and HS400 is not working at the moment. Signed-off-by: NJerome Brunet <jbrunet@baylibre.com> Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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由 Jerome Brunet 提交于
For some reason the vim2 is missing the clk-gate pinctrl setting all the other board have. Just add this missing bit Signed-off-by: NJerome Brunet <jbrunet@baylibre.com> Reviewed-by: Martin Blumenstingl<martin.blumenstingl@googlemail.com> Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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由 Jerome Brunet 提交于
According the datasheets, emmc v2 chips (gxbb and gxl) don't support more that 100Mhz in UHS-1 SD modes and HS in SDIO. Align the max-frequency to 100MHz for UHS-1 and 50MHz for HS Signed-off-by: NJerome Brunet <jbrunet@baylibre.com> Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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由 Jerome Brunet 提交于
Clk pin does not require bias, data strobe should be pulled low. The rest of the pin (data and cmd) are pulled up. Signed-off-by: NJerome Brunet <jbrunet@baylibre.com> Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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由 Jerome Brunet 提交于
While some 3.3v eMMC 4.0 are available from libretech, Only the 1.8v 5.0 modules are recommended and supported for the aml-s905x-cc. the 1.8v is provided by LDOs on the eMMC card, from vcc 3.3v Signed-off-by: NJerome Brunet <jbrunet@baylibre.com> Acked-by: NMartin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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由 Jerome Brunet 提交于
The eMMC on this board is add-on module which is not mandatory. Removing 'non-removable' property should prevent some errors when booting a board w/o an eMMC module present. Fixes: 72fb2c85 ("ARM64: dts: meson-gxl-s905x-libretech-cc: fixup board definition") Signed-off-by: NJerome Brunet <jbrunet@baylibre.com> Reviewed-by: Martin Blumenstingl<martin.blumenstingl@googlemail.com> Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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由 Neil Armstrong 提交于
Add support for the IR decoder input on the U200 Reference Design board. Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl<martin.blumenstingl@googlemail.com> Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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由 Neil Armstrong 提交于
Add support for the IR decoder input on the X96 Max board. Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl<martin.blumenstingl@googlemail.com> Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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由 Neil Armstrong 提交于
Amlogic G12A SoCs uses the exact same IR decoder as previous families, add the IR node and the pintctrl setting. Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl<martin.blumenstingl@googlemail.com> Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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