- 13 10月, 2015 2 次提交
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由 Sjoerd Simons 提交于
This enables the SPDIF optical audio output on the Radxa Rock Signed-off-by: NSjoerd Simons <sjoerd.simons@collabora.co.uk> Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
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由 Sjoerd Simons 提交于
Add the SPDIF transceiver controller and pin for RK3188 Signed-off-by: NSjoerd Simons <sjoerd.simons@collabora.co.uk> Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
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- 09 10月, 2015 14 次提交
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由 Caesar Wang 提交于
We can add more domains node in the future. This patch add the needed clocks into power-controller. As the discuess about all the device clocks being listed in the power-domains itself. There are several reasons as follows: Firstly, the clocks need be turned off to save power when the system enter the suspend state. So we need to enumerate the clocks in the dts. In order to power domain can turn on and off. Secondly, the reset-circuit should reset be synchronous on RK3288, then sync revoked. So we need to enable clocks of all devices. In other words, we have to enable the clocks before you operate them if all the device clocks are included in someone domians. Thirdly, as the chip designs for PM hardhare. we need turn on the noc clocks, if we are operating the "pd_vio" domain to enter the idle status. The device's clock be included in domains that needed turn on if do that. The clocks in the dts are needed to enable before you want to happy work. At the moment, This patch is very good work for PM hardware. Also, we can add these clocks in the future if we have some hidden clocks. Signed-off-by: NCaesar Wang <wxt@rock-chips.com> Reviewed-by: NMichael Turquette <mturquette@baylibre.com> Reviewed-by: NKevin Hilman <khilman@linaro.org> [add necessary power-domain properties to keep drm subsys working] Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
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由 Heiko Stuebner 提交于
Add the iodomains node and reference the correct regulator for each domain. This also includes adding the currently unused dvp regulators. Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
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由 Heiko Stuebner 提交于
Fix some incorrect references to mmc regulators. vccio_wl for example is the io-voltage supply not the core supply of the wifi module itself, which is vbat_wl instead. Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
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由 Heiko Stuebner 提交于
Add the iodomains node and reference the correct regulator for each domain. This also includes adding the currently unused dvp regulators and fixing up two regulators to follow the naming in the schematics. Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
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由 Heiko Stuebner 提交于
Add missing regulators and supply properties to emmc and sdmmc nodes. Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
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由 Heiko Stuebner 提交于
The popmetal board was not included in the list of Rockchip boards, so was only built when explicitly called with make rk3288-popmetal.dtb but not in a generic make dtbs, so add the missing entry. Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
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由 Sjoerd Simons 提交于
The Radxa Rock 2 Square board is a combination of the Radxa Rock 2 SoM with the Square baseboard. Add a dtsi for the SoM which can be included into the dts for the various baseboards (e.g. full and square) and a dts for the square board. Currently supported are serial console, wired networking, hdmi output, eMMC and SD storage and USB. Signed-off-by: NSjoerd Simons <sjoerd.simons@collabora.co.uk> Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
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由 Shawn Lin 提交于
Add cap-sd-highspeed and cap-mmc-highspeed for rk3066a-bqcurie2 and rk3066a-rayeager boards to make sd cards run faster. Signed-off-by: NShawn Lin <shawn.lin@rock-chips.com> Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
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由 Shawn Lin 提交于
Add cap-sd-highspeed and cap-mmc-highspeed for rk3188-radxarock board to make sd cards running faster. Signed-off-by: NShawn Lin <shawn.lin@rock-chips.com> Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
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由 Douglas Anderson 提交于
The pins for i2c5 can either be configured as "I2C5" which means that they're controlled by the normal RK3288 I2C controller or as "EDP / HDMI I2C". It's unclear why EDP is referenced here since apparently setting the mux to this position enables I2C communication using the dw_hdmi block with a patch like <https://patchwork.kernel.org/patch/7098101/>. There appear to be some reasons why using the builtin I2C controller in dw_hdmi is better than using the normal RK3288 I2C controller, so boards based on rk3288 might eventually want to use this pinmux if it's known to work. Once driver support in dw_hdmi lands, boards would use this by selecting this pinctrl for the HDMI block and then _not_ specifying a ddc-i2c-bus and _not_ setting the status to "okay" for i2c5 (which uses the same pins). Signed-off-by: NDouglas Anderson <dianders@chromium.org> Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
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由 Alexandru M Stan 提交于
With the previous patch ("rk3288: pull up cts lines") this is redundant, I sent that patch for the same reason this existed here, so the lines don't wiggle randomly when disconnected. Signed-off-by: NAlexandru M Stan <amstan@chromium.org> Reviewed-by: NDouglas Anderson <dianders@chromium.org> Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
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由 Alexandru M Stan 提交于
The flow control lines from a user accessible UART are optional, the user might not have anything connected to those pins. In order to prevent random interrupts happening and noise affecting the cts pin should be pulled up. Note that the default state for that pin on the rk3288 is pulled up, so this patch merely restores them. This is similar to what we're already doing with the RX pin, so it should be safe. At worst it might be a slightly higher power usage (through ~50 kohms) when the cts is low. Suggested-by: NNeil Hendin <nhendin@chromium.org> Signed-off-by: NAlexandru M Stan <amstan@chromium.org> Reviewed-by: NDouglas Anderson <dianders@chromium.org> Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
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由 Brian Norris 提交于
a.k.a. Haier Chromebook 11, and others Signed-off-by: NBrian Norris <briannorris@chromium.org> Reviewed-by: NJavier Martinez Canillas <javier@osg.samsung.com> Reviewed-by: NDouglas Anderson <dianders@chromium.org> Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
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由 Romain Perier 提交于
This enables SDMMC0 on the board and gives a basic support for SD cards. Signed-off-by: NRomain Perier <romain.perier@gmail.com> Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
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- 10 9月, 2015 10 次提交
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由 Stephen Boyd 提交于
Use stdout-path so that we don't have to put the console on the kernel command line. Cc: Tim Bird <tim.bird@sonymobile.com> Cc: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
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由 Stephen Boyd 提交于
Use stdout-path so that we don't have to put the console on the kernel command line. Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
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由 Stephen Boyd 提交于
Use stdout-path so that we don't have to put the console on the kernel command line. Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
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由 Stephen Boyd 提交于
Use stdout-path so that we don't have to put the console on the kernel command line. Cc: Mathieu Olivari <mathieu@codeaurora.org> Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
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由 Stephen Boyd 提交于
Use stdout-path so that we don't have to put the console on the kernel command line. Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
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由 Stephen Boyd 提交于
Use stdout-path so that we don't have to put the console on the kernel command line. Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
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由 Stephen Boyd 提交于
Use stdout-path so that we don't have to put the console on the kernel command line. Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
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由 Stephen Boyd 提交于
Use stdout-path so that we don't have to put the console on the kernel command line. Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
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由 Stephen Boyd 提交于
Use stdout-path so that we don't have to put the console on the kernel command line. Cc: Mike Rapoport <mike.rapoport@gmail.com> Cc: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
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由 Stephen Boyd 提交于
Add a label to the serial nodes that are being used for the console. Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
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- 06 9月, 2015 1 次提交
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由 Keerthy 提交于
rtc can either be supplied from internal 32k clock or external crystal generated 32k clock. Internal clock is SOC specific and the external clock is board dependent. Adding the corresponding nodes. Signed-off-by: NKeerthy <j-keerthy@ti.com> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com>
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- 28 8月, 2015 1 次提交
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由 Vincent Donnefort 提交于
Since the LED modes mapping is no longer hardcoded inside the leds-ns2 driver, then it must be provided through the modes-map property in the ns2-leds nodes. Signed-off-by: NVincent Donnefort <vdonnefort@gmail.com> Acked-by: NGregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: NJacek Anaszewski <j.anaszewski@samsung.com>
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- 25 8月, 2015 1 次提交
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由 Linus Walleij 提交于
The base addresses for the Ux500 PRCC controllers are hardcoded, let's move them to the clock node in the device tree and delete the constants. Cc: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org> Acked-by: NOlof Johansson <olof@lixom.net> Acked-by: NMichael Turquette <mturquette@baylibre.com> Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
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- 22 8月, 2015 11 次提交
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由 Tomeu Vizoso 提交于
Specify how the GPIOs map to the pins in Tegra SoCs, so the dependency is explicit. Signed-off-by: NTomeu Vizoso <tomeu.vizoso@collabora.com> Acked-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Nicolas Chauvet 提交于
Current base address is wrong by 0x04 bytes for AHB bus device as shown in dmesg: tegra-ahb 6000c004.ahb: incorrect AHB base address in DT data - enabling workaround To correct old DTBs, commit ce7a10b0 ("ARM: 8334/1: amba: tegra-ahb: detect and correct bogus base address") checks for the low bit of the base address and removes theses 0x04 bytes at runtime. This patch fixes the original DTS, so upstream version doesn't need the workaround of the base address. As both addresses are valid, this patch doesn't break compatibility. Tested on tegra20-paz00 (aka ac100). Signed-off-by: NNicolas Chauvet <kwizart@gmail.com> Reviewed-by: NPaul Walmsley <paul@pwsan.com> Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Kyle Huey 提交于
This patch modifies the device tree for Tegra124 based devices to enable the Cortex A15 PMU. The interrupt numbers are taken from NVIDIA Tegra K1 TRM (DP-06905-001_v03p). This patch was tested on a Jetson TK1. Signed-off-by: NKyle Huey <khuey@kylehuey.com> Acked-by: NMark Rutland <mark.rutland@arm.com> Acked-by: NJon Hunter <jonathanh@nvidia.com> Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Alexandre Courbot 提交于
Add the device-tree node for the GK20A GPU and leave it disabled. It is the responsibility of the bootloader to enable it if the VPR registers have been programmed such that the GPU can operate. Signed-off-by: NAlexandre Courbot <acourbot@nvidia.com> Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Thierry Reding 提交于
Add the device-tree node for the GK20A GPU and leave it disabled. It is the responsibility of the bootloader to enable it if the VPR registers have been programmed such that the GPU can operate. Signed-off-by: NThierry Reding <treding@nvidia.com> Signed-off-by: NAlexandre Courbot <acourbot@nvidia.com>
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由 Alexandre Courbot 提交于
Nouveau can make use of the IOMMU to make physical appear linear in the GPU address space. Signed-off-by: NAlexandre Courbot <acourbot@nvidia.com> Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Mikko Perttunen 提交于
Specify the CPU voltage regulator for the cpufreq driver. Signed-off-by: NTuomas Tynkkynen <ttynkkynen@nvidia.com> Signed-off-by: NMikko Perttunen <mikko.perttunen@kapsi.fi> Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Tuomas Tynkkynen 提交于
The Tegra124 cpufreq driver relies on certain clocks being present in the /cpus/cpu@0 node. Signed-off-by: NTuomas Tynkkynen <ttynkkynen@nvidia.com> Signed-off-by: NMikko Perttunen <mikko.perttunen@kapsi.fi> Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Tuomas Tynkkynen 提交于
Add the board-specific properties of the DFLL for the Jetson TK1 board. On this board, the DFLL will take control of the sd0 regulator on the on-board AS3722 PMIC. Signed-off-by: NTuomas Tynkkynen <ttynkkynen@nvidia.com> Signed-off-by: NMikko Perttunen <mikko.perttunen@kapsi.fi> Acked-by: NMichael Turquette <mturquette@linaro.org> Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Tuomas Tynkkynen 提交于
The DFLL clocksource is a separate IP block from the usual clock-and-reset controller, so it gets its own device tree node. Signed-off-by: NTuomas Tynkkynen <ttynkkynen@nvidia.com> Signed-off-by: NMikko Perttunen <mikko.perttunen@kapsi.fi> Acked-by: NMichael Turquette <mturquette@linaro.org> Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Moritz Fischer 提交于
Signed-off-by: NMoritz Fischer <moritz.fischer@ettus.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
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