1. 14 11月, 2019 1 次提交
  2. 12 11月, 2019 1 次提交
  3. 06 11月, 2019 1 次提交
    • T
      arm64: implement ftrace with regs · 3b23e499
      Torsten Duwe 提交于
      This patch implements FTRACE_WITH_REGS for arm64, which allows a traced
      function's arguments (and some other registers) to be captured into a
      struct pt_regs, allowing these to be inspected and/or modified. This is
      a building block for live-patching, where a function's arguments may be
      forwarded to another function. This is also necessary to enable ftrace
      and in-kernel pointer authentication at the same time, as it allows the
      LR value to be captured and adjusted prior to signing.
      
      Using GCC's -fpatchable-function-entry=N option, we can have the
      compiler insert a configurable number of NOPs between the function entry
      point and the usual prologue. This also ensures functions are AAPCS
      compliant (e.g. disabling inter-procedural register allocation).
      
      For example, with -fpatchable-function-entry=2, GCC 8.1.0 compiles the
      following:
      
      | unsigned long bar(void);
      |
      | unsigned long foo(void)
      | {
      |         return bar() + 1;
      | }
      
      ... to:
      
      | <foo>:
      |         nop
      |         nop
      |         stp     x29, x30, [sp, #-16]!
      |         mov     x29, sp
      |         bl      0 <bar>
      |         add     x0, x0, #0x1
      |         ldp     x29, x30, [sp], #16
      |         ret
      
      This patch builds the kernel with -fpatchable-function-entry=2,
      prefixing each function with two NOPs. To trace a function, we replace
      these NOPs with a sequence that saves the LR into a GPR, then calls an
      ftrace entry assembly function which saves this and other relevant
      registers:
      
      | mov	x9, x30
      | bl	<ftrace-entry>
      
      Since patchable functions are AAPCS compliant (and the kernel does not
      use x18 as a platform register), x9-x18 can be safely clobbered in the
      patched sequence and the ftrace entry code.
      
      There are now two ftrace entry functions, ftrace_regs_entry (which saves
      all GPRs), and ftrace_entry (which saves the bare minimum). A PLT is
      allocated for each within modules.
      Signed-off-by: NTorsten Duwe <duwe@suse.de>
      [Mark: rework asm, comments, PLTs, initialization, commit message]
      Signed-off-by: NMark Rutland <mark.rutland@arm.com>
      Reviewed-by: NAmit Daniel Kachhap <amit.kachhap@arm.com>
      Reviewed-by: NArd Biesheuvel <ard.biesheuvel@linaro.org>
      Reviewed-by: NTorsten Duwe <duwe@suse.de>
      Tested-by: NAmit Daniel Kachhap <amit.kachhap@arm.com>
      Tested-by: NTorsten Duwe <duwe@suse.de>
      Cc: AKASHI Takahiro <takahiro.akashi@linaro.org>
      Cc: Catalin Marinas <catalin.marinas@arm.com>
      Cc: Josh Poimboeuf <jpoimboe@redhat.com>
      Cc: Julien Thierry <jthierry@redhat.com>
      Cc: Will Deacon <will@kernel.org>
      3b23e499
  4. 26 10月, 2019 2 次提交
  5. 14 10月, 2019 1 次提交
  6. 08 10月, 2019 1 次提交
  7. 07 10月, 2019 2 次提交
    • W
      arm64: Kconfig: Make CONFIG_COMPAT_VDSO a proper Kconfig option · 7c4791c9
      Will Deacon 提交于
      CONFIG_COMPAT_VDSO is defined by passing '-DCONFIG_COMPAT_VDSO' to the
      compiler when the generic compat vDSO code is in use. It's much cleaner
      and simpler to expose this as a proper Kconfig option (like x86 does),
      so do that and remove the bodge.
      Acked-by: NCatalin Marinas <catalin.marinas@arm.com>
      Signed-off-by: NWill Deacon <will@kernel.org>
      7c4791c9
    • V
      arm64: vdso32: Fix broken compat vDSO build warnings · e0de01aa
      Vincenzo Frascino 提交于
      The .config file and the generated include/config/auto.conf can
      end up out of sync after a set of commands since
      CONFIG_CROSS_COMPILE_COMPAT_VDSO is not updated correctly.
      
      The sequence can be reproduced as follows:
      
      $ make ARCH=arm64 CROSS_COMPILE=aarch64-linux-gnu- defconfig
      [...]
      $ make ARCH=arm64 CROSS_COMPILE=aarch64-linux-gnu- menuconfig
      [set CONFIG_CROSS_COMPILE_COMPAT_VDSO="arm-linux-gnueabihf-"]
      $ make ARCH=arm64 CROSS_COMPILE=aarch64-linux-gnu-
      
      Which results in:
      
      arch/arm64/Makefile:62: CROSS_COMPILE_COMPAT not defined or empty,
      the compat vDSO will not be built
      
      even though the compat vDSO has been built:
      
      $ file arch/arm64/kernel/vdso32/vdso.so
      arch/arm64/kernel/vdso32/vdso.so: ELF 32-bit LSB pie executable, ARM,
      EABI5 version 1 (SYSV), dynamically linked,
      BuildID[sha1]=c67f6c786f2d2d6f86c71f708595594aa25247f6, stripped
      
      A similar case that involves changing the configuration parameter
      multiple times can be reconducted to the same family of problems.
      
      Remove the use of CONFIG_CROSS_COMPILE_COMPAT_VDSO altogether and
      instead rely on the cross-compiler prefix coming from the environment
      via CROSS_COMPILE_COMPAT, much like we do for the rest of the kernel.
      
      Cc: Will Deacon <will@kernel.org>
      Cc: Catalin Marinas <catalin.marinas@arm.com>
      Reported-by: NWill Deacon <will@kernel.org>
      Signed-off-by: NVincenzo Frascino <vincenzo.frascino@arm.com>
      Signed-off-by: NWill Deacon <will@kernel.org>
      e0de01aa
  8. 25 9月, 2019 2 次提交
  9. 18 9月, 2019 1 次提交
  10. 30 8月, 2019 1 次提交
    • W
      arm64: lse: Make ARM64_LSE_ATOMICS depend on JUMP_LABEL · b32baf91
      Will Deacon 提交于
      Support for LSE atomic instructions (CONFIG_ARM64_LSE_ATOMICS) relies on
      a static key to select between the legacy LL/SC implementation which is
      available on all arm64 CPUs and the super-duper LSE implementation which
      is available on CPUs implementing v8.1 and later.
      
      Unfortunately, when building a kernel with CONFIG_JUMP_LABEL disabled
      (e.g. because the toolchain doesn't support 'asm goto'), the static key
      inside the atomics code tries to use atomics itself. This results in a
      mess of circular includes and a build failure:
      
      In file included from ./arch/arm64/include/asm/lse.h:11,
                       from ./arch/arm64/include/asm/atomic.h:16,
                       from ./include/linux/atomic.h:7,
                       from ./include/asm-generic/bitops/atomic.h:5,
                       from ./arch/arm64/include/asm/bitops.h:26,
                       from ./include/linux/bitops.h:19,
                       from ./include/linux/kernel.h:12,
                       from ./include/asm-generic/bug.h:18,
                       from ./arch/arm64/include/asm/bug.h:26,
                       from ./include/linux/bug.h:5,
                       from ./include/linux/page-flags.h:10,
                       from kernel/bounds.c:10:
      ./include/linux/jump_label.h: In function ‘static_key_count’:
      ./include/linux/jump_label.h:254:9: error: implicit declaration of function ‘atomic_read’ [-Werror=implicit-function-declaration]
        return atomic_read(&key->enabled);
               ^~~~~~~~~~~
      
      [ ... more of the same ... ]
      
      Since LSE atomic instructions are not critical to the operation of the
      kernel, make them depend on JUMP_LABEL at compile time.
      Reviewed-by: NAndrew Murray <andrew.murray@arm.com>
      Signed-off-by: NWill Deacon <will@kernel.org>
      b32baf91
  11. 29 8月, 2019 1 次提交
    • C
      dma-mapping: remove arch_dma_mmap_pgprot · 419e2f18
      Christoph Hellwig 提交于
      arch_dma_mmap_pgprot is used for two things:
      
       1) to override the "normal" uncached page attributes for mapping
          memory coherent to devices that can't snoop the CPU caches
       2) to provide the special DMA_ATTR_WRITE_COMBINE semantics on older
          arm systems and some mips platforms
      
      Replace one with the pgprot_dmacoherent macro that is already provided
      by arm and much simpler to use, and lift the DMA_ATTR_WRITE_COMBINE
      handling to common code with an explicit arch opt-in.
      Signed-off-by: NChristoph Hellwig <hch@lst.de>
      Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>	# m68k
      Acked-by: Paul Burton <paul.burton@mips.com>		# mips
      419e2f18
  12. 22 8月, 2019 1 次提交
  13. 20 8月, 2019 1 次提交
  14. 09 8月, 2019 2 次提交
    • S
      arm64: mm: Introduce 52-bit Kernel VAs · b6d00d47
      Steve Capper 提交于
      Most of the machinery is now in place to enable 52-bit kernel VAs that
      are detectable at boot time.
      
      This patch adds a Kconfig option for 52-bit user and kernel addresses
      and plumbs in the requisite CONFIG_ macros as well as sets TCR.T1SZ,
      physvirt_offset and vmemmap at early boot.
      
      To simplify things this patch also removes the 52-bit user/48-bit kernel
      kconfig option.
      Signed-off-by: NSteve Capper <steve.capper@arm.com>
      Reviewed-by: NCatalin Marinas <catalin.marinas@arm.com>
      Signed-off-by: NWill Deacon <will@kernel.org>
      b6d00d47
    • S
      arm64: kasan: Switch to using KASAN_SHADOW_OFFSET · 6bd1d0be
      Steve Capper 提交于
      KASAN_SHADOW_OFFSET is a constant that is supplied to gcc as a command
      line argument and affects the codegen of the inline address sanetiser.
      
      Essentially, for an example memory access:
          *ptr1 = val;
      The compiler will insert logic similar to the below:
          shadowValue = *(ptr1 >> KASAN_SHADOW_SCALE_SHIFT + KASAN_SHADOW_OFFSET)
          if (somethingWrong(shadowValue))
              flagAnError();
      
      This code sequence is inserted into many places, thus
      KASAN_SHADOW_OFFSET is essentially baked into many places in the kernel
      text.
      
      If we want to run a single kernel binary with multiple address spaces,
      then we need to do this with KASAN_SHADOW_OFFSET fixed.
      
      Thankfully, due to the way the KASAN_SHADOW_OFFSET is used to provide
      shadow addresses we know that the end of the shadow region is constant
      w.r.t. VA space size:
          KASAN_SHADOW_END = ~0 >> KASAN_SHADOW_SCALE_SHIFT + KASAN_SHADOW_OFFSET
      
      This means that if we increase the size of the VA space, the start of
      the KASAN region expands into lower addresses whilst the end of the
      KASAN region is fixed.
      
      Currently the arm64 code computes KASAN_SHADOW_OFFSET at build time via
      build scripts with the VA size used as a parameter. (There are build
      time checks in the C code too to ensure that expected values are being
      derived). It is sufficient, and indeed is a simplification, to remove
      the build scripts (and build time checks) entirely and instead provide
      KASAN_SHADOW_OFFSET values.
      
      This patch removes the logic to compute the KASAN_SHADOW_OFFSET in the
      arm64 Makefile, and instead we adopt the approach used by x86 to supply
      offset values in kConfig. To help debug/develop future VA space changes,
      the Makefile logic has been preserved in a script file in the arm64
      Documentation folder.
      Reviewed-by: NCatalin Marinas <catalin.marinas@arm.com>
      Signed-off-by: NSteve Capper <steve.capper@arm.com>
      Signed-off-by: NWill Deacon <will@kernel.org>
      6bd1d0be
  15. 07 8月, 2019 2 次提交
  16. 05 8月, 2019 1 次提交
  17. 17 7月, 2019 1 次提交
  18. 15 7月, 2019 2 次提交
  19. 13 7月, 2019 1 次提交
  20. 04 7月, 2019 1 次提交
  21. 25 6月, 2019 3 次提交
  22. 23 6月, 2019 2 次提交
  23. 21 6月, 2019 2 次提交
  24. 15 6月, 2019 1 次提交
    • M
      docs: kdump: convert docs to ReST and rename to *.rst · d67297ad
      Mauro Carvalho Chehab 提交于
      Convert kdump documentation to ReST and add it to the
      user faced manual, as the documents are mainly focused on
      sysadmins that would be enabling kdump.
      
      Note: the vmcoreinfo.rst has one very long title on one of its
      sub-sections:
      
      	PG_lru|PG_private|PG_swapcache|PG_swapbacked|PG_slab|PG_hwpoision|PG_head_mask|PAGE_BUDDY_MAPCOUNT_VALUE(~PG_buddy)|PAGE_OFFLINE_MAPCOUNT_VALUE(~PG_offline)
      
      I opted to break this one, into two entries with the same content,
      in order to make it easier to display after being parsed in html and PDF.
      
      The conversion is actually:
        - add blank lines and identation in order to identify paragraphs;
        - fix tables markups;
        - add some lists markups;
        - mark literal blocks;
        - adjust title markups.
      
      At its new index.rst, let's add a :orphan: while this is not linked to
      the main index.rst file, in order to avoid build warnings.
      Signed-off-by: NMauro Carvalho Chehab <mchehab+samsung@kernel.org>
      Signed-off-by: NJonathan Corbet <corbet@lwn.net>
      d67297ad
  25. 14 6月, 2019 1 次提交
    • B
      arm64: remove redundant 'default n' from Kconfig · 1a2a66db
      Bartlomiej Zolnierkiewicz 提交于
      'default n' is the default value for any bool or tristate Kconfig
      setting so there is no need to write it explicitly.
      
      Also since commit f467c564 ("kconfig: only write '# CONFIG_FOO
      is not set' for visible symbols") the Kconfig behavior is the same
      regardless of 'default n' being present or not:
      
          ...
          One side effect of (and the main motivation for) this change is making
          the following two definitions behave exactly the same:
      
              config FOO
                      bool
      
              config FOO
                      bool
                      default n
      
          With this change, neither of these will generate a
          '# CONFIG_FOO is not set' line (assuming FOO isn't selected/implied).
          That might make it clearer to people that a bare 'default n' is
          redundant.
          ...
      Signed-off-by: NBartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
      Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
      1a2a66db
  26. 04 6月, 2019 1 次提交
    • M
      arm64: mm: make CONFIG_ZONE_DMA32 configurable · 0c1f14ed
      Miles Chen 提交于
      This change makes CONFIG_ZONE_DMA32 defuly y and allows users
      to overwrite it only when CONFIG_EXPERT=y.
      
      For the SoCs that do not need CONFIG_ZONE_DMA32, this is the
      first step to manage all available memory by a single
      zone(normal zone) to reduce the overhead of multiple zones.
      
      The change also fixes a build error when CONFIG_NUMA=y and
      CONFIG_ZONE_DMA32=n.
      
      arch/arm64/mm/init.c:195:17: error: use of undeclared identifier 'ZONE_DMA32'
                      max_zone_pfns[ZONE_DMA32] = PFN_DOWN(max_zone_dma_phys());
      
      Change since v1:
      1. only expose CONFIG_ZONE_DMA32 when CONFIG_EXPERT=y
      2. remove redundant IS_ENABLED(CONFIG_ZONE_DMA32)
      
      Cc: Robin Murphy <robin.murphy@arm.com>
      Signed-off-by: NMiles Chen <miles.chen@mediatek.com>
      Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
      0c1f14ed
  27. 24 5月, 2019 1 次提交
  28. 23 5月, 2019 2 次提交
    • M
      arm64: Handle erratum 1418040 as a superset of erratum 1188873 · a5325089
      Marc Zyngier 提交于
      We already mitigate erratum 1188873 affecting Cortex-A76 and
      Neoverse-N1 r0p0 to r2p0. It turns out that revisions r0p0 to
      r3p1 of the same cores are affected by erratum 1418040, which
      has the same workaround as 1188873.
      
      Let's expand the range of affected revisions to match 1418040,
      and repaint all occurences of 1188873 to 1418040. Whilst we're
      there, do a bit of reformating in silicon-errata.txt and drop
      a now unnecessary dependency on ARM_ARCH_TIMER_OOL_WORKAROUND.
      Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
      Signed-off-by: NWill Deacon <will.deacon@arm.com>
      a5325089
    • W
      arm64: errata: Add workaround for Cortex-A76 erratum #1463225 · 969f5ea6
      Will Deacon 提交于
      Revisions of the Cortex-A76 CPU prior to r4p0 are affected by an erratum
      that can prevent interrupts from being taken when single-stepping.
      
      This patch implements a software workaround to prevent userspace from
      effectively being able to disable interrupts.
      
      Cc: <stable@vger.kernel.org>
      Cc: Marc Zyngier <marc.zyngier@arm.com>
      Cc: Catalin Marinas <catalin.marinas@arm.com>
      Signed-off-by: NWill Deacon <will.deacon@arm.com>
      969f5ea6
  29. 21 5月, 2019 1 次提交