1. 21 10月, 2013 8 次提交
  2. 30 9月, 2013 25 次提交
  3. 19 9月, 2013 7 次提交
    • S
      ARM: shmobile: change dev_id to cpu0 while registering cpu clock · e4a6a29d
      Sudeep KarkadaNagesha 提交于
      Currently all clkdev registration use "cpufreq-cpu0.0" as dev_id
      for cpu clock which refers to virtual platform device. It needs to
      be "cpu0" instead which is actual cpu0 device id.
      
      This patch changes the dev_id from "cpufreq-cpu0.0" to "cpu0".
      Reported-and-tested-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de>
      Cc: Shawn Guo <shawn.guo@linaro.org>
      Cc: Magnus Damm <damm@opensource.se>
      Signed-off-by: NSudeep KarkadaNagesha <sudeep.karkadanagesha@arm.com>
      Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
      e4a6a29d
    • S
      ARM: i.MX: change dev_id to cpu0 while registering cpu clock · 3d10a887
      Sudeep KarkadaNagesha 提交于
      Currently all clkdev registration use "cpufreq-cpu0.0" as dev_id
      for cpu clock which refers to virtual platform device. It needs to
      be "cpu0" instead which is actual cpu0 device id.
      
      This patch changes the dev_id from "cpufreq-cpu0.0" to "cpu0".
      Reported-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de>
      Tested-by: NShawn Guo <shawn.guo@linaro.org>
      Signed-off-by: NSudeep KarkadaNagesha <sudeep.karkadanagesha@arm.com>
      Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
      3d10a887
    • S
      cpufreq: imx6q-cpufreq: assign cpu_dev correctly to cpu0 device · b494b48d
      Sudeep KarkadaNagesha 提交于
      Commit cdc58d60 "cpufreq: imx6q-cpufreq:
      remove device tree parsing for cpu nodes" assumed the pdev->dev is set to
      cpu0 device in the platform code. But it actually points to the virtual
      cpufreq-cpu0 platform device which is not present in the device tree.
      Most of the information needed by cpufreq is stored in cpu0 DT node.
      So cpu_dev must point to cpu0 device.
      
      This patch fixes the wrong assignment to cpu_dev.
      Reported-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de>
      Tested-by: NShawn Guo <shawn.guo@linaro.org>
      Signed-off-by: NSudeep KarkadaNagesha <sudeep.karkadanagesha@arm.com>
      Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
      b494b48d
    • L
      ARM: multi_v7: add HREFv60 to multi_v7 defconfig · 3244aae5
      Linus Walleij 提交于
      This is just a standard board for the Ux500, include it in the
      v7 multiplatform defconfig.
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      Signed-off-by: NOlof Johansson <olof@lixom.net>
      3244aae5
    • P
      ARM: OMAP2+: mux: fix trivial typo in name · e942cc06
      Phil Carmody 提交于
      Fix trivial typo in name.
      Signed-off-by: NPhil Carmody <phil.carmody@partner.samsung.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      e942cc06
    • A
      ARM: OMAP4 SMP: Corrected a typo fucntions to functions · b6b24852
      Anoop Thomas Mathew 提交于
      Corrected the functions spelling mistake in the OMAP4 SMP source file.
      Signed-off-by: NAnoop Thomas Mathew <atm@profoundis.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      b6b24852
    • V
      ARM: OMAP4: cpuidle: fix: call cpu_cluster_pm_exit conditionally · 78350271
      Vladimir Murzin 提交于
      We call cpu_cluster_pm_enter for dev->cpu == 0 only, but
      cpu_cluster_pm_exit called without that check.
      
      Because of that unhandled page fault may happen:
      
      [    3.803405] Unable to handle kernel paging request at virtual address 00002500
      [    3.810974] pgd = c0004000
      [    3.813812] [00002500] *pgd=00000000
      [    3.817596] Internal error: Oops: 5 [#1] SMP ARM
      [    3.822418] Modules linked in:
      [    3.825653] CPU: 1 PID: 0 Comm: swapper/1 Not tainted 3.11.0-rc6+ #21
      [    3.832397] task: ed86ef40 ti: ed896000 task.ti: ed896000
      [    3.838073] PC is at irq_notifier+0x234/0x25c
      [    3.842651] LR is at irq_notifier+0x218/0x25c
      [    3.847229] pc : [<c0029ed8>]    lr : [<c0029ebc>]    psr: 80000193
      [    3.847229] sp : ed897ee8  ip : 00000005  fp : 00000001
      [    3.859283] r10: c0b395f0  r9 : c0b30594  r8 : c0b8c2ac
      [    3.864776] r7 : ffffffff  r6 : 00000000  r5 : 00000005  r4 : 00000000
      [    3.871643] r3 : 00002500  r2 : 00000000  r1 : 00000005  r0 : 44302244
      [    3.878479] Flags: Nzcv  IRQs off  FIQs on  Mode SVC_32  ISA ARM  Segment kernel
      [    3.886260] Control: 10c5387d  Table: 8000404a  DAC: 00000015
      [    3.892272] Process swapper/1 (pid: 0, stack limit = 0xed896240)
      [    3.898590] Stack: (0xed897ee8 to 0xed898000)
      [    3.903167] 7ee0:                   c0979c3a 00000001 ed897ef8 ed896000 c0014f7c 00000000
      [    3.911743] 7f00: 00000005 00000000 ffffffff c0b8c2ac c0b395f0 c077c04c c0c94b48 c0b3953c
      [    3.920318] 7f20: c0bcd928 00000002 c0b39524 c00cfad8 00000000 ffffffff 00000000 c00cfb10
      [    3.928924] 7f40: c14e62c0 c002c1c8 c002c0ac c14e62c0 00000002 e251c37d 00000000 c0b39548
      [    3.937499] 7f60: c0b395f0 c05a1bc4 e251c37d 00000000 00000005 c05a3870 edc90380 edc90380
      [    3.946105] 7f80: edc90394 c14e62c0 c0b39548 00000002 c0784064 c05a3c78 c0b395e0 c14e62c0
      [    3.954681] 7fa0: 00000002 c0b39548 c0bc9db8 00000000 00000001 c05a1dc0 ed896000 00000015
      [    3.963287] 7fc0: c0bc9db8 ed896000 8000406a c0b30594 c0784064 c000e504 00000746 c007a528
      [    3.971862] 7fe0: 00000001 0000001d 600001d3 c0bcc004 00000000 800086c4 ee0aa6a7 d2aabaa9
      [    3.980499] [<c0029ed8>] (irq_notifier+0x234/0x25c) from [<c077c04c>] (notifier_call_chain+0x38/0x68)
      [    3.990173] [<c077c04c>] (notifier_call_chain+0x38/0x68) from [<c00cfad8>] (cpu_pm_notify+0x20/0x38)
      [    3.999786] [<c00cfad8>] (cpu_pm_notify+0x20/0x38) from [<c00cfb10>] (cpu_cluster_pm_exit+0x20/0x50)
      [    4.009399] [<c00cfb10>] (cpu_cluster_pm_exit+0x20/0x50) from [<c002c1c8>] (omap_enter_idle_coupled+0x11c/0x14c)
      [    4.020111] [<c002c1c8>] (omap_enter_idle_coupled+0x11c/0x14c) from [<c05a1bc4>] (cpuidle_enter_state+0x40/0xec)
      [    4.030822] [<c05a1bc4>] (cpuidle_enter_state+0x40/0xec) from [<c05a3c78>] (cpuidle_enter_state_coupled+0x1f4/0x240)
      [    4.041870] [<c05a3c78>] (cpuidle_enter_state_coupled+0x1f4/0x240) from [<c05a1dc0>] (cpuidle_idle_call+0x150/0x228)
      [    4.052947] [<c05a1dc0>] (cpuidle_idle_call+0x150/0x228) from [<c000e504>] (arch_cpu_idle+0x8/0x38)
      [    4.062499] [<c000e504>] (arch_cpu_idle+0x8/0x38) from [<c007a528>] (cpu_startup_entry+0x178/0x1e4)
      [    4.071990] [<c007a528>] (cpu_startup_entry+0x178/0x1e4) from [<800086c4>] (0x800086c4)
      [    4.080383] Code: e5922288 03a03b0a 13a03c25 e0823003 (e5932000)
      [    4.086791] ---[ end trace d83954a84a6fa69e ]---
      
      It is supposed that sar_base is initialized in irq_save_context, which
      is called on CPU_CLUSTER_PM_ENTER notification. If this notification
      has been missed and CPU_CLUSTER_PM_EXIT is received sar_base is NULL.
      
      Fix it by calling CPU_CLUSTER_PM_{ENTER,EXIT} under the same condition.
      Signed-off-by: NVladimir Murzin <murzin.v@gmail.com>
      Acked-by: NKevin Hilman <khilman@linaro.org>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      78350271