- 12 5月, 2016 12 次提交
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由 Christian König 提交于
They are the same for all IBs. Signed-off-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Christian König 提交于
We only have one context for all IBs. Signed-off-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Christian König 提交于
It was a source of bugs to repeat that in each IP version. v2: rename parameter Signed-off-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Christian König 提交于
Use of the ctx pointer is not safe, because they are likely already be assigned to another ctx when doing comparing. v2: recreate from scratch, avoid all unnecessary changes. Signed-off-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NMonk.Liu <monk.liu@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
When this flag is set, we program the hardware to execute the flip during horizontal blank (i.e. for the next scanline) instead of during vertical blank (i.e. for the next frame). Ported from radeon commit: drm/radeon: Support DRM_MODE_PAGE_FLIP_ASYNC v2: drop DAL change for upstream Reviewed-by: NMichel Dänzer <michel.daenzer@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
Fetch this info once at init and just store the results for future requests. Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Christian König 提交于
This is the result of running the following commands: find drivers/gpu/drm/amd/ -name "*.h" -exec sed -i 's/[ \t]\+$//' {} \; find drivers/gpu/drm/amd/ -name "*.c" -exec sed -i 's/[ \t]\+$//' {} \; find drivers/gpu/drm/amd/ -name "*.h" -exec sed -i 's/ \+\t/\t/' {} \; find drivers/gpu/drm/amd/ -name "*.c" -exec sed -i 's/ \+\t/\t/' {} \; v2: drop changes to DAL and internal headers Signed-off-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Christian König 提交于
Just set it to zero instead. Signed-off-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NChunming Zhou <david1.zhou@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Christian König 提交于
Otherwise we could (in theory) run into problems on 32bit systems. Signed-off-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NChunming Zhou <david1.zhou@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Christian König 提交于
Signed-off-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NTom St Denis <tom.stdenis@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Monk Liu 提交于
ib.vm is a legacy way to get vm, after scheduler implemented vm should be get from job, and all ibs from one job share the same vm, no need to keep ib.vm just move vm field to job. this patch as well add job as paramter to ib_schedule so it can get vm from job->vm. v2: agd: sqaush in: drm/amdgpu: check if ring emit_vm_flush exists in vm flush No vm flush on engines that don't support VM. bug: https://bugs.freedesktop.org/show_bug.cgi?id=95195Signed-off-by: NMonk Liu <Monk.Liu@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Chunming Zhou 提交于
This adds a unique id for each vm client so we can properly track them. Signed-off-by: NChunming Zhou <David1.Zhou@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: NMonk Liu <monk.liu@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 05 5月, 2016 13 次提交
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由 Tom St Denis 提交于
This adds 3 new files that can be read/written to access indirect GPU registers. Signed-off-by: NTom St Denis <tom.stdenis@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Eric Huang 提交于
Signed-off-by: NEric Huang <JinHuiEric.Huang@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Christian König 提交于
This allows us to have small BOs on the LRU before big ones. v2: fix of by one and list corruption bug Signed-off-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Chunming Zhou 提交于
Signed-off-by: NChunming Zhou <David1.Zhou@amd.com> Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
Different asics tend to have different ways to interact with the RLC. This just covers enter/exit of safe mode for updating CG and PG state, but could be extended to cover other RLC operations in the future if necessary. Acked-by: NTom St Denis <tom.stdenis@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Dave Airlie 提交于
This is just a type-safety things to avoid everyone taking void *, it doesn't change anything. v2: agd5f: split out the dal changes into a separate patch. Signed-off-by: NDave Airlie <airlied@redhat.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Arindam Nath 提交于
Change History -------------- v2: - Make firmware version check correctly. Firmware versions >= 1.80 should all support 40 UVD instances. - Replace AMDGPU_MAX_UVD_HANDLES with max_handles variable. v1: - The firmware can handle upto 40 UVD sessions. Signed-off-by: NArindam Nath <arindam.nath@amd.com> Signed-off-by: NAyyappa Chandolu <ayyappa.chandolu@amd.com> Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Nils Wallménius 提交于
All these are compile time constand and the drm_debugfs_create/remove_files functions take a const pointer argument. Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NNils Wallménius <nils.wallmenius@gmail.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Nils Wallménius 提交于
This marks the struct amdgpu_sched_ops const and adjusts amd_sched_init to take a const pointer for the ops param. The ops member of struct amd_gpu_scheduler is also changed to const. Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NNils Wallménius <nils.wallmenius@gmail.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Nils Wallménius 提交于
This patch marks some compile-time constant tables 'const'. The tables marked in this patch are the low hanging fruit where little other changes were necesary to avoid casting away constness etc. Also mark some tables that are private to a file as static. Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NNils Wallménius <nils.wallmenius@gmail.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Christian König 提交于
This way we can track when the flush is done. Signed-off-by: NChristian König <christian.koenig@amd.com> Acked-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: NChunming Zhou <david1.zhou@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Christian König 提交于
v2: rebase & cleanup This way we can store more than one fence as user for each VMID. Signed-off-by: NChristian König <christian.koenig@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> (v1) Reviewed-by: Chunming Zhou <david1.zhou@amd.com> (v1) Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Christian König 提交于
No need to have two of them any more. Signed-off-by: NChristian König <christian.koenig@amd.com> Acked-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: NChunming Zhou <david1.zhou@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 03 5月, 2016 9 次提交
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由 Christian König 提交于
Keeping the pages array around can use a lot of system memory when you want a large GART. Signed-off-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Christian König 提交于
Not needed any more. Signed-off-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Monk Liu 提交于
this is to fix fatal page fault error that occured if: job is signaled/released after its timeout work is already put to the global queue (in this case the cancel_delayed_work will return false), which will lead to NX-protection error page fault during job_timeout_func. Signed-off-by: NMonk Liu <Monk.Liu@amd.com> Reviewed-by: NChunming Zhou <david1.zhou@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Monk Liu 提交于
Add two callbacks to scheduler to maintain jobs, and invoked for job timeout calculations. Now TDR measures time gap from job is processed by hw. v2: fix typo Signed-off-by: NMonk Liu <Monk.Liu@amd.com> Reviewed-by: NChunming Zhou <david1.zhou@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Monk Liu 提交于
for those jobs submitted through scheduler, do not free it immediately after scheduled, instead free it in global workqueue by its sched fence signaling callback function. v2: call uf's bo_undef after job_run() call job's sync free after job_run() no static inline __amdgpu_job_free() anymore, just use kfree(job) to replace it. Signed-off-by: NMonk Liu <Monk.Liu@amd.com> Reviewed-by: NChunming Zhou <david1.zhou@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Monk Liu 提交于
More ground work for conditional execution on SDMA necessary for preemption. Signed-off-by: NMonk Liu <monk.liu@amd.com> Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Monk Liu 提交于
This adds the groundwork for conditional execution on SDMA which is necessary for preemption. Signed-off-by: NMonk Liu <monk.liu@amd.com> Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Nils Wallménius 提交于
It is only used locally in amdgpu_get_bios Signed-off-by: NNils Wallménius <nils.wallmenius@gmail.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Nils Wallménius 提交于
Signed-off-by: NNils Wallménius <nils.wallmenius@gmail.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 22 4月, 2016 1 次提交
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由 Sonny Jiang 提交于
Was previously always hardcoded to 0. Signed-off-by: NSonny Jiang <sonny.jiang@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
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- 07 4月, 2016 1 次提交
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由 Chunming Zhou 提交于
Signed-off-by: NChunming Zhou <David1.Zhou@amd.com> Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 05 4月, 2016 1 次提交
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由 Leo Liu 提交于
and revert fix following it accordingly Revert "drm/amdgpu: stop trying to suspend UVD sessions v2" Revert "drm/amdgpu: fix the UVD suspend sequence order" Signed-off-by: NLeo Liu <leo.liu@amd.com> Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 17 3月, 2016 3 次提交
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由 Monk Liu 提交于
Signed-off-by: NMonk Liu <Monk.Liu@amd.com> Reviewed-by: NChunming Zhou <david1.zhou@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Monk Liu 提交于
thus amdgpu_ib_free() can hook sched fence to SA manager in later patches. BTW: for amdgpu_free_job(), it should only fence_put() the fence of the last ib once, so fix it as well in this patch. Signed-off-by: NMonk Liu <Monk.Liu@amd.com> Reviewed-by: NChunming Zhou <david1.zhou@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Christian König 提交于
We don't need to extend them to 64bits any more, so avoid the extra overhead. v2: update commit message. Signed-off-by: NChristian König <christian.koenig@amd.com> Acked-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: NChunming Zhou <david1.zhou@amd.com>
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