- 06 8月, 2010 3 次提交
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由 Colin Cross 提交于
v2: fixes from Russell King: - include linux/io.h instead of asm/io.h - fix whitespace in Kconfig - Use spin_lock_init to initialize lock - Return -ENOSYS instead of BUG for unimplemented clock ops - Use proper return values in tegra2 clock ops additional changes: - Rename some clocks to match dev_ids - add rate propagation - add debugfs entries - add support for clock listed in clk_lookup under multiple dev_ids v3: - Replace per-clock locking with global clock lock - Autodetect clock state on init - Let clock dividers pick next lower possible frequency - Add support for clock init tables - Minor bug fixes - Fix checkpatch issues Signed-off-by: NColin Cross <ccross@android.com>
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由 Erik Gilling 提交于
v2: fixes from Russell King - include linux/io.h instead of asm/io.h and mach/io.h Signed-off-by: NColin Cross <ccross@android.com> Signed-off-by: NErik Gilling <konkers@android.com>
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由 Erik Gilling 提交于
v2: Fixes from Mike Rapoport - remove unused header files (mach/dma.h and mach/nand.h) - remove tegra 1 references from Makefile.boot v2: fixes from Russell King - remove mach/io.h include from mach/iomap.h - fix whitespace in Kconfig v2: from Colin Cross - fix invalid immediate in debug-macro.S v3: - allow selection of multiple boards Signed-off-by: NColin Cross <ccross@android.com> Signed-off-by: NErik Gilling <konkers@android.com>
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- 31 7月, 2010 4 次提交
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由 Linus Walleij 提交于
The patch to add the apb_pclk to the AMBA/PrimeCell bus broke RealView, since the clockdevice is not registered at probe() time. This moves clock initialization to a core_initcall() [rmk:moved before the problematical commit to avoid bisect problems] Signed-off-by: NLinus Walleij <linus.walleij@stericsson.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Julia Lawall 提交于
__sa1111_remove always frees its argument, so the subsequent reference to sachip->saved_state represents a use after free. __sa1111_remove does not appear to use the saved_state field, so the patch simply frees it first. A simplified version of the semantic patch that finds this problem is as follows: (http://coccinelle.lip6.fr/) // <smpl> @@ expression E,E2; @@ __sa1111_remove(E) ... ( E = E2 | * E ) // </smpl> Signed-off-by: NJulia Lawall <julia@diku.dk> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
The MMC card detection sense has become really confused with negations at various levels, leading to some platforms not detecting inserted cards. Fix this by converting everything to positive logic throughout, thereby getting rid of these negations. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Gary King 提交于
smp_processor_id() must not be called from a preemptible context (this is checked by CONFIG_DEBUG_PREEMPT). kmap_high_l1_vipt() was doing so. This lead to a problem where the wrong per_cpu kmap_high_l1_vipt_depth could be incremented, causing a BUG_ON(*depth <= 0); in kunmap_high_l1_vipt(). The solution is to move the call to smp_processor_id() after the call to preempt_disable(). Originally by: Andrew Howe <ahowe@nvidia.com> Signed-off-by: NGary King <gking@nvidia.com> Acked-by: NNicolas Pitre <nico.as.pitre@linaro.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 30 7月, 2010 2 次提交
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由 Magnus Damm 提交于
Introduce SHMOBILE_TIMER_HZ for SH-Mobile. Allow users to select HZ on their system to minimize potential timer drift. Use 128 Hz as default to work well with the 32768 Hz RCLK. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Magnus Damm 提交于
NR_IRQS_LEGACY is now defined in asm/irq.h, so drop it in mach/irqs.h. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 29 7月, 2010 7 次提交
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由 Russell King 提交于
The ioread/iowrite accessors also need barriers as they're used in place of readl/writel et.al. in portable drivers. Create __iormb() and __iowmb() which are conditionally defined to be barriers dependent on ARM_DMA_MEM_BUFFERABLE, and always use these macros in the accessors. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Catalin Marinas 提交于
When the coherent DMA buffers are mapped as Normal Non-cacheable (ARM_DMA_MEM_BUFFERABLE enabled), buffer accesses are no longer ordered with Device memory accesses causing failures in device drivers that do not use the mandatory memory barriers before starting a DMA transfer. LKML discussions led to the conclusion that such barriers have to be added to the I/O accessors: http://thread.gmane.org/gmane.linux.kernel/683509/focus=686153 http://thread.gmane.org/gmane.linux.ide/46414 http://thread.gmane.org/gmane.linux.kernel.cross-arch/5250 This patch introduces a wmb() barrier to the write*() I/O accessors to handle the situations where Normal Non-cacheable writes are still in the processor (or L2 cache controller) write buffer before a DMA transfer command is issued. For the read*() accessors, a rmb() is introduced after the I/O to avoid speculative loads where the driver polls for a DMA transfer ready bit. Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Catalin Marinas 提交于
This patch is in preparation for a subsequent patch which adds barriers to the I/O accessors. Since the mandatory barriers may do an L2 cache sync, this patch avoids a recursive call into l2x0_cache_sync() via the write*() accessors and wmb() and a call into l2x0_cache_sync() with the l2x0_lock held. Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Catalin Marinas 提交于
This patch introduces readl*_relaxed()/write*_relaxed() as the main I/O accessors (when __mem_pci is defined). The standard read*()/write*() macros are now based on the relaxed accessors. This patch is in preparation for a subsequent patch which adds barriers to the I/O accessors. Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Rabin Vincent 提交于
Don't use writeb() in uncompress.h, to avoid the following build errors when the "Add barriers to the I/O accessors" series is applied. Use __raw_writeb() instead. arch/arm/boot/compressed/misc.o: In function `putc': arch/arm/mach-ux500/include/mach/uncompress.h:41: undefined reference to `outer_cache' Acked-by: NLinus Walleij <linus.walleij@stericsson.com> Signed-off-by: NRabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 wanzongshun 提交于
add global control registers definition header file for nuc900 Signed-off-by: NWan ZongShun <mcuos.com@gmail.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Magnus Damm 提交于
Update the compressed boot Makefile for ARM to remove files during clean. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 28 7月, 2010 3 次提交
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由 Sekhar Nori 提交于
Per the da850/omap-l138 Beta EVM SOM schematic, the DEFDCDC2 and DEFDCDC3 lines are tied high. This leads to a 3.3V IO and 1.2V CVDD voltage. Pass the right platform data to the TPS6507x driver so it can operate on the DEFDCDC{2,3}_HIGH register to read and change voltage levels. Signed-off-by: NSekhar Nori <nsekhar@ti.com> Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: NLiam Girdwood <lrg@slimlogic.co.uk>
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由 Baruch Siach 提交于
This is the soc_camera support developed by Sascha Hauer for the i.MX27. Alan Carvalho de Assis modified the original driver to get it working on more recent kernels. I modified it further to add support for i.MX25. This driver has been tested on i.MX25 and i.MX27 based platforms. Signed-off-by: NBaruch Siach <baruch@tkos.co.il> Acked-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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由 Baruch Siach 提交于
The GPIO registers need protection from concurrent access for operations that are not atomic. Cc: stable@kernel.org Cc: Juergen Beisert <j.beisert@pengutronix.de> Cc: Daniel Mack <daniel@caiaq.de> Reported-by: rpkamiak@rockwellcollins.com Signed-off-by: NBaruch Siach <baruch@tkos.co.il> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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- 27 7月, 2010 21 次提交
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由 Kevin Wells 提交于
Add LPC32XX support in arch/arm/Kconfig and arch/arm/Makefile Signed-off-by: NKevin Wells <wellsk40@gmail.com> Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
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由 Kevin Wells 提交于
Signed-off-by: NKevin Wells <wellsk40@gmail.com> Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
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由 Kevin Wells 提交于
Platform support file for the PHY3250 mach id Signed-off-by: NKevin Wells <wellsk40@gmail.com> Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
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由 Kevin Wells 提交于
Misc support functions and prototypes used in the LPC32XX arch and platforms Signed-off-by: NKevin Wells <wellsk40@gmail.com> Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
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由 Kevin Wells 提交于
Serial port setup support code Signed-off-by: NKevin Wells <wellsk40@gmail.com> Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
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由 Kevin Wells 提交于
Support for system suspend and resume Signed-off-by: NKevin Wells <wellsk40@gmail.com>
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由 Kevin Wells 提交于
Common drivers for the LPC32XX used on all platforms Signed-off-by: NKevin Wells <wellsk40@gmail.com> Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
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由 Kevin Wells 提交于
Clock driver for the LPC32XX architecture Signed-off-by: NKevin Wells <wellsk40@gmail.com> Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
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由 Kevin Wells 提交于
Debug (printascii) and IRQ handler macros for the LPC32XX arch Signed-off-by: NKevin Wells <wellsk40@gmail.com> Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
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由 Kevin Wells 提交于
Header files for the LPC32xx arch Signed-off-by: NKevin Wells <wellsk40@gmail.com> Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
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由 Russell King 提交于
x86 calls machine_shutdown() from the various machine_*() calls which take the machine down ready for halting, restarting, etc, and uses this to bring the system safely to a point where those actions can be performed. Such actions are stopping the secondary CPUs. So, change the ARM implementation of these to reflect what x86 does. This solves kexec problems on ARM SMP platforms, where the secondary CPUs were left running across the kexec call. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
The TWD local timers are unable to wake up the CPU when it is placed into a low power mode, eg. C3. Therefore, we need to adapt things such that the TWD code can cope with this. We do this by always providing a broadcast tick function, and marking the fact that the TWD local timer will stop in low power modes. This means that when the CPU is placed into a low power mode, the core timer code marks this fact, and allows an IPI to be given to the core. Tested-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Thomas Gleixner <tglx@linutronix.de>
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由 Russell King 提交于
All implementations of cpu_proc_fin() start by disabling interrupts and then flush caches. Rather than have every processors proc_fin() implementation do this, move it out into generic code - and move the cache flush past setup_mm_for_reboot() (so it can benefit from having caches still enabled.) This allows cpu_proc_fin() to become independent of the L1/L2 cache types, and eventually move the L2 cache flushing into the L2 support code. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Kirill A. Shutemov 提交于
Statuses 3 (0b00011) and 6 (0x00110) of DFSR are Access Flags faults on ARMv6K and ARMv7. Let's patch fsr_info[] at runtime if we are on ARMv7 or later. Unfortunately, we don't have runtime check for 'K' extension, so we can't check for it. Signed-off-by: NKirill A. Shutemov <kirill@shutemov.name> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Kirill A. Shutemov 提交于
Signed-off-by: NKirill A. Shutemov <kirill@shutemov.name> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Kirill A. Shutemov 提交于
On ARM one Linux PGD entry contains two hardware entries (see page tables layout in pgtable.h). We normally guarantee that we always fill both L1 entries. But create_mapping() doesn't follow the rule. It can create inidividual L1 entries, so here we have to call pmd_none() check in do_translation_fault() for the entry really corresponded to address, not for the first of pair. Signed-off-by: NKirill A. Shutemov <kirill@shutemov.name> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Kirill A. Shutemov 提交于
Add one more parameter to hook_fault_code() to be able to set 'code' field of struct fsr_info. Signed-off-by: NKirill A. Shutemov <kirill@shutemov.name> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Kirill A. Shutemov 提交于
POSIX specify to use signal SIGBUS with code BUS_ADRALN for invalid address alignment. Signed-off-by: NKirill A. Shutemov <kirill@shutemov.name> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 eric miao 提交于
SPARSE_IRQ doesn't need to be a visible option, only those platforms supporting that will select it. Signed-off-by: NEric Miao <eric.miao@canonical.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
The DMA coherent remap area is used to provide an uncached mapping of memory for coherency with DMA engines. Currently, we look for any free hole which our allocation will fit in with page alignment. However, this can lead to fragmentation of the area, and allows small allocations to cross L1 entry boundaries. This is undesirable as we want to move towards allocating sections of memory. Align allocations according to the size, limiting the alignment between the page and section sizes. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
We don't need our own implementation of this, use the generic library implementation instead. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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