- 16 3月, 2022 6 次提交
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由 Jing Zhou 提交于
[Why] Crash caused by a ddc update failure [How] Update engine ddc before release engine. Reviewed-by: NWyatt Wood <Wyatt.Wood@amd.com> Reviewed-by: NAric Cyr <Aric.Cyr@amd.com> Acked-by: NAgustin Gutierrez <agustin.gutierrez@amd.com> Signed-off-by: NJing Zhou <Jing.Zhou@amd.com> Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 JinZe.Xu 提交于
[How] 1. Search OEM I2C info from BIOS and compare with input parameter. 2. If BIOS doesn't record it, just try to read one byte. Reviewed-by: NAric Cyr <Aric.Cyr@amd.com> Acked-by: NAgustin Gutierrez <agustin.gutierrez@amd.com> Signed-off-by: NJinZe.Xu <JinZe.Xu@amd.com> Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Charlene Liu 提交于
[why] dcn31x could use dcn31 sepcific which contains deep_color_ratio for dmub Reviewed-by: NNevenko Stupar <Nevenko.Stupar@amd.com> Reviewed-by: NHansen Dsouza <hansen.dsouza@amd.com> Reviewed-by: NAric Cyr <Aric.Cyr@amd.com> Acked-by: NAlan Liu <HaoPing.Liu@amd.com> Signed-off-by: NCharlene Liu <Charlene.Liu@amd.com> Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Wyatt Wood 提交于
[Why] There is a sequence in which aux arbitration doesn't work correctly. Driver is left with aux access after it times out waiting for access. In future dmub fw is never granted aux access and is stuck in a while loop. [How] Cancel aux request from driver after timing out. Reviewed-by: NAric Cyr <Aric.Cyr@amd.com> Acked-by: NAlan Liu <HaoPing.Liu@amd.com> Signed-off-by: NWyatt Wood <wyatt.wood@amd.com> Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Hansen Dsouza 提交于
Fix enum mapping for deep color ratio Reviewed-by: NCharlene Liu <Charlene.Liu@amd.com> Acked-by: NAlan Liu <HaoPing.Liu@amd.com> Signed-off-by: NHansen Dsouza <Hansen.Dsouza@amd.com> Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Charlene Liu 提交于
[Why & How] Add debug option to bypass ssinfo from BIOS for dcn315. Reviewed-by: NPark, Chris <Chris.Park@amd.com> Acked-by: NQingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: NCharlene Liu <Charlene.Liu@amd.com> Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 03 3月, 2022 1 次提交
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由 Shah Dharati 提交于
[Why] PSR Power on/off is done in PSR. Add a dc_debug option and dmub setting to use PHY implementation of this instead. [How] Add a dc_debug option and dmub setting to use PHY FSM Power up/down for PSR. Co-authored-by: NShah Dharati <dharati.shah@amd.com> Reviewed-by: NHansen Dsouza <hansen.dsouza@amd.com> Acked-by: NAlan Liu <HaoPing.Liu@amd.com> Signed-off-by: NShah Dharati <dharati.shah@amd.com> Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 17 2月, 2022 1 次提交
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[Why] Currently driver enables dmub outbox notification before oubox ISR is registered. During boot scenario, sometimes dmub issues hpd outbox message before driver registers ISR and those messages are missed. [How] Enable dmub outbox notification after outbox ISR is registered. Also, restructured outbox enable code to call from dm layer and renamed APIs. Reviewed-by: NJun Lei <Jun.Lei@amd.com> Acked-by: NJasdeep Dhillon <jdhillon@amd.com> Signed-off-by: NMeenakshikumar Somasundaram <meenakshikumar.somasundaram@amd.com> Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 03 2月, 2022 2 次提交
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由 Wenjing Liu 提交于
[why] Factor set dp lane settings to link_hwss. v2: fix statement with no effect warning (Alex) Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: NJun Lei <Jun.Lei@amd.com> Acked-by: NStylon Wang <stylon.wang@amd.com> Signed-off-by: NWenjing Liu <wenjing.liu@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Wyatt Wood 提交于
[Why + How] Payload reply is unknown and not handled in switch statement. Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: NAnthony Koo <Anthony.Koo@amd.com> Acked-by: NStylon Wang <stylon.wang@amd.com> Signed-off-by: NWyatt Wood <wyatt.wood@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 26 1月, 2022 1 次提交
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由 Nicholas Kazlauskas 提交于
[Why] DMCUB will hang if we send a PSR unsupported set version command. This can occur if we fall-through into the default case in the switch statement for PSR version. [How] Add an unsupported check after the switch statement. Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: NAnthony Koo <Anthony.Koo@amd.com> Acked-by: NRodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: NNicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 02 12月, 2021 1 次提交
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由 Dale Zhao 提交于
[Why] Using the hdmi_disable option doesnt disable 6GB bandwidth [How] Add debug.hdmi20_disable flage when checking 6GB enable or not. Reviewed-by: NChris Park <Chris.Park@amd.com> Reviewed-by: NAric Cyr <Aric.Cyr@amd.com> Acked-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: NDale Zhao <dale.zhao@amd.com> Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 23 11月, 2021 1 次提交
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由 Mikita Lipski 提交于
[why] - Adding a DM interface to enable DSC over eDP on Linux - DSC over eDP will allow to power savings by reducing the bandwidth required to support panel's modes - Apply link optimization algorithm to reduce link bandwidth when DSC is enabled [how] - Read eDP panel's DSC capabilities - Apply DSC policy on eDP panel based on its DSC capabilities - Enable DSC encoder's on the pipe - Enable DSC on panel's side by setting DSC_ENABLE DPCD register - Adding link optimization algorithm to reduce link rate or lane count based Reviewed-by: NNicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Acked-by: NWayne Lin <wayne.lin@amd.com> Signed-off-by: NMikita Lipski <mikita.lipski@amd.com> Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 18 11月, 2021 4 次提交
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由 Alvin Lee 提交于
[Why] In DC we want to wait for the INBOX0 HW Lock command to ACK before continuing. This is to ensure that the lock has been successfully acquired before programming HW in DC. [How] Add interfaces to send messages on INBOX0, poll for their completation and clear the ack. Reviewed-by: NNicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Acked-by: NAnson Jacob <Anson.Jacob@amd.com> Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: NAlvin Lee <Alvin.Lee2@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Robin Chen 提交于
[Why] Some panels require to use TPS3 pattern to wake up link in PSR mode. [How] To add TPS3 selection information in PSR settings command and pass to DMUB FW. Reviewed-by: NAnthony Koo <Anthony.Koo@amd.com> Acked-by: NAnson Jacob <Anson.Jacob@amd.com> Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: NRobin Chen <po-tchen@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Charlene Liu 提交于
[why] reduce az indirect register dump. need add az clock_gating control field used in some project. [how] conditional output indrect register in the log. add clock_gating feild Reviewed-by: NSung joon Kim <Sungjoon.Kim@amd.com> Acked-by: NAnson Jacob <Anson.Jacob@amd.com> Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: NCharlene Liu <Charlene.Liu@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Mikita Lipski 提交于
[why] PSR set power command wasn't setting panel instance and command version which caused both streams to overwrite the same PSR state. [how] Pass panel instance to the set power command function and to DMUB and set command version enum Reviewed-by: NAnthony Koo <Anthony.Koo@amd.com> Acked-by: NAnson Jacob <Anson.Jacob@amd.com> Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: NMikita Lipski <mikita.lipski@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 04 11月, 2021 1 次提交
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由 Jake Wang 提交于
[Why] HPO is only used for DP2.0. HPO HW control should be disable when not being used to save power. [How] Shutdown HPO HW control during init hw. Shutdown HPO HW control during stream disable. Enable HPO HW control during stream enable if DP2.0. Acked-by: NAurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: NJake Wang <haonan.wang2@amd.com> Reviewed-by: NNicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 29 10月, 2021 4 次提交
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由 Guo, Bing 提交于
Why: For audio packet type 0x02, there are 2 Layouts: Layout = 0 for 2 channels and Layout = 1 for > 2 channels. Layout will affect bandwidth check. Currently, for HDMI FRL, Layout field isn't set and has a default value of 0, so theoretically only 2-channel audio for audio packet type 0x02 is supported now. How: 1. Set Layout properly according to maximum audio channel numbers for audios with audio packet type 0x02. 2. 8ch LPCM audio is not supported for timing modes with v_active <= 576. Reviewed-by: NChris Park <chris.park@amd.com> Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Acked-by: NAgustin Gutierrez <agustin.gutierrez@amd.com> Signed-off-by: NBing Guo <Bing.Guo@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Aric Cyr 提交于
[Why] When writing long AUX commands some sinks will respond will write status update requiring source to read status. [How] When a write request is replied with data (AUX_ACK_M), retry a read of write status to determine when the write is completed. Reviewed-by: NMartin Leung <Martin.Leung@amd.com> Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Acked-by: NAgustin Gutierrez <agustin.gutierrez@amd.com> Signed-off-by: NAric Cyr <aric.cyr@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Michael Strauss 提交于
[WHY] i2c memory doesn't get set to light sleep on hw init as intended [HOW] Set i2c to light sleep after reg gets zeroed, ensuring memory power control doesn't get disabled for any other DIO memory Reviewed-by: NHaonan Wang <Haonan.Wang2@amd.com> Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Acked-by: NAgustin Gutierrez <agustin.gutierrez@amd.com> Signed-off-by: NMichael Strauss <michael.strauss@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Robin Chen 提交于
[Why] To expose new power optimization flags to PSR interface. It allows the PSR related power features can be enabled separately base on different use scenarios. Reviewed-by: NAnthony Koo <Anthony.Koo@amd.com> Acked-by: NAgustin Gutierrez <agustin.gutierrez@amd.com> Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: NRobin Chen <po-tchen@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 20 10月, 2021 1 次提交
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由 Mikita Lipski 提交于
[why] PSR_STATE2b was introduced on DMCUB side, but not on the driver side, which caused convert_psr_state helper function to return PSR_STATE_INVALID. That caused visual lagging during state transition. [how] Add PSR_STATE2b to dc_psr_state and convert_psr_state Reviewed-by: NWyatt Wood <Wyatt.Wood@amd.com> Acked-by: NAgustin Gutierrez Sanchez <agustin.gutierrez@amd.com> Signed-off-by: NMikita Lipski <mikita.lipski@amd.com> Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 07 10月, 2021 1 次提交
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[Why & How] 1. Remove unnecessary dummy interrupt source for USB4 HPD & HPD RX 2. Adjust parameter for DPCD writing of link training process of DPIA link 3. Adjust specific AUX defer delay for DPIA link Reviewed-by: NJimmy Kizito <Jimmy.Kizito@amd.com> Acked-by: NWayne Lin <Wayne.Lin@amd.com> Acked-by: NNicholas Kazlauskas <nicholas.kazlauskas@amd.com> Acked-by: NHarry Wentland <harry.wentland@amd.com> Signed-off-by: NMeenakshikumar Somasundaram <meenakshikumar.somasundaram@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 05 10月, 2021 1 次提交
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由 Zhan Liu 提交于
[Why] add display related cyan_skillfish files in. makefile controlled by CONFIG_DRM_AMD_DC_DCN201 flag. v2: squash in clang fixes from Harry, Nathan v3: squash in missing CONFIG_DRM_AMD_DC check (Alex) Signed-off-by: NCharlene Liu <charlene.liu@amd.com> Signed-off-by: NZhan Liu <zhan.liu@amd.com> Reviewed-by: NCharlene Liu <charlene.liu@amd.com> Acked-by: NJun Lei <jun.lei@amd.com> Acked-by: NHarry Wentland <harry.wentland@amd.com> Acked-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 28 9月, 2021 1 次提交
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由 Eric Yang 提交于
[Why] To prevent unnecessary wake up of DMCUB when ABM is enabled without PSR enabled, driver will notify DMCUB to stop ABM's vertical interrupts if vsync is disabled and steady state is reached. [How] Send inbox message to notify ABM pause based on vsync on/off Reviewed-by: NNicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Acked-by: NAnson Jacob <Anson.Jacob@amd.com> Signed-off-by: NEric Yang <Eric.Yang2@amd.com> Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 24 9月, 2021 2 次提交
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由 Arnd Bergmann 提交于
Using an empty macro expansion as a conditional expression produces a W=1 warning: drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_aux.c: In function 'dce_aux_transfer_with_retries': drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_aux.c:775:156: error: suggest braces around empty body in an 'if' statement [-Werror=empty-body] 775 | "dce_aux_transfer_with_retries: AUX_RET_SUCCESS: AUX_TRANSACTION_REPLY_I2C_OVER_AUX_DEFER"); | ^ drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_aux.c:783:155: error: suggest braces around empty body in an 'if' statement [-Werror=empty-body] 783 | "dce_aux_transfer_with_retries: AUX_RET_SUCCESS: AUX_TRANSACTION_REPLY_I2C_OVER_AUX_NACK"); | ^ Expand it to "do { } while (0)" instead to make the expression more robust and avoid the warning. Fixes: 56aca230 ("drm/amd/display: Add AUX I2C tracing.") Signed-off-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Arnd Bergmann 提交于
Using an empty macro expansion as a conditional expression produces a W=1 warning: drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_aux.c: In function 'dce_aux_transfer_with_retries': drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_aux.c:775:156: error: suggest braces around empty body in an 'if' statement [-Werror=empty-body] 775 | "dce_aux_transfer_with_retries: AUX_RET_SUCCESS: AUX_TRANSACTION_REPLY_I2C_OVER_AUX_DEFER"); | ^ drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_aux.c:783:155: error: suggest braces around empty body in an 'if' statement [-Werror=empty-body] 783 | "dce_aux_transfer_with_retries: AUX_RET_SUCCESS: AUX_TRANSACTION_REPLY_I2C_OVER_AUX_NACK"); | ^ Expand it to "do { } while (0)" instead to make the expression more robust and avoid the warning. Fixes: 56aca230 ("drm/amd/display: Add AUX I2C tracing.") Signed-off-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 16 9月, 2021 1 次提交
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由 Harry Wentland 提交于
On Carrizo/Stoney systems we set backlight through panel_cntl, i.e. directly via the PWM registers, if DMCU is not initialized. We always read it back through ABM registers which leads to a mismatch and forces atomic_commit to program the backlight each time. Instead make sure we use the same logic for backlight readback, i.e. read it from panel_cntl if DMCU is not initialized. We also need to remove some extraneous and incorrect calculations at the end of dce_get_16_bit_backlight_from_pwm. Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1666 Cc: stable@vger.kernel.org Reviewed-by: NJosip Pavic <josip.pavic@amd.com> Acked-by: NMikita Lipski <mikita.lipski@amd.com> Signed-off-by: NHarry Wentland <harry.wentland@amd.com> Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 15 9月, 2021 3 次提交
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由 Harry Wentland 提交于
On Carrizo/Stoney systems we set backlight through panel_cntl, i.e. directly via the PWM registers, if DMCU is not initialized. We always read it back through ABM registers which leads to a mismatch and forces atomic_commit to program the backlight each time. Instead make sure we use the same logic for backlight readback, i.e. read it from panel_cntl if DMCU is not initialized. We also need to remove some extraneous and incorrect calculations at the end of dce_get_16_bit_backlight_from_pwm. Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1666 Cc: stable@vger.kernel.org Reviewed-by: NJosip Pavic <josip.pavic@amd.com> Acked-by: NMikita Lipski <mikita.lipski@amd.com> Signed-off-by: NHarry Wentland <harry.wentland@amd.com> Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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[Why] Need a check for NULL pointer access for ddc pin and aux engine. [How] Adding a check for ddc pin and aux engine accesses. Reviewed-by: NJimmy Kizito <jimmy.kizito@amd.com> Acked-by: NMikita Lipski <mikita.lipski@amd.com> Signed-off-by: NMeenakshikumar Somasundaram <meenakshikumar.somasundaram@amd.com> Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Leo (Hanghong) Ma 提交于
This reverts commit "Revert "Add DPCD writes at key points" ". The following patch will fix the system hang issue. v2: squash in indentation warning fix Signed-off-by: NLeo (Hanghong) Ma <hanghong.ma@amd.com> Acked-by: NMikita Lipski <mikita.lipski@amd.com> Reviewed-by: NAric Cyr <aric.cyr@amd.com> Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 02 9月, 2021 1 次提交
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由 Josip Pavic 提交于
[Why] Some ABM registers don't exist on DCN 3.01, so are missing from its register offset list. However, this list was copied to later versions of DCN that do have these registers. As a result, they're inaccessible from the driver on those DCN versions even though they exist. [How] Add the missing ABM register offsets to DCN 3.02+ Reviewed-by: NAnthony Koo <Anthony.Koo@amd.com> Acked-by: NQingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: NJosip Pavic <Josip.Pavic@amd.com> Tested-by: NDaniel Wheeler <Daniel.Wheeler@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 10 8月, 2021 2 次提交
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由 Randy Dunlap 提交于
Building with W=1 complains about an empty 'else' statement, so use the usual do-nothing-while-0 loop to quieten this warning. ../drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dmub_psr.c:113:53: warning: suggest braces around empty body in an 'else' statement [-Wempty-body] 113 | *state, retry_count); Fixes: b30eda8d ("drm/amd/display: Add ETW log to dmub_psr_get_state") Signed-off-by: NRandy Dunlap <rdunlap@infradead.org> Cc: Wyatt Wood <wyatt.wood@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Christian König <christian.koenig@amd.com> Cc: "Pan, Xinhui" <Xinhui.Pan@amd.com> Cc: Harry Wentland <harry.wentland@amd.com> Cc: Leo Li <sunpeng.li@amd.com> Cc: amd-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org Cc: David Airlie <airlied@linux.ie> Cc: Daniel Vetter <daniel@ffwll.ch> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Ashley Thomas 提交于
[Why] Developers can find it useful if the driver can produce AUX traces without special equipment. [How] Add AUX tracing. Reviewed-by: NZhan Liu <zhan.liu@amd.com> Acked-by: NAnson Jacob <Anson.Jacob@amd.com> Signed-off-by: NAshley Thomas <Ashley.Thomas2@amd.com> Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 28 7月, 2021 3 次提交
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由 Wyatt Wood 提交于
[Why] GPINT commands have the lowest priority in DMCUB, so it's possible that the command isn't processed in time. [How] Add a log to help identify this case. Reviewed-by: NKoo Anthony <Anthony.Koo@amd.com> Acked-by: NSolomon Chiu <solomon.chiu@amd.com> Signed-off-by: NWyatt Wood <wyatt.wood@amd.com> Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Wyatt Wood 提交于
[Why] Would like to identify the cause of AUX transactions failing via ETW logs. [How] Add ETW logging for AUX failures. Reviewed-by: NPavic Josip <Josip.Pavic@amd.com> Acked-by: NSolomon Chiu <solomon.chiu@amd.com> Signed-off-by: NWyatt Wood <wyatt.wood@amd.com> Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Mikita Lipski 提交于
[why] For dual eDP when setting the new settings we need to set command version to DMUB_CMD_PSR_CONTROL_VERSION_1, otherwise DMUB will not read panel_inst parameter. [how] Instead of PSR_VERSION_1 pass DMUB_CMD_PSR_CONTROL_VERSION_1 Reviewed-by: NWood Wyatt <Wyatt.Wood@amd.com> Acked-by: NSolomon Chiu <solomon.chiu@amd.com> Signed-off-by: NMikita Lipski <mikita.lipski@amd.com> Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 22 7月, 2021 2 次提交
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由 Eric Yang 提交于
[Why] During S4/S5/reboot, sometimes riommu invalidation request arrive too early, DCN may be unable to respond to the invalidation request resulting in pstate hang. [How] VBIOS will force allow pstate for riommu invalidation and driver will clear it after powering down display pipes. Acked-by: NRodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: NEric Yang <Eric.Yang2@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Eric Yang 提交于
[Why] During S4/S5/reboot, sometimes riommu invalidation request arrive too early, DCN may be unable to respond to the invalidation request resulting in pstate hang. [How] VBIOS will force allow pstate for riommu invalidation and driver will clear it after powering down display pipes. Acked-by: NRodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: NEric Yang <Eric.Yang2@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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