This chip is no longer being actively developed for (it was superceded
by the TILEPro64 in 2008), and in any case the existing compiler and
toolchain in the community do not support it.  It's unlikely that the
kernel works with TILE64 at this point as the configuration has not been
tested in years.  The support is also awkward as it requires maintaining
a significant number of ifdefs.  So, just remove it altogether.
Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>

The definisions of __ffs(), __fls(), and ffs() for tile are almost same
as asm-generic/bitops-*.h.  The only difference is that it is defined
as __always_inline or inline.  So this switches to use those headers.
Signed-off-by: NAkinobu Mita <akinobu.mita@gmail.com>
Signed-off-by: Chris Metcalf <cmetcalf@tilera.com> [moved #includes to end]

Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>

We were rolling our own bundle_bits, which is unnecessary.
Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>

There's no need to make up new ways of computing the addresses
of the Tilera hypervisor APIs; just use the standard method
of relying on the symbols to provide the addresses.
Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>

Also fix mentions of it in #error statements.
Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>

It was bombed away because it was previously marked as __devinit,
but it should be an __init function.
Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>

If we wait until after including a bunch of other files, we
will have generated so much warning spew that it's hard to
notice the error about using the wrong compiler.
Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>

Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>

Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>

Explain the rationale of not overlapping the 64-bit DMA window
with the PA range.
Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>

It isn't used any more by us now that the generic kernel build
offers DEBUG_INFO_REDUCED, so just get rid of it.
Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>

We use virt_to_pte(NULL, va) a lot, which isn't very obvious.
I added virt_to_kpte(va) as a more obvious wrapper function,
that also validates the va as being a kernel adddress.

And, I fixed the semantics of virt_to_pte() so that we handle
the pud and pmd the same way, and we now document the fact that
we handle the final pte level differently.
Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>

Allow enabling frame pointer support; this makes it easier to hook
into the various kernel features that claim they require it without
having to add Kconfig conditionals everywhere (a la mips, ppc, s390,
and microblaze).  When enabled, it basically eliminates leaf functions
as such, and stops optimizing tail and sibling calls.  It adds around
3% to the size of the kernel when enabled.
Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>

Newer hypervisors have an API for reporting per-cpu statistics
information.  This change allows seeing that information via
/sys/devices/system/cpu/cpuN/hv_stats file for each core.
Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>

Enter kernel debugger at boot with:
  --hvd UART_1=1 --hvx kgdbwait --hvx kgdboc=ttyS1,115200
or at runtime with:
  echo ttyS1,115200 > /sys/module/kgdboc/parameters/kgdboc
  echo g > /proc/sysrq-trigger
Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>

Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
Acked-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

The TILE-Gx chip includes an on-chip UART.  This change adds support
for using the UART from within the kernel.  The UART shim has more
functionality than is exposed here, but to keep the kernel code and
binary simpler, this is a subset of the full API designed to enable
a standard Linux tty serial driver only.
Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>

The existing code relied on the hardware definition (<arch/chip.h>)
to specify how much VA and PA space was available.  It's convenient
to allow customizing this for some configurations, so provide symbols
MAX_PA_WIDTH and MAX_VA_WIDTH in <asm/page.h> that can be modified
if desired.

Additionally, move away from the MEM_XX_INTRPT nomenclature to
define the start of various regions within the VA space.  In fact
the cleaner symbol is, for example, MEM_SV_START, to indicate the
start of the area used for supervisor code; the actual address of the
interrupt vectors is not as important, and can be changed if desired.
As part of this change, convert from "intrpt1" nomenclature (which
built in the old privilege-level 1 model) to a simple "intrpt".

Also strip out some tilepro-specific code supporting modifying the
PL the kernel could run at, since we don't actually support using
different PLs in tilepro, only tilegx.
Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>

Technically, user privilege is anything less than kernel
privilege.  We modify the existing user_mode() macro to have
this semantic (and use it in a couple of places it wasn't being
used before), and add an IS_KERNEL_EX1() macro to the assembly
code as well.
Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>

We remove some debug code in relocate_kernel_64.S that made raw
calls to the hv_console_putc Tilera hypervisor API, since everything
should funnel through the early_hv_write() API.
Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>

This tile-specific API had a minor bug, in that if a super huge (>4GB)
page mapped a particular address range, we wouldn't handle it correctly.
As part of fixing that bug, I also cleaned up some of the pud and pmd
accessors to make them more consistent.
Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>

Previously, we used a special-purpose register (SPR_SYSTEM_SAVE_K_0)
to hold the CPU number and the top of the current kernel stack
by using the low bits to hold the CPU number, and using the high
bits to hold the address of the page just above where we'd want
the kernel stack to be.  That way we could initialize a new SP
when first entering the kernel by just masking the SPR value and
subtracting a couple of words.

However, it's actually more useful to be able to place an arbitrary
kernel-top value in the SPR.  This allows us to create a new stack
context (e.g. for virtualization) with an arbitrary top-of-stack VA.
To make this work, we now store the CPU number in the high bits,
above the highest legal VA bit (42 bits in the current tilegx
microarchitecture).  The full 42 bits are thus available to store the
top of stack value.  Getting the current cpu (a relatively common
operation) is still fast; it's now a shift rather than a mask.

We make this change only for tilegx, since tilepro has too few SPR
bits to do this, and we don't need this support on tilepro anyway.
Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>

We use the validate_current() API to make sure that "current" seems
plausible before using it.  With the new show_regs_print_info()
API, we want to check that current is OK before calling it, since
otherwise we will end up in a recursive panic.
Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>

Normally the build doesn't include these warnings, but at one
point I built with -Wsign-compare, and noticed a few things that
are technically bugs.  This change fixes those things.
Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>

With this change such sections are grouped with regular text
in the vmlinux image; this change puts them at the front,
which is where the standard Linux includes .text.hot*.
This change should fix a recently-observed bug where a bunch of
symbols were being omitted from the /proc/kallsyms output
because they fell between _etext and _sinittext.
Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>

In strncpy_from_user_asm, when the destination buffer length was the
same as the actual string length, we were returning the size of the
destination buffer.  But since it's a NUL terminated string, we should
return the length of the string instead.
Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>

Nothing in the codebase was using them, and as written they took
"unsigned long" as the physical address rather than "phys_addr_t",
which is wrong on tilepro anyway.  Rather than fixing stale APIs,
just remove them; if there's ever demand for them on this platform,
we can put them back.
Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>

We had been doing an automatic full eviction of the L1 I$
everywhere whenever we did a kernel-space TLB flush.  It turns
out this isn't necessary, since all the callers already handle
doing a flush if necessary.
Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>

This enables support for "kexec --initrd" for tile.
Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>

With this change, tile Linux now supports address-space layout
randomization for shared objects, stack, heap and vdso.
Acked-by: NJiri Kosina <jkosina@suse.cz>
Signed-off-by: NTony Lu <zlu@tilera.com>
Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>

The r1 value is set based on the r0 value as we return to user space.
So tracing tools won't automatically see the right value.  Fix this by
generating the correct r1 value in do_syscall_trace_exit() rather
than trying to tamper with the hot path in syscall return.
Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>

The "available_irqs" value needs to actually reflect the IRQs
available, not just start as an all-ones mask, since we only
have 32 IRQs available even on a 64-bit platform.
Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>

This may fix a reported bug where an R_TILEGX_64 in a module was not
pointing to an aligned address.
Reported-by: NSimon Marchi <simon.marchi@polymtl.ca>
Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>

This change includes support for Kprobes, Jprobes and Return Probes.
Reviewed-by: NMasami Hiramatsu <masami.hiramatsu.pt@hitachi.com>
Signed-off-by: NTony Lu <zlu@tilera.com>
Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>

This commit adds support for static ftrace, graph function support,
and dynamic tracer support.
Signed-off-by: NTony Lu <zlu@tilera.com>
Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>

This change adds infrastructure (CONFIG_TILE_HVGLUE_TRACE) that
provides C code wrappers for the calls the kernel makes to the Tilera
hypervisor.  This allows standard kernel infrastructure like FTRACE to
be able to instrument hypervisor calls.

To allow direct calls to the true API, we export their names with a
leading underscore as well.  This is important for the few contexts
where we need to make hypervisor calls without touching the stack.

As part of this change, we also switch from creating the symbols
with linker magic to creating them with assembler magic.  This lets
us provide a symbol type and generally make them appear more as symbols
and less as just random values in the Elf namespace.
Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>

If ioreamp_prot() fails in ioremap_page_range() due to kernel memory
exhaustion, we previously would leak a struct vm_struct.
Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>

This change creates the framework for vDSO calls, makes the existing
rt_sigreturn() mechanism use it, and adds a fast gettimeofday().
Now that we need to expose the vDSO address to userspace, we add
AT_SYSINFO_EHDR to the set of aux entries provided to userspace.
(You can disable any extra vDSO support by booting with vdso=0,
but the rt_sigreturn vDSO page will still be provided.)

Note that glibc has supported the tile vDSO since release 2.17.
Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>

The tile code notifies the simulator of new ET_EXEC objects starting
to execute so that tracing code can properly annotate the objects.
However, we didn't support ET_DYN executables like ld.so, so we
didn't properly load symbols, etc.  This change enables that support;
we use a variant of the SIM_CONTROL_DLOPEN simulator notification
that newer simulators will recognize and use to set the base address
for the next SIM_CONTROL_OS_EXEC notification.
Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>