- 14 5月, 2015 2 次提交
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由 Krzysztof Kozlowski 提交于
of_machine_is_compatible() seems to be preferred over soc_is_exynos4(). Signed-off-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: NKukjin Kim <kgene@kernel.org>
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由 Krzysztof Kozlowski 提交于
On Exynos4412 boards (Trats2, Odroid U3) after enabling L2 cache in 56b60b8b ("ARM: 8265/1: dts: exynos4: Add nodes for L2 cache controller") the second suspend to RAM failed. First suspend worked fine but the next one hang just after powering down of secondary CPUs (system consumed energy as it would be running but was not responsive). The issue was caused by enabling delayed reset assertion for CPU0 just after issuing power down of cores. This was introduced for Exynos4 in 13cfa6c4 ("ARM: EXYNOS: Fix CPU idle clock down after CPU off"). The whole behavior is not well documented but after checking with vendor code this should be done like this (on Exynos4): 1. Enable delayed reset assertion when system is running (for all CPUs). 2. Disable delayed reset assertion before suspending the system. This can be done after powering off secondary CPUs. 3. Re-enable the delayed reset assertion when system is resumed. Fixes: 13cfa6c4 ("ARM: EXYNOS: Fix CPU idle clock down after CPU off") Cc: <stable@vger.kernel.org> Signed-off-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com> Tested-by: NBartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Tested-by: NChanwoo Choi <cw00.choi@samsung.com> Signed-off-by: NKukjin Kim <kgene@kernel.org>
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- 13 5月, 2015 7 次提交
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由 Heiko Stuebner 提交于
This reverts commit b403125d. As reported by Chris, both commits b403125d "ARM: rockchip: fix undefined instruction of reset_ctrl_regs" 0ea001d3 "ARM: rockchip: disable dapswjdp during suspend" actually fix the same issue and b403125d is the older one, which got superseded by 0ea001d3. Therefore revert the obsolete one again. Reported-by: NChris Zhong <zyw@rock-chips.com> Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
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由 Krzysztof Kozlowski 提交于
ERR_PTR was dereferenced during sub domain parsing, if parent domain could not be obtained (because of invalid phandle or deferred registration of parent domain). The Exynos power domain code checked whether of_genpd_get_from_provider() returned NULL and in that case it skipped that power domain node. However this function returns ERR_PTR or valid pointer, not NULL. Fixes: 0f780751 ("ARM: EXYNOS: add support for sub-power domains") Cc: <stable@vger.kernel.org> [4.0+] Signed-off-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: NKukjin Kim <kgene@kernel.org>
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由 Alexei Starovoitov 提交于
FROM_BE16: 'ror %reg, 8' doesn't clear upper bits of the register, so use additional 'movzwl' insn to zero extend 16 bits into 64 FROM_LE16: should zero extend lower 16 bits into 64 bit FROM_LE32: should zero extend lower 32 bits into 64 bit Fixes: 89aa0758 ("net: sock: allow eBPF programs to be attached to sockets") Signed-off-by: NAlexei Starovoitov <ast@plumgrid.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Helge Deller 提交于
On architectures where the stack grows upwards (CONFIG_STACK_GROWSUP=y, currently parisc and metag only) stack randomization sometimes leads to crashes when the stack ulimit is set to lower values than STACK_RND_MASK (which is 8 MB by default if not defined in arch-specific headers). The problem is, that when the stack vm_area_struct is set up in fs/exec.c, the additional space needed for the stack randomization (as defined by the value of STACK_RND_MASK) was not taken into account yet and as such, when the stack randomization code added a random offset to the stack start, the stack effectively got smaller than what the user defined via rlimit_max(RLIMIT_STACK) which then sometimes leads to out-of-stack situations and crashes. This patch fixes it by adding the maximum possible amount of memory (based on STACK_RND_MASK) which theoretically could be added by the stack randomization code to the initial stack size. That way, the user-defined stack size is always guaranteed to be at minimum what is defined via rlimit_max(RLIMIT_STACK). This bug is currently not visible on the metag architecture, because on metag STACK_RND_MASK is defined to 0 which effectively disables stack randomization. The changes to fs/exec.c are inside an "#ifdef CONFIG_STACK_GROWSUP" section, so it does not affect other platformws beside those where the stack grows upwards (parisc and metag). Signed-off-by: NHelge Deller <deller@gmx.de> Cc: linux-parisc@vger.kernel.org Cc: James Hogan <james.hogan@imgtec.com> Cc: linux-metag@vger.kernel.org Cc: stable@vger.kernel.org # v3.16+
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由 Julien Grall 提交于
Since commit 8b283c02 ("ARM: exynos4/5: convert pmu wakeup to stacked domains"), a suspend/resume is not supported on old DT. Although, rather than printing a warning and continue to boot, the kernel will segfault just after: ------------[ cut here ]------------ WARNING: CPU: 1 PID: 1 at arch/arm/mach-exynos/suspend.c:726 exynos_pm_init+0x4c/0xc8() Modules linked in: CPU: 1 PID: 1 Comm: swapper/0 Not tainted 4.1.0-rc3 #1 Hardware name: SAMSUNG EXYNOS (Flattened Device Tree) [<c02181c4>] (unwind_backtrace) from [<c0213b2c>] (show_stack+0x10/0x14) [<c0213b2c>] (show_stack) from [<c0949890>] (dump_stack+0x70/0x8c) [<c0949890>] (dump_stack) from [<c024f0b0>] (warn_slowpath_common+0x74/0xac) [<c024f0b0>] (warn_slowpath_common) from [<c024f104>] (warn_slowpath_null+0x1c/0x24) [<c024f104>] (warn_slowpath_null) from [<c0cf1d28>] (exynos_pm_init+0x4c/0xc8) [<c0cf1d28>] (exynos_pm_init) from [<c0ceaae8>] (init_machine_late+0x1c/0x28) [<c0ceaae8>] (init_machine_late) from [<c020aa64>] (do_one_initcall+0x80/0x1d0) [<c020aa64>] (do_one_initcall) from [<c0ce8d4c>] (kernel_init_freeable+0x10c/0x1d8) [<c0ce8d4c>] (kernel_init_freeable) from [<c0944a2c>] (kernel_init+0x8/0xe4) [<c0944a2c>] (kernel_init) from [<c0210e60>] (ret_from_fork+0x14/0x34) ---[ end trace 335bd937d409f3c7 ]--- Outdated DT detected, suspend/resume will NOT work Unable to handle kernel NULL pointer dereference at virtual address 00000608 pgd = c0204000 [00000608] *pgd=00000000 Internal error: Oops: 5 [#1] SMP ARM Modules linked in: CPU: 1 PID: 1 Comm: swapper/0 Tainted: G W 4.1.0-rc3 #1 Hardware name: SAMSUNG EXYNOS (Flattened Device Tree) task: db06c000 ti: db05a000 task.ti: db05a000 PC is at exynos_pm_init+0x6c/0xc8 LR is at exynos_pm_init+0x54/0xc8 pc : [<c0cf1d48>] lr : [<c0cf1d30>] psr: 60000113 sp : db05bee8 ip : 00000000 fp : 00000000 r10: 00000116 r9 : c0dab2d4 r8 : d8d5f440 r7 : c0db7ad8 r6 : c0db7ad8 r5 : 00000000 r4 : c0ceaacc r3 : c0eb2aec r2 : c0951e40 r1 : 00000000 r0 : c0eb2acc Flags: nZCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment kernel Control: 10c5387d Table: 6020406a DAC: 00000015 Process swapper/0 (pid: 1, stack limit = 0xdb05a220) Stack: (0xdb05bee8 to 0xdb05c000) bee0: c0db7ad8 c0d8fe34 c0cf17c8 c0ceaae8 00000000 c020aa64 bf00: 00000033 c09580b8 db04fd00 c0ed79a4 c0eb1000 c0ce8588 c0ca2bc4 c0353fcc bf20: 00000000 c0df358c 60000113 00000000 dbfffba4 00000000 c0ca2bc4 c026654c bf40: c0b80134 c0ca1a64 00000007 00000007 c0df3554 c0d6c2f4 00000007 c0d6c2d4 bf60: c0eb1000 c0ce8588 c0dab2d4 00000116 00000000 c0ce8d4c 00000007 00000007 bf80: c0ce8588 c0944a24 00000000 c0944a24 00000000 00000000 00000000 00000000 bfa0: 00000000 c0944a2c 00000000 c0210e60 00000000 00000000 00000000 00000000 bfc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 bfe0: 00000000 00000000 00000000 00000000 00000013 00000000 00000000 00000000 [<c0cf1d48>] (exynos_pm_init) from [<c0ceaae8>] (init_machine_late+0x1c/0x28) [<c0ceaae8>] (init_machine_late) from [<c020aa64>] (do_one_initcall+0x80/0x1d0) [<c020aa64>] (do_one_initcall) from [<c0ce8d4c>] (kernel_init_freeable+0x10c/0x1d8) [<c0ce8d4c>] (kernel_init_freeable) from [<c0944a2c>] (kernel_init+0x8/0xe4) [<c0944a2c>] (kernel_init) from [<c0210e60>] (ret_from_fork+0x14/0x34) Code: e59f005c e59220c0 e5901000 e5832000 (e591e608) ---[ end trace 335bd937d409f3c8 ]--- This is happening because pmu_base_addr is only initialized when the PMU is an interrupt controller. It's not the case on old DT. Signed-off-by: NJulien Grall <julien.grall@citrix.com> Signed-off-by: NKukjin Kim <kgene@kernel.org>
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由 Javier Martinez Canillas 提交于
The Marvell mwifiex driver prevents the system to enter into a suspend state if the card power is not preserved during a suspend/resume cycle. So Suspend-to-RAM and Suspend-to-idle is failing on Exynos5800 Peach Pi and Exynos5420 Peach Pit Chromebooks. Add the keep-power-in-suspend Power Management property to the SDIO/MMC node so the mwifiex suspend handler doesn't fail and the system is able to enter into a suspend state. Signed-off-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk> Reviewed-by: NDoug Anderson <dianders@chromium.org> Signed-off-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: NKukjin Kim <kgene@kernel.org>
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由 Paul Burton 提交于
Commit 46490b57 ("MIPS: kernel: elf: Improve the overall ABI and FPU mode checks") reworked the ELF FP ABI mode selection logic, but when CONFIG_MIPS_O32_FP64_SUPPORT is enabled it breaks the use of binaries which have no PT_MIPS_ABIFLAGS program header & associated .MIPS.abiflags section. A default mode is selected based upon whether the ELF contains MIPS32 or MIPS64 code, but that selection is made in arch_elf_pt_proc. arch_elf_pt_proc only executes when a PT_MIPS_ABIFLAGS program header is found. If one is not found then arch_elf_pt_proc is never called, and no default overall_fp_mode value is selected. When arch_check_elf is called, both abi0 & abi1 are MIPS_ABI_FP_UNKNOWN which leads to both prog_req & interp_req being set to none_req. none_req matches none of the conditions for mode selection at the end of arch_check_elf, so overall_fp_mode is left untouched. Finally once mips_set_personality_fp is called the BUG() in the default case is then hit & the kernel likely panics. Fix this by moving the selection of a default overall mode to the start of arch_check_elf, which runs once per ELF executed regardless of whether it has a PT_MIPS_ABIFLAGS program header. Signed-off-by: NPaul Burton <paul.burton@imgtec.com> Cc: Markos Chandras <markos.chandras@imgtec.com> Cc: Matthew Fortune <matthew.fortune@imgtec.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: linux-mips@linux-mips.org Cc: stable@vger.kernel.org # v4.0+ Patchwork: http://patchwork.linux-mips.org/patch/9978/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 12 5月, 2015 8 次提交
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由 Will Deacon 提交于
Commit d795ef9a ("arm64: perf: don't warn about missing interrupt-affinity property for PPIs") added a check for PPIs so that we avoid parsing the interrupt-affinity property for these naturally affine interrupts. Unfortunately, this check can trigger an early (successful) return and we will leak the irqs array. This patch fixes the issue by reordering the code so that the check is performed before any independent allocation. Reported-by: NDavid Binderman <dcb314@hotmail.com> Signed-off-by: NWill Deacon <will.deacon@arm.com>
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由 Hans Ulli Kroll 提交于
This patch fixes a compiler warning in gemini_restart() issued by commit 7b6d864b ("reboot:arm: reboot_mode changes from char to enum reboot_mode"). arch/arm/mach-gemini/board-rut1xx.c:93:2: warning: initialization from incompatible pointer type The warning is harmless, and the patch does not need to be backported to stable kernels. Fixes: 7b6d864b ("reboot:arm: reboot_mode changes from char to enum reboot_mode.") Signed-off-by: NHans Ulli Kroll <ulli.kroll@googlemail.com> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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由 Sudeep Holla 提交于
Commit 9fd85eb5 ("ARM: pmu: add support for interrupt-affinity property") added an optional "interrupt-affinity" property, to specify the CPU affinity for each SPI listed in the interrupts property. Without this property, we get this boot warning: CPU PMU: Failed to parse <no-node>/interrupt-affinity[0] This patch adds interrupt-affinity to the PMU node in the vexpress-ca15_a7(a.k.a TC2) device tree. Signed-off-by: NSudeep Holla <sudeep.holla@arm.com> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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由 Robert Schwebel 提交于
Commit 9fd85eb5 ("ARM: pmu: add support for interrupt-affinity property") added an optional "interrupt-affinity" property, to specify the CPU affinity for each SPI listed in the interrupts property. Without this property, we get this boot warning: CPU PMU: Failed to parse <no-node>/interrupt-affinity[0] This patch adds interrupt-affinity to the PMU node in the vexpress-v2p-ca9 device tree. Signed-off-by: NRobert Schwebel <r.schwebel@pengutronix.de> Acked-by: NSudeep Holla <sudeep.holla@arm.com> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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由 Robert Schwebel 提交于
Commit d9d1f3e2 ("ARM: l2c: check that DT files specify the required "cache-unified" property") mandates to specify this required property. Without this property, we get this boot warning: "L2C: device tree omits to specify unified cache" This patch adds "cache-unified" property to L2 cache node in vexpress CA9 device tree. Signed-off-by: NRobert Schwebel <r.schwebel@pengutronix.de> Acked-by: NSudeep Holla <sudeep.holla@arm.com> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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由 Sudeep Holla 提交于
The clock generator in IOFPGA generates the two source clocks: 32kHz and 1MHz for the SP810 System Controller. The SP810 System Controller selects 32kHz or 1MHz as the sources for TIM_CLK[3:0], the SP804 timer clocks. The powerup default is 32kHz but the maximum of "refclk" and "timclk" is chosen by the SP810 driver. This patch adds support for SP810 system controller and also fixes the SP804 timer clock frequency. However the SP804 driver needs to be enabled on ARM64 to test this, which requires SP804 driver to be moved out of arch/arm. Fixes: 71f867ec ("arm64: Add Juno board device tree.") Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Will Deacon <will.deacon@arm.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Olof Johansson <olof@lixom.net> Acked-by: NLiviu Dudau <Liviu.Dudau@arm.com> Signed-off-by: NSudeep Holla <sudeep.holla@arm.com> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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由 Ralf Baechle 提交于
CC arch/mips/kernel/smp.o arch/mips/kernel/smp.c: In function ‘start_secondary’: arch/mips/kernel/smp.c:149:2: error: passing argument 2 of ‘cpumask_set_cpu’ discards ‘volatile’ qualifier from pointer target type [-Werror] cpumask_set_cpu(cpu, &cpu_callin_map); ^ In file included from ./arch/mips/include/asm/processor.h:14:0, from ./arch/mips/include/asm/thread_info.h:15, from include/linux/thread_info.h:54, from include/asm-generic/preempt.h:4, from arch/mips/include/generated/asm/preempt.h:1, from include/linux/preempt.h:18, from include/linux/interrupt.h:8, from arch/mips/kernel/smp.c:24: include/linux/cpumask.h:272:91: note: expected ‘struct cpumask *’ but argument is of type ‘volatile struct cpumask_t *’ static inline void cpumask_set_cpu(unsigned int cpu, struct cpumask *dstp) ^ arch/mips/kernel/smp.c: In function ‘smp_prepare_boot_cpu’: arch/mips/kernel/smp.c:211:2: error: passing argument 2 of ‘cpumask_set_cpu’ discards ‘volatile’ qualifier from pointer target type [-Werror] cpumask_set_cpu(0, &cpu_callin_map); ^ In file included from ./arch/mips/include/asm/processor.h:14:0, from ./arch/mips/include/asm/thread_info.h:15, from include/linux/thread_info.h:54, from include/asm-generic/preempt.h:4, from arch/mips/include/generated/asm/preempt.h:1, from include/linux/preempt.h:18, from include/linux/interrupt.h:8, from arch/mips/kernel/smp.c:24: include/linux/cpumask.h:272:91: note: expected ‘struct cpumask *’ but argument is of type ‘volatile struct cpumask_t *’ static inline void cpumask_set_cpu(unsigned int cpu, struct cpumask *dstp) ^ arch/mips/kernel/smp.c: In function ‘__cpu_up’: arch/mips/kernel/smp.c:221:10: error: passing argument 2 of ‘cpumask_test_cpu’ discards ‘volatile’ qualifier from pointer target type [-Werror] while (!cpumask_test_cpu(cpu, &cpu_callin_map)) ^ In file included from ./arch/mips/include/asm/processor.h:14:0, from ./arch/mips/include/asm/thread_info.h:15, from include/linux/thread_info.h:54, from include/asm-generic/preempt.h:4, from arch/mips/include/generated/asm/preempt.h:1, from include/linux/preempt.h:18, from include/linux/interrupt.h:8, from arch/mips/kernel/smp.c:24: include/linux/cpumask.h:294:90: note: expected ‘const struct cpumask *’ but argument is of type ‘volatile struct cpumask_t *’ static inline int cpumask_test_cpu(int cpu, const struct cpumask *cpumask) ^ cc1: all warnings being treated as errors make[2]: *** [arch/mips/kernel/smp.o] Error 1 make[1]: *** [arch/mips/kernel] Error 2 make: *** [arch/mips] Error 2 Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Tony Lindgren 提交于
With recent changes to use determine_rate, the comparison of two clocks won't work without clk_is_match that does __clk_get_hw on the clocks first. As we've been unconditionally already calling clk_set_parent already because of the bogus comparison, let's just remove the check as suggested by Stephen Boyd <sboyd@codeaurora.org>. Cc: Michael Turquette <mturquette@linaro.org> Cc: Paul Walmsley <paul@pwsan.com> Cc: Tero Kristo <t-kristo@ti.com> Cc: Tomeu Vizoso <tomeu.vizoso@collabora.com> Acked-by: NStephen Boyd <sboyd@codeaurora.org> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 11 5月, 2015 5 次提交
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由 Sebastian Hesselbarth 提交于
Si5351 clock generator on CuBox uses XTAL as clock reference, name the clock phandle accordingly. Signed-off-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
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由 Stephane Eranian 提交于
This patch enables RAPL counters (energy consumption counters) support for Intel Broadwell-U processors (Model 61): To use: $ perf stat -a -I 1000 -e power/energy-cores/,power/energy-pkg/,power/energy-ram/ sleep 10 Signed-off-by: NStephane Eranian <eranian@google.com> Cc: <stable@vger.kernel.org> Cc: Andy Lutomirski <luto@amacapital.net> Cc: Borislav Petkov <bp@alien8.de> Cc: Brian Gerst <brgerst@gmail.com> Cc: Denys Vlasenko <dvlasenk@redhat.com> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: jacob.jun.pan@linux.intel.com Cc: kan.liang@intel.com Cc: peterz@infradead.org Cc: sonnyrao@chromium.org Link: http://lkml.kernel.org/r/20150423070709.GA4970@thinkpadSigned-off-by: NIngo Molnar <mingo@kernel.org>
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由 Oleg Nesterov 提交于
Change HOST_EXTRACFLAGS to include arch/x86/include/uapi along with include/uapi. This looks more consistent, and this fixes "make bzImage" on my old distro which doesn't have asm/bitsperlong.h in /usr/include/. Signed-off-by: NOleg Nesterov <oleg@redhat.com> Signed-off-by: NBorislav Petkov <bp@suse.de> Acked-by: NAndy Lutomirski <luto@kernel.org> Cc: <stable@vger.kernel.org> Cc: Andy Lutomirski <luto@amacapital.net> Cc: Borislav Petkov <bp@alien8.de> Cc: Brian Gerst <brgerst@gmail.com> Cc: Denys Vlasenko <dvlasenk@redhat.com> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Rusty Russell <rusty@rustcorp.com.au> Cc: Thomas Gleixner <tglx@linutronix.de> Fixes: 6f121e54 ("x86, vdso: Reimplement vdso.so preparation in build-time C") Link: http://lkml.kernel.org/r/1431332153-18566-6-git-send-email-bp@alien8.de Link: http://lkml.kernel.org/r/20150507165835.GB18652@redhat.comSigned-off-by: NIngo Molnar <mingo@kernel.org>
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由 Nicolas Schichan 提交于
ARM: net: delegate filter to kernel interpreter when imm_offset() return value can't fit into 12bits. The ARM JIT code emits "ldr rX, [pc, #offset]" to access the literal pool. #offset maximum value is 4095 and if the generated code is too large, the #offset value can overflow and not point to the expected slot in the literal pool. Additionally, when overflow occurs, bits of the overflow can end up changing the destination register of the ldr instruction. Fix that by detecting the overflow in imm_offset() and setting a flag that is checked for each BPF instructions converted in build_body(). As of now it can only be detected in the second pass. As a result the second build_body() call can now fail, so add the corresponding cleanup code in that case. Using multiple literal pools in the JITed code is going to require lots of intrusive changes to the JIT code (which would better be done as a feature instead of fix), just delegating to the kernel BPF interpreter in that case is a more straight forward, minimal fix and easy to backport. Fixes: ddecdfce ("ARM: 7259/3: net: JIT compiler for packet filters") Signed-off-by: NNicolas Schichan <nschichan@freebox.fr> Acked-by: NDaniel Borkmann <daniel@iogearbox.net> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Nicolas Schichan 提交于
In that case, emit_udiv() will be called with rn == ARM_R0 (r_scratch) and loading rm first into ARM_R0 will result in jit_udiv() function being called the same dividend and divisor. Fix that by loading rn first into ARM_R1 and then rm into ARM_R0. Signed-off-by: NNicolas Schichan <nschichan@freebox.fr> Cc: <stable@vger.kernel.org> # v3.13+ Fixes: aee636c4 (bpf: do not use reciprocal divide) Acked-by: NMircea Gherzan <mgherzan@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 10 5月, 2015 1 次提交
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由 Rusty Russell 提交于
We cast away the volatile, but really, why make it volatile at all? We already do a mb() inside the cpumask_empty() loop. Signed-off-by: NRusty Russell <rusty@rustcorp.com.au> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 09 5月, 2015 7 次提交
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由 Tero Kristo 提交于
The reset code functionality is mostly a copy paste between OMAP4+ and AM33xx+. Re-use the omap4 code where possible, and just keep the special implementation for de-asserting the hardreset lines for AM33xx, as AM33xx+ devices have slightly different register layouts compared to OMAP4+. This patch also fixes the hardreset issues faced on AM43xx. Signed-off-by: NTero Kristo <t-kristo@ti.com> Reported-by: NDave Gerlach <d-gerlach@ti.com> Reported-by: NSuman Anna <s-anna@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Tero Kristo 提交于
AM43xx has slightly different reset register layout compared to OMAP4+, with varying status bit shifts and status register offsets. Current code assumes static offsets and identical status / reset control bit shifts, which is wrong. This patch adds PRM core support for passing the actual implementations from hwmod code. AM43xx mappings will be fixed in subsequent patch. Signed-off-by: NTero Kristo <t-kristo@ti.com> Reported-by: NDave Gerlach <d-gerlach@ti.com> Reported-by: NSuman Anna <s-anna@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Benoit Parrot 提交于
This patch adds VPFE HWMOD data for AM43xx. Signed-off-by: NBenoit Parrot <bparrot@ti.com> Signed-off-by: NDarren Etheridge <detheridge@ti.com> Signed-off-by: NFelipe Balbi <balbi@ti.com> Signed-off-by: NLad, Prabhakar <prabhakar.csengg@gmail.com> Tested-by: NBenoit Parrot <bparrot@ti.com> [paul@pwsan.com: updated to apply on v4.1-rc1] Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Javier Martinez Canillas 提交于
The Marvell mwifiex driver prevents the system to enter into a suspend state if the card power is not preserved during a suspend/resume cycle. So Suspend-to-RAM and Suspend-to-idle are failing on Exynos5250 Snow. Add the keep-power-in-suspend Power Management property to the SDIO/MMC node so the mwifiex suspend handler doesn't fail and the system is able to enter into a suspend state. Signed-off-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk> Reviewed-by: NDoug Anderson <dianders@chromium.org> Signed-off-by: NKukjin Kim <kgene@kernel.org>
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由 Abhilash Kesavan 提交于
Remove the extra zero in the "cpu-crit-0" trip point for exynos5420 and exynos5440. Signed-off-by: NAbhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: NKukjin Kim <kgene@kernel.org>
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由 Markus Reichl 提交于
The Exynos4412 SoC has a s3c6410 RTC where the source clock is now a mandatory property. This patch fixes probe failure of s3c-rtc on Odroid-X2/U2/U3 boards. Signed-off-by: NMarkus Reichl <m.reichl@fivetechno.de> Tested-by: NTobias Jakobi <tjakobi@math.uni-bielefeld.de> Reviewed-by: NChanwoo Choi <cw00.choi@samsung.com> Reviewed-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk> Tested-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: NKukjin Kim <kgene@kernel.org>
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由 Javier Martinez Canillas 提交于
Commit ea08de16 ("ARM: dts: Add DISP1 power domain for exynos5420") added a device node for the Exynos5420 DISP1 power domain but dit not make the DP controller a consumer of that power domain. This causes an "Unhandled fault: imprecise external abort" error if the exynos-dp driver tries to access the DP controller registers and the PD was turned off. This lead to a kernel panic and a complete system hang. Make the DP controller device node a consumer of the DISP1 power domain to ensure that the PD is turned on when the exynos-dp driver is probed. Fixes: ea08de16 ("ARM: dts: Add DISP1 power domain for exynos5420") Signed-off-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk> Signed-off-by: NKukjin Kim <kgene@kernel.org>
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- 08 5月, 2015 3 次提交
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由 Xi Wang 提交于
Consider "(u64)insn1.imm << 32 | imm" in the arm64 JIT. Since imm is signed 32-bit, it is sign-extended to 64-bit, losing the high 32 bits. The fix is to convert imm to u32 first, which will be zero-extended to u64 implicitly. Cc: Zi Shen Lim <zlim.lnx@gmail.com> Cc: Alexei Starovoitov <ast@plumgrid.com> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: <stable@vger.kernel.org> Fixes: 30d3d94c ("arm64: bpf: add 'load 64-bit immediate' instruction") Signed-off-by: NXi Wang <xi.wang@gmail.com> [will: removed non-arm64 bits and redundant casting] Signed-off-by: NWill Deacon <will.deacon@arm.com>
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由 Kan Liang 提交于
iTLB-load-misses and LLC-load-misses count incorrectly on SLM. There is no ITLB.MISSES support on SLM. Event PAGE_WALKS.I_SIDE_WALK should be used to count iTLB-load-misses. This event counts when an instruction (I) page walk is completed or started. Since a page walk implies a TLB miss, the number of TLB misses can be counted by counting the number of pagewalks. DMND_DATA_RD counts both demand and DCU prefetch data reads. However, LLC-load-misses should only count demand reads. There is no way to not include prefetches with a single counter on SLM. So the LLC-load-misses support should be removed on SLM. Signed-off-by: NKan Liang <kan.liang@intel.com> Signed-off-by: NPeter Zijlstra (Intel) <peterz@infradead.org> Cc: Borislav Petkov <bp@alien8.de> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Thomas Gleixner <tglx@linutronix.de> Link: http://lkml.kernel.org/r/1429608881-5055-1-git-send-email-kan.liang@intel.comSigned-off-by: NIngo Molnar <mingo@kernel.org>
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由 Fabio Estevam 提交于
Select IMX50, IMX6SX and LS1021A SoC support. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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- 07 5月, 2015 3 次提交
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由 Ard Biesheuvel 提交于
Ensure that the asm code finalization path is not triggered when invoked via final(), since it already takes care of that itself. Signed-off-by: NArd Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Ard Biesheuvel 提交于
Ensure that the asm code finalization path is not triggered when invoked via final(), since it already takes care of that itself. Signed-off-by: NArd Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Ard Biesheuvel 提交于
The arm64 CRC32 (not CRC32c) implementation was not quite doing the same thing as the generic one. Fix that. Signed-off-by: NArd Biesheuvel <ard.biesheuvel@linaro.org> Acked-by: NSteve Capper <steve.capper@linaro.org> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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- 06 5月, 2015 4 次提交
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由 Stefano Stabellini 提交于
Make sure that xen_swiotlb_init allocates buffers that are DMA capable when at least one memblock is available below 4G. Otherwise we assume that all devices on the SoC can cope with >4G addresses. We do this on ARM and ARM64, where dom0 is mapped 1:1, so pfn == mfn in this case. No functional changes on x86. From: Chen Baozi <baozich@gmail.com> Signed-off-by: NChen Baozi <baozich@gmail.com> Signed-off-by: NStefano Stabellini <stefano.stabellini@eu.citrix.com> Tested-by: NChen Baozi <baozich@gmail.com> Acked-by: NKonrad Rzeszutek Wilk <konrad.wilk@oracle.com> Signed-off-by: NDavid Vrabel <david.vrabel@citrix.com>
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由 Bobby Powers 提交于
The following commit: f893959b ("x86/fpu: Don't abuse drop_init_fpu() in flush_thread()") removed drop_init_fpu() usage from flush_thread(). This seems to break things for me - the Go 1.4 test suite fails all over the place with floating point comparision errors (offending commit found through bisection). The functional change was that flush_thread() after this commit only calls restore_init_xstate() when both use_eager_fpu() and !used_math() are true. drop_init_fpu() (now fpu_reset_state()) calls restore_init_xstate() regardless of whether current used_math() - apply the same logic here. Switch used_math() -> tsk_used_math(tsk) to consistently use the grabbed tsk instead of current, like in the rest of flush_thread(). Tested-by: NDave Hansen <dave.hansen@intel.com> Signed-off-by: NBobby Powers <bobbypowers@gmail.com> Signed-off-by: NBorislav Petkov <bp@suse.de> Acked-by: NOleg Nesterov <oleg@redhat.com> Cc: Andy Lutomirski <luto@amacapital.net> Cc: Borislav Petkov <bp@alien8.de> Cc: Fenghua Yu <fenghua.yu@intel.com> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Pekka Riikonen <priikone@iki.fi> Cc: Quentin Casasnovas <quentin.casasnovas@oracle.com> Cc: Rik van Riel <riel@redhat.com> Cc: Suresh Siddha <sbsiddha@gmail.com> Cc: Thomas Gleixner <tglx@linutronix.de> Fixes: f893959b ("x86/fpu: Don't abuse drop_init_fpu() in flush_thread()") Link: http://lkml.kernel.org/r/1430147441-9820-1-git-send-email-bobbypowers@gmail.comSigned-off-by: NIngo Molnar <mingo@kernel.org>
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由 Marc Dionne 提交于
Commit 75182b16 ("x86/asm/entry: Switch all C consumers of kernel_stack to this_cpu_sp0()") changed current_thread_info to use this_cpu_sp0, and indirectly made it rely on init_tss which was exported with EXPORT_PER_CPU_SYMBOL_GPL. As a result some macros and inline functions such as set/get_fs, test_thread_flag and variants have been made unusable for external modules. Make cpu_tss exported with EXPORT_PER_CPU_SYMBOL so that these functions are accessible again, as they were previously. Signed-off-by: NMarc Dionne <marc.dionne@your-file-system.com> Acked-by: NAndy Lutomirski <luto@amacapital.net> Link: http://lkml.kernel.org/r/1430763404-21221-1-git-send-email-marc.dionne@your-file-system.comSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
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由 Boris Ostrovsky 提交于
Commit 61f01dd9 ("x86_64, asm: Work around AMD SYSRET SS descriptor attribute issue") makes AMD processors set SS to __KERNEL_DS in __switch_to() to deal with cases when SS is NULL. This breaks Xen PV guests who do not want to load SS with__KERNEL_DS. Since the problem that the commit is trying to address would have to be fixed in the hypervisor (if it in fact exists under Xen) there is no reason to set X86_BUG_SYSRET_SS_ATTRS flag for PV VPCUs here. This can be easily achieved by adding x86_hyper_xen_hvm.set_cpu_features op which will clear this flag. (And since this structure is no longer HVM-specific we should do some renaming). Signed-off-by: NBoris Ostrovsky <boris.ostrovsky@oracle.com> Reported-by: NSander Eikelenboom <linux@eikelenboom.it> Signed-off-by: NDavid Vrabel <david.vrabel@citrix.com>
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