- 06 9月, 2022 1 次提交
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由 Horatiu Vultur 提交于
Extend lan966x with RGMII support. The MAC supports all RGMII_* modes. Signed-off-by: NHoratiu Vultur <horatiu.vultur@microchip.com> Link: https://lore.kernel.org/r/20220902111548.614525-1-horatiu.vultur@microchip.comSigned-off-by: NPaolo Abeni <pabeni@redhat.com>
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- 02 9月, 2022 1 次提交
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由 Michael Walle 提交于
There is no dedicated reset for just the switch core. The reset which is used up until now, is more of a global reset, resetting almost the whole SoC and cause spurious errors by doing so. Make it possible to handle the reset elsewhere and make the reset optional. Signed-off-by: NMichael Walle <michael@walle.cc> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 01 9月, 2022 1 次提交
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由 Wolfram Sang 提交于
Follow the advice of the below link and prefer 'strscpy' in this subsystem. Conversion is 1:1 because the return value is not used. Generated by a coccinelle script. Link: https://lore.kernel.org/r/CAHk-=wgfRnXz0W3D37d01q3JFkr_i_uTL=V6A6G1oUZcprmknw@mail.gmail.com/Signed-off-by: NWolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Petr Machata <petrm@nvidia.com> # For drivers/net/ethernet/mellanox/mlxsw Acked-by: Geoff Levand <geoff@infradead.org> # For ps3_gelic_net and spider_net_ethtool Acked-by: Tom Lendacky <thomas.lendacky@amd.com> # For drivers/net/ethernet/amd/xgbe/xgbe-ethtool.c Acked-by: Marcin Wojtas <mw@semihalf.com> # For drivers/net/ethernet/marvell/mvpp2 Reviewed-by: Leon Romanovsky <leonro@nvidia.com> # For drivers/net/ethernet/mellanox/mlx{4|5} Reviewed-by: Shay Agroskin <shayagr@amazon.com> # For drivers/net/ethernet/amazon/ena Acked-by: Krzysztof Hałasa <khalasa@piap.pl> # For IXP4xx Ethernet Link: https://lore.kernel.org/r/20220830201457.7984-3-wsa+renesas@sang-engineering.comSigned-off-by: NJakub Kicinski <kuba@kernel.org>
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- 31 8月, 2022 1 次提交
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由 Dan Carpenter 提交于
Don't just print a warning. Clean up and return an error as well. Fixes: c8349639 ("net: lan966x: Add FDMA functionality") Signed-off-by: NDan Carpenter <dan.carpenter@oracle.com> Reviewed-by: NHoratiu Vultur <horatiu.vultur@microchip.com> Link: https://lore.kernel.org/r/YwjgDm/SVd5c1tQU@kiliSigned-off-by: NJakub Kicinski <kuba@kernel.org>
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- 29 8月, 2022 2 次提交
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由 Casper Andersson 提交于
All multicast should be forwarded to mrouter ports. Mrouter ports must therefore be part of all active multicast groups, and override flooding from being disabled. Signed-off-by: NCasper Andersson <casper.casan@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Casper Andersson 提交于
Keep track of all mdb entries in software for easy access. Signed-off-by: NCasper Andersson <casper.casan@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 27 8月, 2022 1 次提交
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由 Casper Andersson 提交于
Packets that are not of length divisible by 4 (e.g. 77, 78, 79) would have the checksum included up to next multiple of 4 (a 77 bytes packet would have 3 bytes of ethernet checksum included). The check for the value expects it in host (Little) endian. Fixes: f3cad261 ("net: sparx5: add hostmode with phylink support") Signed-off-by: NCasper Andersson <casper.casan@gmail.com> Reviewed-by: NSteen Hegelund <Steen.Hegelund@microchip.com> Link: https://lore.kernel.org/r/20220825084955.684637-1-casper.casan@gmail.comSigned-off-by: NJakub Kicinski <kuba@kernel.org>
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- 22 8月, 2022 9 次提交
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由 Horatiu Vultur 提交于
Extend MAC support to support also lag interfaces: 1. In case an entry is learned on a port that is part of lag interface, then notify the upper layers that the entry is learned on the bond interface 2. If a port leaves the bond and the port is the first port in the lag group, then it is required to update all MAC entries to change the destination port. Signed-off-by: NHoratiu Vultur <horatiu.vultur@microchip.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Horatiu Vultur 提交于
Offload FDB entries when the original device is a lag interface. Because all the ports under the lag have the same chip id, which is the chip id of first port, then add the entries only for the first port. Signed-off-by: NHoratiu Vultur <horatiu.vultur@microchip.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Horatiu Vultur 提交于
Add link aggregation hardware offload support for lan966x Signed-off-by: NHoratiu Vultur <horatiu.vultur@microchip.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Horatiu Vultur 提交于
Extend lan966x_foreign_bridging_check to check also if the upper interface is a lag device. Don't allow a lan966x port to be part of a lag if it has foreign interfaces. Signed-off-by: NHoratiu Vultur <horatiu.vultur@microchip.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Horatiu Vultur 提交于
Expose lan966x_switchdev_nb and lan966x_switchdev_blocking_nb to the lan966x_main.h file because they will be needed by the lag driver. Signed-off-by: NHoratiu Vultur <horatiu.vultur@microchip.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Horatiu Vultur 提交于
Whenever a port leaves a bridge, flush the workqueue of the FDB work. Signed-off-by: NHoratiu Vultur <horatiu.vultur@microchip.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Horatiu Vultur 提交于
Split the function lan966x_fdb_event_work. One case for when the orig_dev is a bridge and one case when orig_dev is lan966x port. This is preparation for lag support. There is no functional change. Signed-off-by: NHoratiu Vultur <horatiu.vultur@microchip.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Horatiu Vultur 提交于
Add the registers used by lan966x to configure the lag interface. Signed-off-by: NHoratiu Vultur <horatiu.vultur@microchip.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Maxime Chevallier 提交于
The Lan996x controller supports the QUSGMII mode, which is very similar to QSGMII in the way it's configured and the autonegociation capababilities it provides. This commit adds support for that mode, treating it most of the time like QSGMII, making sure that we do configure the PCS how we should. Signed-off-by: NMaxime Chevallier <maxime.chevallier@bootlin.com> Reviewed-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 12 8月, 2022 1 次提交
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由 Li Qiong 提交于
The platform_get_irq_byname() returns non-zero IRQ number or negative error number. "if (irq)" always true, chang it to "if (irq > 0)" Signed-off-by: NLi Qiong <liqiong@nfschina.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 19 7月, 2022 5 次提交
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由 Horatiu Vultur 提交于
When the SW bridge was trying to add/remove entries to/from HW, the access to HW was not protected by any lock. In this way, it was possible to have race conditions. Fix this by using the lan966x->mac_lock to protect parallel access to HW for this cases. Fixes: 25ee9561 ("net: lan966x: More MAC table functionality") Signed-off-by: NHoratiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: NVladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: NJakub Kicinski <kuba@kernel.org>
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由 Horatiu Vultur 提交于
The problem with this spin lock is that it was just protecting the list of the MAC entries in SW and not also the access to the MAC entries in HW. Because the access to HW is indirect, then it could happen to have race conditions. For example when SW introduced an entry in MAC table and the irq mac is trying to read something from the MAC. Update such that also the access to MAC entries in HW is protected by this lock. Fixes: 5ccd66e0 ("net: lan966x: add support for interrupts from analyzer") Signed-off-by: NHoratiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: NVladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: NJakub Kicinski <kuba@kernel.org>
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由 Horatiu Vultur 提交于
To remove an entry to the MAC table, it is required first to setup the entry and then issue a command for the MAC to forget the entry. So if it happens for two threads to remove simultaneously an entry in MAC table then it would be a race condition. Fix this by using lan966x->mac_lock to protect the HW access. Fixes: e18aba89 ("net: lan966x: add mactable support") Signed-off-by: NHoratiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: NVladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: NJakub Kicinski <kuba@kernel.org>
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由 Horatiu Vultur 提交于
To add an entry to the MAC table, it is required first to setup the entry and then issue a command for the MAC to learn the entry. So if it happens for two threads to add simultaneously an entry in MAC table then it would be a race condition. Fix this by using lan966x->mac_lock to protect the HW access. Fixes: fc0c3fe7 ("net: lan966x: Add function lan966x_mac_ip_learn()") Signed-off-by: NHoratiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: NVladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: NJakub Kicinski <kuba@kernel.org>
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由 Horatiu Vultur 提交于
When the HW deletes an entry in MAC table then it generates an interrupt. The SW will go through it's own list of MAC entries and if it is not found then it would notify the listeners about this. The problem is that when the SW will go through it's own list it would take a spin lock(lan966x->mac_lock) and when it notifies that the entry is deleted. But to notify the listeners it taking the rtnl_lock which is illegal. This is fixed by instead of notifying right away that the entry is deleted, move the entry on a temp list and once, it checks all the entries then just notify that the entries from temp list are deleted. Fixes: 5ccd66e0 ("net: lan966x: add support for interrupts from analyzer") Signed-off-by: NHoratiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: NVladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: NJakub Kicinski <kuba@kernel.org>
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- 06 7月, 2022 1 次提交
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由 Michael Walle 提交于
Instead of counting the child nodes in the device tree, hardcode the number of ports in the driver itself. The counting won't work at all if an ethernet port is marked as disabled, e.g. because it is not connected on the board at all. It turns out that the LAN9662 and LAN9668 use the same switching IP with the same synthesis parameters. The only difference is that the output ports are not connected. Thus, we can just hardcode the number of physical ports to 8. Fixes: db8bcaad ("net: lan966x: add the basic lan966x driver") Signed-off-by: NMichael Walle <michael@walle.cc> Reviewed-by: NHoratiu Vultur <horatiu.vultur@microchip.com> Link: https://lore.kernel.org/r/20220704153654.1167886-1-michael@walle.ccSigned-off-by: NJakub Kicinski <kuba@kernel.org>
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- 01 7月, 2022 1 次提交
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由 Casper Andersson 提交于
When adding/deleting mdb entries on other net_devices, eg., tap interfaces, it should not crash. Fixes: 3bacfccd ("net: sparx5: Add mdb handlers") Signed-off-by: NCasper Andersson <casper.casan@gmail.com> Reviewed-by: NSteen Hegelund <Steen.Hegelund@microchip.com> Link: https://lore.kernel.org/r/20220630122226.316812-1-casper.casan@gmail.comSigned-off-by: NJakub Kicinski <kuba@kernel.org>
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- 25 6月, 2022 1 次提交
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由 Dan Carpenter 提交于
There is a copy and paste bug in lan743x_sgmii_config() so it checks if (ret < 0) instead of if (mii_ctl < 0). Fixes: 46b777ad ("net: lan743x: Add support to SGMII 1G and 2.5G") Signed-off-by: NDan Carpenter <dan.carpenter@oracle.com> Reviewed-by: NAndrew Lunn <andrew@lunn.ch> Link: https://lore.kernel.org/r/YrRry7K66BzKezl8@kiliSigned-off-by: NJakub Kicinski <kuba@kernel.org>
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- 17 6月, 2022 3 次提交
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由 Raju Lakkaraju 提交于
Add SGMII access read and write functions Add support to SGMII 1G and 2.5G for PCI11010/PCI11414 chips Signed-off-by: NRaju Lakkaraju <Raju.Lakkaraju@microchip.com> Reviewed-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NJakub Kicinski <kuba@kernel.org>
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由 Raju Lakkaraju 提交于
Add support to Magic Packet Detection with Secure-ON for PCI11010/PCI11414 chips Signed-off-by: NRaju Lakkaraju <Raju.Lakkaraju@microchip.com> Reviewed-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NJakub Kicinski <kuba@kernel.org>
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由 Raju Lakkaraju 提交于
Add support to LAN743x common register dump Signed-off-by: NRaju Lakkaraju <Raju.Lakkaraju@microchip.com> Reviewed-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NJakub Kicinski <kuba@kernel.org>
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- 15 6月, 2022 1 次提交
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由 Casper Andersson 提交于
Allow mdb entries to be forwarded to CPU and be switched at the same time. Only remove entry when no port and the CPU isn't part of the group anymore. Signed-off-by: NCasper Andersson <casper.casan@gmail.com> Acked-by: NSteen Hegelund <Steen.Hegelund@microchip.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 27 5月, 2022 2 次提交
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由 Raju Lakkaraju 提交于
Fix the MDIO interface declarations to reflect what is currently supported by the PCI11010 / PCI11414 devices (C22 for RGMII and C22_C45 for SGMII) Signed-off-by: NRaju Lakkaraju <Raju.Lakkaraju@microchip.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Michael Walle 提交于
At the moment, if devm_of_phy_get() returns an error the serdes simply isn't set. While it is bad to ignore an error in general, there is a particular bug that network isn't working if the serdes driver is compiled as a module. In that case, devm_of_phy_get() returns -EDEFER_PROBE and the error is silently ignored. The serdes is optional, it is not there if the port is using RGMII, in which case devm_of_phy_get() returns -ENODEV. Rearrange the error handling so that -ENODEV will be handled but other error codes will abort the probing. Fixes: d28d6d2e ("net: lan966x: add port module support") Signed-off-by: NMichael Walle <michael@walle.cc> Link: https://lore.kernel.org/r/20220525231239.1307298-1-michael@walle.ccSigned-off-by: NJakub Kicinski <kuba@kernel.org>
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- 23 5月, 2022 1 次提交
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由 Julia Lawall 提交于
Spelling mistake (triple letters) in comment. Detected with the help of Coccinelle. Signed-off-by: NJulia Lawall <Julia.Lawall@inria.fr> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 17 5月, 2022 1 次提交
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由 Horatiu Vultur 提交于
The following two scenarios were failing for lan966x. 1. If the port had the address X and then trying to assign the same address, then the HW was just removing this address because first it tries to learn new address and then delete the old one. As they are the same the HW remove it. 2. If the port eth0 was assigned the same address as one of the other ports eth1 then when assigning back the address to eth0 then the HW was deleting the address of eth1. The case 1. is fixed by checking if the port has already the same address while case 2. is fixed by checking if the address is used by any other port. Fixes: e18aba89 ("net: lan966x: add mactable support") Signed-off-by: NHoratiu Vultur <horatiu.vultur@microchip.com> Link: https://lore.kernel.org/r/20220513180030.3076793-1-horatiu.vultur@microchip.comSigned-off-by: NPaolo Abeni <pabeni@redhat.com>
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- 13 5月, 2022 1 次提交
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由 Horatiu Vultur 提交于
The smatch found the following warning: drivers/net/ethernet/microchip/lan966x/lan966x_fdma.c:736 lan966x_fdma_reload() warn: 'rx_dcbs' was already freed. This issue can happen when changing the MTU on one of the ports and once the RX buffers are allocated and then the TX buffer allocation fails. In that case the RX buffers should not be restore. This fix this issue such that the RX buffers will not be restored if the TX buffers failed to be allocated. Fixes: 2ea1cbac ("net: lan966x: Update FDMA to change MTU.") Reported-by: NDan Carpenter <dan.carpenter@oracle.com> Signed-off-by: NHoratiu Vultur <horatiu.vultur@microchip.com> Link: https://lore.kernel.org/r/20220511204059.2689199-1-horatiu.vultur@microchip.comSigned-off-by: NJakub Kicinski <kuba@kernel.org>
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- 08 5月, 2022 1 次提交
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由 Jakub Kicinski 提交于
Switch all Ethernet drivers which use custom napi weights to the new API. Signed-off-by: NJakub Kicinski <kuba@kernel.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 06 5月, 2022 1 次提交
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由 Jakub Kicinski 提交于
Make the drivers with custom tx napi weight call netif_napi_add_tx_weight(). Reviewed-by: NXuan Zhuo <xuanzhuo@linux.alibaba.com> Link: https://lore.kernel.org/r/20220504163725.550782-2-kuba@kernel.orgSigned-off-by: NJakub Kicinski <kuba@kernel.org>
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- 05 5月, 2022 1 次提交
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由 Casper Andersson 提交于
Handle adding and removing MDB entries for host Signed-off-by: NCasper Andersson <casper.casan@gmail.com> Link: https://lore.kernel.org/r/20220503093922.1630804-1-casper.casan@gmail.comSigned-off-by: NPaolo Abeni <pabeni@redhat.com>
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- 30 4月, 2022 1 次提交
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由 Michael Walle 提交于
The PHY subsystem as well as the MIIM mdio driver (in case of the integrated PHYs) will take care of the resets. A separate reset driver isn't needed. There is no in-tree user of this feature. Remove the support. Signed-off-by: NMichael Walle <michael@walle.cc> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 27 4月, 2022 2 次提交
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由 Horatiu Vultur 提交于
Extend the PTP programmable pins to implement also PTP_PF_EXTTS function. The PTP pin can be configured to capture only on the rising edge of the PPS signal. And once an event is seen then an interrupt is generated and the local time counter is saved. The interrupt is shared between all the pins. Signed-off-by: NHoratiu Vultur <horatiu.vultur@microchip.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Horatiu Vultur 提交于
Lan966x has 8 PTP programmable pins, where the last pins is hardcoded to be used by PHC0, which does the frame timestamping. All the rest of the PTP pins can be shared between the PHCs and can have different functions like perout or extts. For now add support for PTP_FS_PEROUT. The HW is not able to support absolute start time but can use the nsec for phase adjustment when generating PPS. Signed-off-by: NHoratiu Vultur <horatiu.vultur@microchip.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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