1. 15 8月, 2017 3 次提交
  2. 14 8月, 2017 4 次提交
    • D
      drm/i915: More surgically unbreak the modeset vs reset deadlock · 9db529aa
      Daniel Vetter 提交于
      There's no reason to entirely wedge the gpu, for the minimal deadlock
      bugfix we only need to unbreak/decouple the atomic commit from the gpu
      reset. The simplest way to fix that is by replacing the
      unconditional fence wait a the top of commit_tail by a wait which
      completes either when the fences are done (normal case, or when a
      reset doesn't need to touch the display state). Or when the gpu reset
      needs to force-unblock all pending modeset states.
      
      The lesser source of deadlocks is when we try to pin a new framebuffer
      and run into a stall. There's a bunch of places this can happen, like
      eviction, changing the caching mode, acquiring a fence on older
      platforms. And we can't just break the depency loop and keep going,
      the only way would be to break out and restart. But the problem with
      that approach is that we must stall for the reset to complete before
      we grab any locks, and with the atomic infrastructure that's a bit
      tricky. The only place is the ioctl code, and we don't want to insert
      code into e.g. the BUSY ioctl. Hence for that problem just create a
      critical section, and if any code is in there, wedge the GPU. For the
      steady-state this should never be a problem.
      
      Note that in both cases TDR itself keeps working, so from a userspace
      pov this trickery isn't observable. Users themselvs might spot a short
      glitch while the rendering is catching up again, but that's still
      better than pre-TDR where we've thrown away all the rendering,
      including innocent batches. Also, this fixes the regression TDR
      introduced of making gpu resets deadlock-prone when we do need to
      touch the display.
      
      One thing I noticed is that gpu_error.flags seems to use both our own
      wait-queue in gpu_error.wait_queue, and the generic wait_on_bit
      facilities. Not entirely sure why this inconsistency exists, I just
      picked one style.
      
      A possible future avenue could be to insert the gpu reset in-between
      ongoing modeset changes, which would avoid the momentary glitch. But
      that's a lot more work to implement in the atomic commit machinery,
      and given that we only need this for pre-g4x hw, of questionable
      utility just for the sake of polishing gpu reset even more on those
      old boxes. It might be useful for other features though.
      
      v2: Rebase onto 4.13 with a s/wait_queue_t/struct wait_queue_entry/.
      
      v3: Really emabarrassing fixup, I checked the wrong bit and broke the
      unbreak/wakeup logic.
      
      v4: Also handle deadlocks in pin_to_display.
      
      v5: Review from Michel:
      - Fixup the BUILD_BUG_ON
      - Don't forget about the overlay
      
      Cc: Michel Thierry <michel.thierry@intel.com>
      Cc: Chris Wilson <chris@chris-wilson.co.uk>
      Cc: Mika Kuoppala <mika.kuoppala@intel.com>
      Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
      Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> (v2)
      Cc: Michel Thierry <michel.thierry@intel.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20170808080828.23650-3-daniel.vetter@ffwll.chReviewed-by: NMichel Thierry <michel.thierry@intel.com>
      9db529aa
    • D
      drm/i915: Push i915_sw_fence_wait into the nonblocking atomic commit · 42b062b0
      Daniel Vetter 提交于
      Blocking in a worker is ok, that's what the unbound_wq is for. And it
      unifies the paths between the blocking and nonblocking commit, giving
      me just one path where I have to implement the deadlock avoidance
      trickery in the next patch.
      
      I first tried to implement the following patch without this rework, but
      force-completing i915_sw_fence creates some serious challenges around
      properly cleaning things up. So wasn't a feasible short-term approach.
      Another approach would be to simple keep track of all pending atomic
      commit work items and manually queue them from the reset code. With the
      caveat that double-queue in case we race with the i915_sw_fence must be
      avoided. Given all that, taking the cost of a double schedule in atomic
      for the short-term fix is the best approach, but can be changed in the future of course.
      
      v2: Amend commit message (Chris).
      
      v3: Add comment explaining why we do nothing in the sw_fence complete
      callback (Michel).
      Reviewed-by: NMaarten Lankhorst <maarten.lankhorst@linux.intel.com>
      Cc: Chris Wilson <chris@chris-wilson.co.uk>
      Cc: Mika Kuoppala <mika.kuoppala@intel.com>
      Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
      Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> (v2)
      Cc: Michel Thierry <michel.thierry@intel.com>
      Reviewed-by: NMichel Thierry <michel.thierry@intel.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20170808080828.23650-2-daniel.vetter@ffwll.ch
      42b062b0
    • D
      drm/i915: Avoid the gpu reset vs. modeset deadlock · 97154ec2
      Daniel Vetter 提交于
      ... using the biggest hammer we have. This is essentially a weaponized
      version of the timeout-based wedging Chris added in
      
      commit 36703e79
      Author: Chris Wilson <chris@chris-wilson.co.uk>
      Date:   Thu Jun 22 11:56:25 2017 +0100
      
          drm/i915: Break modeset deadlocks on reset
      
      Because defense-in-depth is good it's good to still have both. Also
      note that with the locking change we can now restrict this a lot (old
      gpus and special testing only), so this doesn't kill the TDR benefits
      on at least anything remotely modern.
      
      And futuremore with a few tricks it should be possible to make a much
      more educated guess about whether an atomic commit is stuck waiting on
      the gpu (atomic_t counting the pending i915_sw_fence used by the
      atomic modeset code should do it), so we can improve this.
      
      But for now just start with something that is guaranteed to recover
      faster, for much better CI througput.
      
      This defacto reverts TDR on these platforms, but there's not really a
      single commit to specify as the sole offender.
      
      v2: Add a debug message to explain what's going on. We can't DRM_ERROR
      because that spams CI. And the timeout based fallback still prints a
      DRM_ERROR, in case something goes wrong.
      
      v3: Fix comment layout (Michel)
      
      Fixes: 4680816b ("drm/i915: Wait first for submission, before waiting for request completion")
      Fixes: 221fe799 ("drm/i915: Perform a direct reset of the GPU from the waiter")
      Cc: Chris Wilson <chris@chris-wilson.co.uk>
      Cc: Mika Kuoppala <mika.kuoppala@intel.com>
      Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
      Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> (v2)
      Cc: Michel Thierry <michel.thierry@intel.com>
      Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> (v2)
      Reviewed-by: NMichel Thierry <michel.thierry@intel.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20170808080828.23650-1-daniel.vetter@ffwll.ch
      97154ec2
    • M
      drm/i915/gen9: Send all components in VF state · 27437890
      Mika Kuoppala 提交于
      Update gen9 renderstate to account the, long overdue, changes for
      igt commit 5c07135b7bd2 ("tools/null_state/gen9: Send all
      components in VF state").
      Signed-off-by: NMika Kuoppala <mika.kuoppala@intel.com>
      Reviewed-by: NChris Wilson <chris@chris-wilson.co.uk>
      Link: https://patchwork.freedesktop.org/patch/msgid/20170810110451.31635-1-mika.kuoppala@intel.com
      27437890
  3. 13 8月, 2017 1 次提交
  4. 12 8月, 2017 8 次提交
  5. 11 8月, 2017 17 次提交
  6. 10 8月, 2017 3 次提交
    • C
      drm/i915: Supply the engine-id for our mock_engine() · 3ec0af7f
      Chris Wilson 提交于
      In the original selftest, we didn't care what the engine->id was, just
      that it could uniquely identify it. Later though, we started tracking
      the mock engines in the fixed size arrays around the drm_i915_private and
      so we now require their indices to be correct. This becomes an issue when
      using the standalone harness which runs all available tests at module load,
      and so we quickly assign an out-of-bounds index to an engine as we
      reallocate the mock GEM device between tests. It doesn't show up in
      igt/drv_selftest as that runs each subtest individually.
      
      Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102045Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
      Link: https://patchwork.freedesktop.org/patch/msgid/20170809163930.26470-1-chris@chris-wilson.co.ukReviewed-by: NMika Kuoppala <mika.kuoppala@intel.com>
      3ec0af7f
    • D
      Merge tag 'drm-misc-next-2017-08-08' of git://anongit.freedesktop.org/git/drm-misc into drm-next · 09ef2378
      Dave Airlie 提交于
      UAPI Changes:
      - vc4: Add ioctl to allow attaching a label to a bo (Eric)
      - Add new format/modifier blob plane property (Ben)
      - armada: Use __u32/__u64 instead of uint32_t/uint64_t (Mikko)
      - [kinda uapi] fb_helper: Expose display_info size via fb_info (David)
      
      Core Changes:
      - Default gem_dumb_[map_offset|destroy] as mmap/destroy implementations (Noralf)
      - Simplify atomic properties by removing the helpers and handling in core (Daniel)
      
      Driver Changes:
      - stm: Add STM32 DSI controller driver (Phillipe)
      - vc4: Add HDMI CEC support (Hans)
      - rockchip: Refactor register init & soc version handling (Mark)
      - misc: Remove .load_lut, .gamma_set, .gamma_get dead code (Peter)
      - dw-hdmi: Add HDMI CEC support (Russell)
      
      Cc: Philippe CORNU <philippe.cornu@st.com>
      Cc: Hans Verkuil <hans.verkuil@cisco.com>
      Cc: Eric Anholt <eric@anholt.net>
      Cc: Noralf Trønnes <noralf@tronnes.org>
      Cc: Ben Widawsky <ben@bwidawsk.net>
      Cc: Mark yao <mark.yao@rock-chips.com>
      Cc: Peter Rosin <peda@axentia.se>
      Cc: Russell King <rmk+kernel@armlinux.org.uk>
      Cc: Mikko Rapeli <mikko.rapeli@iki.fi>
      Cc: David Lechner <david@lechnology.com>
      Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
      
      * tag 'drm-misc-next-2017-08-08' of git://anongit.freedesktop.org/git/drm-misc: (107 commits)
        drm: Nuke drm_atomic_legacy_backoff
        drm: Nuke drm_atomic_helper_connector_dpms
        drm: Nuke drm_atomic_helper_connector_set_property
        drm: Nuke drm_atomic_helper_plane_set_property
        drm: Nuke drm_atomic_helper_crtc_set_property
        drm: Handle properties in the core for atomic drivers
        drm: Don't update property values for atomic drivers
        drm/omap: Rework the rotation-on-crtc hack
        drm/radeon: Use the drm_driver.dumb_destroy default
        drm/i915: Use the drm_driver.dumb_destroy default
        drm/sti: Use .dumb_map_offset and .dumb_destroy defaults
        drm: bridge: synopsys/dw-hdmi: Provide default configuration function for HDMI 2.0 PHY
        drm/fb-helper: pass physical dimensions to fbdev
        uapi drm/armada_drm.h: use __u32 and __u64 instead of uint32_t and uint64_t
        drm/bridge: dw-hdmi: remove CEC engine register definitions
        drm/bridge: dw-hdmi: add cec driver
        drm/bridge: dw-hdmi: add missing cec_notifier_put
        drm: remove unused and redundant callbacks
        staging: vboxvideo: remove dead gamma lut code
        drm: dw-hdmi-i2s: add missing company name on Copyright
        ...
      09ef2378
    • J
      drm/i915/psr: Preserve SRD_CTL bit 29 on PSR init · 912d6412
      Jim Bride 提交于
      Bit 29 of SRD_CTL needs to have its value preserved according to the
      B-Spec, so right before we write out the register we go ahead and read
      the register and preserve the value of that bit before we write out
      the configured register value.
      
      v2: Spaces => tabs, minor name change, and commit message wording (Rodrigo)
      
      Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
      Cc: Chris Wilson <chris@chris-wilson.co.uk>
      Cc: Jani Nikula <jani.nikula@intel.com>
      Signed-off-by: NJim Bride <jim.bride@linux.intel.com>
      Reviewed-by: NRodrigo Vivi <rodrigo.vivi@intel.com>
      Signed-off-by: NRodrigo Vivi <rodrigo.vivi@intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/1502229094-13392-1-git-send-email-jim.bride@linux.intel.com
      912d6412
  7. 09 8月, 2017 1 次提交
  8. 08 8月, 2017 3 次提交
    • C
      drm/i915: Perform an invalidate prior to executing golden renderstate · 802673d6
      Chris Wilson 提交于
      As we may have just bound the renderstate into the GGTT for execution, we
      need to ensure that the GTT TLB are also flushed.
      
      On snb-gt2, this would cause a random GPU hang at the start of a new
      context (e.g. boot) and on snb-gt1, it was causing the renderstate batch
      to take ~10s. It was the GPU hang that revealed the truth, as the CS
      gleefully executed beyond the end of the golden renderstate batch, a good
      indicator for a GTT TLB miss.
      
      Fixes: 20fe17aa ("drm/i915: Remove redundant TLB invalidate on switching contexts")
      Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
      Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
      Cc: stable@vger.kernel.org
      Link: https://patchwork.freedesktop.org/patch/msgid/20170808131904.1385-1-chris@chris-wilson.co.ukReviewed-by: NMika Kuoppala <mika.kuoppala@linux.intel.com>
      Cc: <drm-intel-fixes@lists.freedesktop.org> # v4.12-rc1+
      802673d6
    • D
    • D
      drm: Nuke drm_atomic_helper_connector_dpms · 7d902c05
      Daniel Vetter 提交于
      It's dead code, the core handles all this directly now.
      
      The only special case is nouveau and tda988x which used one function
      for both legacy modeset code and -nv50 atomic world instead of 2
      vtables. But amounts to exactly the same.
      
      v2: Rebase over the panel/brideg refactorings in stm/ltdc.
      Signed-off-by: NDaniel Vetter <daniel.vetter@intel.com>
      Cc: Archit Taneja <architt@codeaurora.org>
      Cc: Andrzej Hajda <a.hajda@samsung.com>
      Cc: Laurent Pinchart <Laurent.pinchart@ideasonboard.com>
      Cc: Peter Senna Tschudin <peter.senna@collabora.com>
      Cc: Martin Donnelly <martin.donnelly@ge.com>
      Cc: Martyn Welch <martyn.welch@collabora.co.uk>
      Cc: Daniel Vetter <daniel.vetter@intel.com>
      Cc: Jani Nikula <jani.nikula@linux.intel.com>
      Cc: Sean Paul <seanpaul@chromium.org>
      Cc: David Airlie <airlied@linux.ie>
      Cc: Inki Dae <inki.dae@samsung.com>
      Cc: Joonyoung Shim <jy0922.shim@samsung.com>
      Cc: Seung-Woo Kim <sw0312.kim@samsung.com>
      Cc: Kyungmin Park <kyungmin.park@samsung.com>
      Cc: Kukjin Kim <kgene@kernel.org>
      Cc: Krzysztof Kozlowski <krzk@kernel.org>
      Cc: Stefan Agner <stefan@agner.ch>
      Cc: Alison Wang <alison.wang@freescale.com>
      Cc: Russell King <linux@armlinux.org.uk>
      Cc: Philipp Zabel <p.zabel@pengutronix.de>
      Cc: CK Hu <ck.hu@mediatek.com>
      Cc: Matthias Brugger <matthias.bgg@gmail.com>
      Cc: Neil Armstrong <narmstrong@baylibre.com>
      Cc: Carlo Caione <carlo@caione.org>
      Cc: Kevin Hilman <khilman@baylibre.com>
      Cc: Marek Vasut <marex@denx.de>
      Cc: Ben Skeggs <bskeggs@redhat.com>
      Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
      Cc: Eric Anholt <eric@anholt.net>
      Cc: Mark Yao <mark.yao@rock-chips.com>
      Cc: Heiko Stuebner <heiko@sntech.de>
      Cc: Benjamin Gaignard <benjamin.gaignard@linaro.org>
      Cc: Vincent Abriou <vincent.abriou@st.com>
      Cc: Yannick Fertre <yannick.fertre@st.com>
      Cc: Philippe Cornu <philippe.cornu@st.com>
      Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
      Cc: Chen-Yu Tsai <wens@csie.org>
      Cc: Thierry Reding <thierry.reding@gmail.com>
      Cc: Jonathan Hunter <jonathanh@nvidia.com>
      Cc: Jyri Sarha <jsarha@ti.com>
      Cc: Gerd Hoffmann <kraxel@redhat.com>
      Cc: Shawn Guo <shawnguo@kernel.org>
      Cc: John Stultz <john.stultz@linaro.org>
      Cc: Lars-Peter Clausen <lars@metafoo.de>
      Cc: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
      Cc: Jeffy Chen <jeffy.chen@rock-chips.com>
      Cc: Tomeu Vizoso <tomeu.vizoso@collabora.com>
      Cc: Yakir Yang <kuankuan.y@gmail.com>
      Cc: Marek Szyprowski <m.szyprowski@samsung.com>
      Cc: Jose Abreu <Jose.Abreu@synopsys.com>
      Cc: Romain Perier <romain.perier@collabora.com>
      Cc: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
      Cc: Xinliang Liu <z.liuxinliang@hisilicon.com>
      Cc: Alexey Brodkin <abrodkin@synopsys.com>
      Cc: Alex Deucher <alexander.deucher@amd.com>
      Cc: Rongrong Zou <zourongrong@gmail.com>
      Cc: Rob Clark <robdclark@gmail.com>
      Cc: Hai Li <hali@codeaurora.org>
      Cc: "Noralf Trønnes" <noralf@tronnes.org>
      Cc: linux-arm-kernel@lists.infradead.org
      Cc: linux-samsung-soc@vger.kernel.org
      Cc: intel-gfx@lists.freedesktop.org
      Cc: linux-mediatek@lists.infradead.org
      Cc: linux-amlogic@lists.infradead.org
      Cc: nouveau@lists.freedesktop.org
      Cc: linux-renesas-soc@vger.kernel.org
      Cc: linux-rockchip@lists.infradead.org
      Cc: linux-tegra@vger.kernel.org
      Cc: virtualization@lists.linux-foundation.org
      Cc: zain wang <wzz@rock-chips.com>
      Cc: Baoyou Xie <baoyou.xie@linaro.org>
      Cc: Boris Brezillon <boris.brezillon@free-electrons.com>
      Reviewed-by: NMaarten Lankhorst <maarten.lankhorst@linux.intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20170725080122.20548-8-daniel.vetter@ffwll.chAcked-by: NNeil Armstrong <narmstrong@baylibre.com>
      Reviewed-by: NNeil Armstrong <narmstrong@baylibre.com>
      Acked-by: NPhilipp Zabel <p.zabel@pengutronix.de>
      Acked-by: NArchit Taneja <architt@codeaurora.org>
      Tested-by: Philippe Cornu <philippe.cornu@st.com> (on stm)
      Reviewed-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com>
      Acked-by: NShawn Guo <shawnguo@kernel.org>
      Acked-by: NShawn Guo <shawnguo@kernel.org>
      Acked-by: NNoralf Trønnes <noralf@tronnes.org>
      Acked-by: NVincent Abriou <vincent.abriou@st.com>
      7d902c05