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  1. 03 12月, 2019 1 次提交
  3. 19 11月, 2019 2 次提交
  5. 14 11月, 2019 3 次提交
  7. 12 11月, 2019 2 次提交
  9. 04 11月, 2019 1 次提交
  11. 17 10月, 2019 2 次提交
  13. 14 10月, 2019 1 次提交
  15. 08 10月, 2019 1 次提交
  17. 16 9月, 2019 1 次提交
  19. 19 8月, 2019 1 次提交
    • M
      drm/i915/gen11: Allow usage of all GPIO pins · 5a6b7ef6
      由 Matt Roper 提交于 
      Our pin mapping tables for ICP and MCC currently only list the standard
GPIO pins used for various output ports.  Even through ICP's standard
pin usage only utilizes pins 1, 2, and 9-12, and MCC's standard pin
usage only uses pins 1, 2, and 9, these platforms do still have GPIO
registers to address pins in the range 1-3 and 9-14.  OEM's may remap
GPIO usage in non-standard ways (and provide the actual mapping via VBT
settings), so we shouldn't exclude pins on these platforms just because
they aren't part of the standard mappings.

TGP's standard pin tables contains all the possible pins, so let's
rename them to "icp" and use them for all PCH >= PCH_ICP.  This will
prevent intel_gmbus_is_valid_pin from rejecting non-standard pin usage
that an OEM specifies via the VBT.

Note that this will cause pin 9 to be labeled as "tc1" instead of "dpc"
in debug messages on platforms with the MCC PCH, but that may actually
help avoid confusion since the text strings will now be the same on all
gen11+ platforms instead of being different on just EHL.

v2: Drop now-unused MCC_DDC_BUS_DDI_* names.

v3: We want to compare against INTEL_PCH_TYPE, not INTEL_PCH_ID.

Bspec: 8417
Cc: José Roberto de Souza <jose.souza@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Vivek Kasireddy <vivek.kasireddy@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: NMatt Roper <matthew.d.roper@intel.com>
Reviewed-by: NJosé Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190817005041.20651-1-matthew.d.roper@intel.com
      5a6b7ef6
  21. 29 7月, 2019 1 次提交
  23. 19 7月, 2019 1 次提交
  25. 12 7月, 2019 2 次提交
  27. 11 7月, 2019 1 次提交
  29. 20 6月, 2019 1 次提交
    • M
      drm/i915/ehl: Allow combo PHY A to drive a third external display · bdeb18db
      由 Matt Roper 提交于 
      EHL has a mux on combo PHY A that allows it to be driven either by an
internal display (DDI-A or DSI DPHY) or by an external display (DDI-D).
This is a motherboard design decision that can not be changed on the
fly.  Unfortunately there are no strap registers that allow us to detect
the board configuration directly, so let's use the VBT to try to figure
it out and program the mux accordingly.

For now if we run across a broken VBT that tries to claim that PHY A
is attached to both internal and external displays at the same time,
we'll resolve the conflict in favor of the internal display.  To help
debug these kind of bad VBT's, let's also add a quick DRM_DEBUG message
during child device parsing so that it's easier to understand these
cases if they show up in bug reports.

v2:
 - Confirmed that VBT's dvo port refers to the DDI and not the PHY.
   Thus we can check more explicitly for (ddi_d && !(ddi_a || dsi)).  If
   a bad VBT contradicts itself, let internal display win.  (Ville)

v3:
 - Switch condition from !IS_ICELAKE to IS_ELKHARTLAKE.  Although the
   convention is usually to assume that future platforms will inherit
   all current platform behavior, this feels more like a one-platform
   quirk.  (Ville)
 - Update commit message to describe what we do if/when we encounter
   broken VBT's, and note that the new debug print during child device
   parsing is intentional.

Cc: Clint Taylor <Clinton.A.Taylor@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: NMatt Roper <matthew.d.roper@intel.com>
Reviewed-by: NVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190618175131.9139-1-matthew.d.roper@intel.com
      bdeb18db
  31. 18 6月, 2019 1 次提交
  33. 17 6月, 2019 2 次提交
  35. 05 6月, 2019 8 次提交
  37. 03 5月, 2019 1 次提交
  39. 25 3月, 2019 1 次提交
  41. 19 3月, 2019 1 次提交
  43. 14 3月, 2019 3 次提交
  45. 31 1月, 2019 1 次提交
    • I
      drm/i915/icl: Add TypeC ports only if VBT is present · 828ccb31
      由 Imre Deak 提交于 
      We can't safely probe Type C ports, whether they are a legacy or a
USB/Thunderbolt DP Alternate Type C port. This would require performing
the TypeC connect sequence - as described by the specification - but
that may have unwanted side-effects. These side-effects include at least
- without completeness - timeouts during AUX power well enabling and
subsequent PLL enabling errors.

To safely identify these ports we really need VBT, which has the proper
flag for this (ddi_vbt_port_info::supports_typec_usb, supports_tbt).
Based on the above disable Type C ports if we can't load VBT for some
reason.

v2:
- Notice that we disable TypeC ports completely and simplify accordingly
  (Jose).
- Add code comment explaining why we disabled the ports. (Jani)

Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Cc: Jose Roberto de Souza <jose.souza@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: NImre Deak <imre.deak@intel.com>
Reviewed-by: NJosé Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190128114242.28666-1-imre.deak@intel.com
      828ccb31
  47. 15 1月, 2019 1 次提交