1. 23 11月, 2018 2 次提交
  2. 11 11月, 2018 2 次提交
    • S
      iwlwifi: dbg: avoid passing trigger around · 124e0eba
      Sara Sharon 提交于
      The trigger structure is being passed around, when
      all we care about is whether to dump only monitor
      or not. Pass a bool instead.
      Signed-off-by: NSara Sharon <sara.sharon@intel.com>
      Signed-off-by: NLuca Coelho <luciano.coelho@intel.com>
      124e0eba
    • S
      iwlwifi: trans: Clear persistence bit when starting the FW · 8954e1eb
      Shahar S Matityahu 提交于
      In D3 suspend flow in 9260 gen2 HW, the NIC receives two PERST signals.
      The first PERST is expected and indicates the device on coming resume flow.
      The second PERST causes FW restart FW restart.
      In order to avoid this issue, the FW set the persistence bit on.
      Once this bit is set, the FW ignores reset attempts.
      The problem is when the FW gets assert during D3 and then the persistence
      bit is set and causes the FW to ignore reset.
      To handle this issue, the FW opens the preg bit which allows access
      to the persistence bit, so that the driver clear the persistence bit
      and reset the NIC.
      
      The flow is as follows:
      the driver checks if the persistence bit is set.
      If the bit is set, the driver checks if he can clear the bit.
      If the driver can not clear the bit then there is no point to continue
      configuring the NIC since it will fail.
      
      The fix was added is in start HW flow instead of the resume flow since in
      general, if the persistence bit is set, the driver can not start the FW.
      So it is good to check it when we start configuring the NIC.
      
      The driver does not need to close the preg bit since the FW close it
      during the start flow.
      Signed-off-by: NShahar S Matityahu <shahar.s.matityahu@intel.com>
      Signed-off-by: NLuca Coelho <luciano.coelho@intel.com>
      8954e1eb
  3. 06 10月, 2018 1 次提交
  4. 28 9月, 2018 6 次提交
  5. 31 8月, 2018 7 次提交
  6. 02 8月, 2018 5 次提交
  7. 26 7月, 2018 5 次提交
  8. 29 5月, 2018 1 次提交
  9. 26 4月, 2018 2 次提交
  10. 27 3月, 2018 1 次提交
  11. 21 12月, 2017 2 次提交
  12. 28 11月, 2017 1 次提交
  13. 25 11月, 2017 2 次提交
    • S
      iwlwifi: fix access to prph when transport is stopped · 0232d2cd
      Sara Sharon 提交于
      When getting HW rfkill we get stop_device being called from
      two paths.
      One path is the IRQ calling stop device, and updating op
      mode and stack.
      As a result, cfg80211 is running rfkill sync work that shuts
      down all devices (second path).
      In the second path, we eventually get to iwl_mvm_stop_device
      which calls iwl_fw_dump_conf_clear->iwl_fw_dbg_stop_recording,
      that access periphery registers.
      The device may be stopped at this point from the first path,
      which will result with a failure to access those registers.
      Simply checking for the trans status is insufficient, since
      the race will still exist, only minimized.
      Instead, move the stop from iwl_fw_dump_conf_clear (which is
      getting called only from stop path) to the transport stop
      device function, where the access is always safe.
      This has the added value, of actually stopping dbgc before
      stopping device even when the stop is initiated from the
      transport.
      
      Fixes: 1efc3843 ("iwlwifi: stop dbgc recording before stopping DMA")
      Signed-off-by: NSara Sharon <sara.sharon@intel.com>
      Signed-off-by: NLuca Coelho <luciano.coelho@intel.com>
      0232d2cd
    • S
      iwlwifi: pcie: fix erroneous "Read failed message" · f3402d6d
      Sara Sharon 提交于
      Current pci dumping code code is always falling to the error
      path, resulting with a constant "Read failed" message, also
      for the successful reads.
      
      Fixes: a5c932e41fdd ("iwlwifi: pcie: dump registers when HW becomes inaccessible")
      Signed-off-by: NSara Sharon <sara.sharon@intel.com>
      Signed-off-by: NLuca Coelho <luciano.coelho@intel.com>
      f3402d6d
  14. 03 11月, 2017 1 次提交
  15. 25 10月, 2017 1 次提交
    • M
      locking/atomics: COCCINELLE/treewide: Convert trivial ACCESS_ONCE() patterns... · 6aa7de05
      Mark Rutland 提交于
      locking/atomics: COCCINELLE/treewide: Convert trivial ACCESS_ONCE() patterns to READ_ONCE()/WRITE_ONCE()
      
      Please do not apply this to mainline directly, instead please re-run the
      coccinelle script shown below and apply its output.
      
      For several reasons, it is desirable to use {READ,WRITE}_ONCE() in
      preference to ACCESS_ONCE(), and new code is expected to use one of the
      former. So far, there's been no reason to change most existing uses of
      ACCESS_ONCE(), as these aren't harmful, and changing them results in
      churn.
      
      However, for some features, the read/write distinction is critical to
      correct operation. To distinguish these cases, separate read/write
      accessors must be used. This patch migrates (most) remaining
      ACCESS_ONCE() instances to {READ,WRITE}_ONCE(), using the following
      coccinelle script:
      
      ----
      // Convert trivial ACCESS_ONCE() uses to equivalent READ_ONCE() and
      // WRITE_ONCE()
      
      // $ make coccicheck COCCI=/home/mark/once.cocci SPFLAGS="--include-headers" MODE=patch
      
      virtual patch
      
      @ depends on patch @
      expression E1, E2;
      @@
      
      - ACCESS_ONCE(E1) = E2
      + WRITE_ONCE(E1, E2)
      
      @ depends on patch @
      expression E;
      @@
      
      - ACCESS_ONCE(E)
      + READ_ONCE(E)
      ----
      Signed-off-by: NMark Rutland <mark.rutland@arm.com>
      Signed-off-by: NPaul E. McKenney <paulmck@linux.vnet.ibm.com>
      Cc: Linus Torvalds <torvalds@linux-foundation.org>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: davem@davemloft.net
      Cc: linux-arch@vger.kernel.org
      Cc: mpe@ellerman.id.au
      Cc: shuah@kernel.org
      Cc: snitzer@redhat.com
      Cc: thor.thayer@linux.intel.com
      Cc: tj@kernel.org
      Cc: viro@zeniv.linux.org.uk
      Cc: will.deacon@arm.com
      Link: http://lkml.kernel.org/r/1508792849-3115-19-git-send-email-paulmck@linux.vnet.ibm.comSigned-off-by: NIngo Molnar <mingo@kernel.org>
      6aa7de05
  16. 06 10月, 2017 1 次提交
    • R
      iwlwifi: pcie: dump registers when HW becomes inaccessible · a6d24fad
      Rajat Jain 提交于
      We conclude the HW became inaccessible when we timeout waiting for
      a bit to be set in a memory mapped register (CSR_GP_CNTRL). This
      conclusion may not be true because the bit may not get set due to:
      - a firmware issue
      - a driver issue
      - a PCI bus issue
      - a platform issue
      There are a lot of such reports with really no good debug information
      beyond this message to help us.
      
      Add some debug information and attempt to dump the different register
      spaces at such a failure:
      
      * Dump some configuration space of device - this will tell us if
      something very basic is broken in the PCIe bus (so that configuration
      accesses are failing). If this works, the PCIe bus seems OK. If this
      does not work, it is definitely an PCIe issue.
      
      * Dump some memory mapped registers - if we're reading some sane'ish
      values, this will tell us that the PCIe bus is OK, but may be a firmware
      / driver issue. If this does not work, it may be a PCI configuration
      issue or a driver/firmware issue.
      
      * Dump parent and device's AER registers, will give us some straws to
      chew on.
      
      This is the sample output:
      [   13.082651] ------------[ cut here ]------------
      [   13.086791] iwlwifi 0000:01:00.0: iwlwifi transaction failed, dumping registers
      [   13.086793] iwlwifi 0000:01:00.0: iwlwifi device config registers:
      [   13.086893] iwlwifi 0000:01:00.0: 00000000: 095a8086 00100406 02800059 00000000 00000004 00000000 00000000 00000000
      [   13.086895] iwlwifi 0000:01:00.0: 00000020: 00000000 00000000 00000000 50108086 00000000 000000c8 00000000 00000100
      [   13.086901] iwlwifi 0000:01:00.0: iwlwifi device memory mapped registers:
      [   13.086989] iwlwifi 0000:01:00.0: 00000000: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff
      [   13.086991] iwlwifi 0000:01:00.0: 00000020: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff
      [   13.086999] iwlwifi 0000:01:00.0: iwlwifi device AER capability structure:
      [   13.087033] iwlwifi 0000:01:00.0: 00000000: 14010001 00100000 00000000 00462031 00002000 00002000 00000014 40000001
      [   13.087034] iwlwifi 0000:01:00.0: 00000020: 0000000f d140000c 00000000
      [   13.087036] iwlwifi 0000:01:00.0: iwlwifi parent port (0000:00:1c.0) config registers:
      [   13.087074] iwlwifi 0000:00:1c.0: 00000000: 9d108086 00100506 060400f1 00810010 00000000 00000000 00010100 200000f0
      [   13.087075] iwlwifi 0000:00:1c.0: 00000020: d140d140 0001fff1 00000000 00000000 00000000 00000040 00000000 0006010b
      [   13.087087] ------------[ cut here ]------------
      [   13.087095] WARNING: CPU: 0 PID: 1759 at drivers/net/wireless/iwl7000/iwlwifi/pcie/trans.c:2082 iwl_trans_pcie_reclaim+0x1ee4/0x2b9a [iwlwifi]()
      [   13.087096] Timeout waiting for hardware access (CSR_GP_CNTRL 0xffffffff)
      Signed-off-by: NRajat Jain <rajatja@google.com>
      Signed-off-by: NLuca Coelho <luciano.coelho@intel.com>
      a6d24fad