- 15 7月, 2012 2 次提交
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由 Alexander Duyck 提交于
This change merges the ixgbe_cache_ring_fcoe and ixgbe_set_fcoe_queues logic into the DCB and RSS initialization calls. Cc: John Fastabend <john.r.fastabend@intel.com> Signed-off-by: NAlexander Duyck <alexander.h.duyck@intel.com> Tested-by: NPhil Schmitt <phillip.j.schmitt@intel.com> Tested-by: NRoss Brattain <ross.b.brattain@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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由 Alexander Duyck 提交于
In upcoming patches it will become increasingly common to need to determine the FCoE traffic class in order to determine the correct queues for FCoE. In order to make this easier I am adding a function for obtaining the FCoE traffic class based on the user priority. Cc: John Fastabend <john.r.fastabend@intel.com> Signed-off-by: NAlexander Duyck <alexander.h.duyck@intel.com> Tested-by: NPhil Schmitt <phillip.j.schmitt@intel.com> Tested-by: NRoss Brattain <ross.b.brattain@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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- 11 7月, 2012 5 次提交
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由 Alexander Duyck 提交于
There are really only 3 modes that can control the number of queues. Those are RSS, DCB, and VMDq/SR-IOV. Currently we have things much more broken up than they need to be for how we are configuring the rings. In order to try and straiten some of this out I am going to start merging similar functionality into single functions. To start with I am merging the Flow Director ring configuration into the RSS ring configuration since Flow Director cannot function with DCB or SR-IOV. Signed-off-by: NAlexander Duyck <alexander.h.duyck@intel.com> Tested-by: NPhil Schmitt <phillip.j.schmitt@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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由 Alexander Duyck 提交于
The mask value for ring features was overloaded for FCoE which can lead to some confusion. In order to avoid any confusion I am splitting the mask value and adding an offset value. This can be used for the start of the FCoE rings, and in the future I hope to use it to store the start of the registers for SR-IOV. Signed-off-by: NAlexander Duyck <alexander.h.duyck@intel.com> Tested-by: NPhil Schmitt <phillip.j.schmitt@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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由 Alexander Duyck 提交于
We are currently using indices to indicate the upper limit on a ring feature. However since we can switch back and forth on features such as DCB and that has effects on other features such as RSS it is preferable to instead store the upper limit separate from the current value for the number of rings related to the feature. Signed-off-by: NAlexander Duyck <alexander.h.duyck@intel.com> Tested-by: NPhil Schmitt <phillip.j.schmitt@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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由 Alexander Duyck 提交于
It makes much more sense for us to count q_vectors instead of MSI-X vectors. We were using num_msix_vectors to find the number of q_vectors in multiple places. This was wasteful since we only had one place that actually needs the number of MSI-X vectors and that is in slow path. Signed-off-by: NAlexander Duyck <alexander.h.duyck@intel.com> Tested-by: NPhil Schmitt <phillip.j.schmitt@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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由 Ben Hutchings 提交于
Fix incorrect start markers, wrapped summary lines, missing section breaks, incorrect separators, and some name mismatches. Delete a few that are content-free. Signed-off-by: NBen Hutchings <bhutchings@solarflare.com> Acked-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 27 6月, 2012 1 次提交
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由 Alexander Duyck 提交于
FCoE target mode was experiencing issues due to the fact that we were sending up data frames that were padded to 60 bytes after the DDP logic had already stripped the frame down to 52 or 56 depending on the use of VLANs. This was resulting in the FCoE DDP logic having issues since it thought the frame still had data in it due to the padding. To resolve this, adding code so that we do not pad FCoE frames prior to handling them to the stack. CC: <stable@vger.kernel.org> Signed-off-by: NAlexander Duyck <alexander.h.duyck@intel.com> Tested-by: NPhil Schmitt <phillip.j.schmitt@intel.com> Tested-by: NRoss Brattain <ross.b.brattain@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 04 5月, 2012 1 次提交
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由 Alexander Duyck 提交于
This change reorders the mapping of rings to q_vectors in the case that the number of rings exceeds the number of q_vectors. Previously we would allocate the first R/N queues to the first q_vector where R is the number of rings and N is the number of q_vectors. Instead of doing this we can do a better job of interleaving the rings to the CPUs by assigning every Nth ring to the q_vector. The below tables illustrate this change for the R = 16 N = 4 case. Before patch After patch q_vector: 0 1 2 3 0 1 2 3 Rings: 0 4 8 12 0 1 2 3 1 5 9 13 4 5 6 7 3 6 10 14 8 9 10 11 4 7 11 15 12 13 14 15 This should improve the performance for both DCB or ATR when the number of rings exceeds the number of q_vectors allocated by the adapter. Signed-off-by: NAlexander Duyck <alexander.h.duyck@intel.com> Tested-by: NRoss Brattain <ross.b.brattain@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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- 18 4月, 2012 1 次提交
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由 Alexander Duyck 提交于
This patch makes it so that we identify FCoE rings earlier than ixgbe_set_rx_buffer_len. Instead we identify the Rx FCoE rings at allocation time in ixgbe_alloc_q_vector. The motivation behind this change is to avoid memory corruption when FCoE is enabled. Without this change we were initializing the rings at 0, and 2K on systems with 4K pages, then when we bumped the buffer size to 4K with order 1 pages we were accessing offsets 2K and 6K instead of 0 and 4K. This was resulting in memory corruptions. Signed-off-by: NAlexander Duyck <alexander.h.duyck@intel.com> Acked-by: NYi Zou <yi.zou@intel.com> Tested-by: NRoss Brattain <ross.b.brattain@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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- 20 3月, 2012 1 次提交
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由 Jeff Kirsher 提交于
Resolve namespace issues when FCoE or DCB is not enabled. The issue is with certain configurations we end up with namespace problems. A simple example: ixgbe_main.c - defines func A() - uses func A() ixgbe_fcoe.c - uses func A() ixgbe.h - has prototype for func A() For default (FCoE included) all is good. But when it isn't the namespace checker complains about how func A() could be static. To resolve this, created a ixgbe_lib file to contain functions used by DCB/FCoE and their helper functions so that they are always in namespace whether or not DCB/FCoE is enabled. Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com> Tested-by: NPhil Schmitt <phillip.j.schmitt@intel.com>
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