The struct pci_host_bridge is 0 initialized when allocated, so there's
no need to explicitly set fields to 0.

Link: https://lore.kernel.org/r/20200722022514.1283916-4-robh@kernel.orgSigned-off-by: NRob Herring <robh@kernel.org>
Signed-off-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: NBjorn Helgaas <bhelgaas@google.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>

The host bridge's parent device is always the platform device. As we
already have a pointer to it in the devres functions, let's initialize
the parent device. Drivers can still override the parent if desired.

Link: https://lore.kernel.org/r/20200722022514.1283916-3-robh@kernel.orgSigned-off-by: NRob Herring <robh@kernel.org>
Signed-off-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: NBjorn Helgaas <bhelgaas@google.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>

The xilinx host driver does the same host registration and bus scanning
calls as pci_host_probe, so let's use it instead.

The only difference is pci_assign_unassigned_bus_resources() was called
instead of pci_bus_size_bridges() and pci_bus_assign_resources(). This
should be the same.

Link: https://lore.kernel.org/r/20200522234832.954484-16-robh@kernel.orgSigned-off-by: NRob Herring <robh@kernel.org>
Signed-off-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Michal Simek <michal.simek@xilinx.com>

Extend devm_of_pci_get_host_bridge_resources() and
pci_parse_request_of_pci_ranges() helpers to also parse the inbound
addresses from DT 'dma-ranges' and populate a resource list with the
translated addresses. This will help ensure 'dma-ranges' is always
parsed in a consistent way.
Tested-by: NSrinath Mannam <srinath.mannam@broadcom.com>
Tested-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com> # for AArdvark
Signed-off-by: NRob Herring <robh@kernel.org>
Signed-off-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: NSrinath Mannam <srinath.mannam@broadcom.com>
Reviewed-by: NAndrew Murray <andrew.murray@arm.com>
Acked-by: NGustavo Pimentel <gustavo.pimentel@synopsys.com>
Cc: Jingoo Han <jingoohan1@gmail.com>
Cc: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Cc: Will Deacon <will@kernel.org>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Toan Le <toan@os.amperecomputing.com>
Cc: Ley Foon Tan <lftan@altera.com>
Cc: Tom Joseph <tjoseph@cadence.com>
Cc: Ray Jui <rjui@broadcom.com>
Cc: Scott Branden <sbranden@broadcom.com>
Cc: bcm-kernel-feedback-list@broadcom.com
Cc: Ryder Lee <ryder.lee@mediatek.com>
Cc: Karthikeyan Mitran <m.karthikeyan@mobiveil.co.in>
Cc: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Cc: Simon Horman <horms@verge.net.au>
Cc: Shawn Lin <shawn.lin@rock-chips.com>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: rfi@lists.rocketboards.org
Cc: linux-mediatek@lists.infradead.org
Cc: linux-renesas-soc@vger.kernel.org
Cc: linux-rockchip@lists.infradead.org

Convert the Xilinx host bridge to use the common
pci_parse_request_of_pci_ranges().

There's no need to assign the resources to a temporary list first. Just
use bridge->windows directly and remove all the temporary list handling.
Signed-off-by: NRob Herring <robh@kernel.org>
Signed-off-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Andrew Murray <andrew.murray@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Michal Simek <michal.simek@xilinx.com>

If __get_free_pages() fails, return -ENOMEM to avoid a NULL pointer
dereference.
Signed-off-by: NKangjie Lu <kjlu@umn.edu>
Signed-off-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: NSteven Price <steven.price@arm.com>
Reviewed-by: NMukesh Ojha <mojha@codeaurora.org>

PCI host drivers have already matched on compatible strings, so checking
device_type is redundant. Also, device_type is considered deprecated for
FDT though we've still been requiring it for PCI hosts as it is useful
for finding PCI buses.
Signed-off-by: NRob Herring <robh@kernel.org>
[lorenzo.pieralisi@arm.com: reformatted the log]
Signed-off-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: NAlan Douglas <adouglas@cadence.com>
Acked-by: NSubrahmaya Lingappa <l.subrahmanya@mobiveil.co.in>
Acked-by: NMichal Simek <michal.simek@xilinx.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Alan Douglas <adouglas@cadence.com>
Cc: Subrahmanya Lingappa <l.subrahmanya@mobiveil.co.in>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: linux-pci@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org

The call to of_get_next_child() returns a node pointer with refcount
incremented thus it must be explicitly decremented here after the last
usage.

Fixes: 8961def5 ("PCI: xilinx: Add Xilinx AXI PCIe Host Bridge IP driver")
Signed-off-by: NNicholas Mc Guire <hofrat@osadl.org>
[lorenzo.pieralisi@arm.com: reworked commit log]
Signed-off-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>

Native PCI drivers for root complex devices were originally all in
drivers/pci/host/.  Some of these devices can also be operated in endpoint
mode.  Drivers for endpoint mode didn't seem to fit in the "host"
directory, so we put both the root complex and endpoint drivers in
per-device directories, e.g., drivers/pci/dwc/, drivers/pci/cadence/, etc.

These per-device directories contain trivial Kconfig and Makefiles and
clutter drivers/pci/.  Make a new drivers/pci/controllers/ directory and
collect all the device-specific drivers there.

No functional change intended.

Link: https://lkml.kernel.org/r/1520304202-232891-1-git-send-email-shawn.lin@rock-chips.comSigned-off-by: NShawn Lin <shawn.lin@rock-chips.com>
[bhelgaas: changelog]
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>

of_pci_get_host_bridge_resources() allocates the resource structures it
fills dynamically, but none of its callers care to release them so far.
Rather than requiring everyone to do this explicitly, convert the existing
function to a managed version.
Tested-by: NVladimir Zapolskiy <vladimir_zapolskiy@mentor.com>
Signed-off-by: NJan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
Reviewed-by: NVladimir Zapolskiy <vladimir_zapolskiy@mentor.com>
Acked-by: NJoao Pinto <jpinto@synopsys.com>
Acked-by: NJingoo Han <jingoohan1@gmail.com>
CC: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>

Another step towards a managed version of
of_pci_get_host_bridge_resources(): Feed in the underlying device, rather
than just the OF node.  This will allow us to use managed resource
allocation internally later on.
Tested-by: NVladimir Zapolskiy <vladimir_zapolskiy@mentor.com>
Signed-off-by: NJan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
Reviewed-by: NVladimir Zapolskiy <vladimir_zapolskiy@mentor.com>
Acked-by: NJingoo Han <jingoohan1@gmail.com>
CC: Joao Pinto <Joao.Pinto@synopsys.com>
CC: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>

The functions in linux/of_pci.h are primarily used by host bridge
drivers, so they can be private to drivers/pci/.

The remaining functions are still used mostly in host bridge drivers
that still live in arch specific code. Hopefully someday, those will get
moved into drivers/pci as well.
Signed-off-by: NRob Herring <robh@kernel.org>
Signed-off-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: NLinus Walleij <linus.walleij@linaro.org>
Acked-by: NJingoo Han <jingoohan1@gmail.com>

Add SPDX GPL-2.0+ to all PCI files that specified the GPL and allowed
either GPL version 2 or any later version.

Remove the boilerplate GPL version 2 or later language, relying on the
assertion in b2441318 ("License cleanup: add SPDX GPL-2.0 license
identifier to files with no license") that the SPDX identifier may be used
instead of the full boilerplate text.
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
Reviewed-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Rename xilinx_pcie_link_is_up() to xilinx_pcie_link_up() to follow the
convention of other drivers.  No functional change intended.
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
Reviewed-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: NMichal Simek <michal.simek@xilinx.com>

Fix various typos and whitespace errors:

  s/Synopsis/Synopsys/
  s/Designware/DesignWare/
  s/Keystine/Keystone/
  s/gpio/GPIO/
  s/pcie/PCIe/
  s/phy/PHY/
  s/confgiruation/configuration/

No functional change intended.
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>

The Xilinx AXI bridge for PCI Express device provides interrupts indicating
the completion of config space accesses. We have previously
enabled/unmasked them but do nothing with them besides acknowledge them.

Leave the interrupts masked in order to avoid servicing a large number of
pointless interrupts during boot.
Signed-off-by: NPaul Burton <paul.burton@imgtec.com>
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
Cc: Bharat Kumar Gogada <bharatku@xilinx.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Ravikiran Gummaluri <rgummal@xilinx.com>

The INTx & MSI interrupt decode paths duplicated a fair bit of common
functionality. They also strictly handled interrupts in order of INTx then
MSI, so if both types of interrupt were to be asserted simultaneously and
the MSI interrupt were first in the FIFO then the INTx code would read it &
ignore it before the MSI code then had to read it again, wasting the
original FIFO read.

Unify the INTx & MSI decode in order to reduce that duplication & allow a
single FIFO read to be performed for each interrupt regardless of its type.
Signed-off-by: NPaul Burton <paul.burton@imgtec.com>
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
Cc: Bharat Kumar Gogada <bharatku@xilinx.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Ravikiran Gummaluri <rgummal@xilinx.com>

The pcie-xilinx driver creates an IRQ domain of size 4 for legacy PCI INTx
interrupts, which at first glance seems reasonable since there are 4
possible such interrupts. Unfortunately the driver then proceeds to use the
range 1-4 as the hwirq numbers for INTA-INTD, causing warnings & broken
interrupts when attempting to use INTD/hwirq=4 due to it being beyond the
range of the IRQ domain:

  WARNING: CPU: 0 PID: 1 at kernel/irq/irqdomain.c:365
      irq_domain_associate+0x170/0x220
  error: hwirq 0x4 is too large for dummy
  Modules linked in:
  CPU: 0 PID: 1 Comm: swapper/0 Tainted: G        W
      4.12.0-rc5-00126-g19e1b3a10aad-dirty #427
  Stack : 0000000000000000 0000000000000004 0000000000000006 ffffffff8092c78a
          0000000000000061 ffffffff8018bf60 0000000000000000 0000000000000000
          ffffffff8088c287 ffffffff80811d18 a8000000ffc60000 ffffffff80926678
          0000000000000001 0000000000000000 ffffffff80887880 ffffffff80960000
          ffffffff80920000 ffffffff801e6744 ffffffff80887880 a8000000ffc4f8f8
          000000000000089c ffffffff8018d260 0000000000010000 ffffffff80811d18
          0000000000000000 0000000000000001 0000000000000000 0000000000000000
          0000000000000000 a8000000ffc4f840 0000000000000000 ffffffff8042cf34
          0000000000000000 0000000000000000 0000000000000000 0000000000040c00
          0000000000000000 ffffffff8010d1c8 0000000000000000 ffffffff8042cf34
          ...
  Call Trace:
  [<ffffffff8010d1c8>] show_stack+0x80/0xa0
  [<ffffffff8042cf34>] dump_stack+0xd4/0x110
  [<ffffffff8013ea98>] __warn+0xf0/0x108
  [<ffffffff8013eb14>] warn_slowpath_fmt+0x3c/0x48
  [<ffffffff80196528>] irq_domain_associate+0x170/0x220
  [<ffffffff80196bf0>] irq_create_mapping+0x88/0x118
  [<ffffffff801976a8>] irq_create_fwspec_mapping+0xb8/0x320
  [<ffffffff80197970>] irq_create_of_mapping+0x60/0x70
  [<ffffffff805d1318>] of_irq_parse_and_map_pci+0x20/0x38
  [<ffffffff8049c210>] pci_fixup_irqs+0x60/0xe0
  [<ffffffff8049cd64>] xilinx_pcie_probe+0x28c/0x478
  [<ffffffff804e8ca8>] platform_drv_probe+0x50/0xd0
  [<ffffffff804e73a4>] driver_probe_device+0x2c4/0x3a0
  [<ffffffff804e7544>] __driver_attach+0xc4/0xd0
  [<ffffffff804e5254>] bus_for_each_dev+0x64/0xa8
  [<ffffffff804e5e40>] bus_add_driver+0x1f0/0x268
  [<ffffffff804e8000>] driver_register+0x68/0x118
  [<ffffffff801001a4>] do_one_initcall+0x4c/0x178
  [<ffffffff808d3ca8>] kernel_init_freeable+0x204/0x2b0
  [<ffffffff80730b68>] kernel_init+0x10/0xf8
  [<ffffffff80106218>] ret_from_kernel_thread+0x14/0x1c

Fix this by making use of the new pci_irqd_intx_xlate() helper to translate
the INTx 1-4 range into the 0-3 range suitable for the IRQ domain of size
4, and stop adding 1 to the hwirq number decoded from the interrupt FIFO
which is already in the range 0-3.

Whilst we're here we switch to using PCI_NUM_INTX rather than the magic
number 4, making it clearer what the 4 means.
Signed-off-by: NPaul Burton <paul.burton@imgtec.com>
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
Cc: Bharat Kumar Gogada <bharatku@xilinx.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Ravikiran Gummaluri <rgummal@xilinx.com>

of_device_ids are not supposed to change at runtime.  All functions working
with of_device_ids provided by <linux/of.h> work with const of_device_ids.
So mark the non-const structs as const.

File size before:
   text	   data	    bss	    dec	    hex	filename
    195	    600	      0	    795	    31b	drivers/pci/host/pcie-xilinx.o

File size after constify xilinx_pcie_of_match:
   text	   data	    bss	    dec	    hex	filename
    595	    184	      0	    779	    30b	drivers/pci/host/pcie-xilinx.o
Signed-off-by: NArvind Yadav <arvind.yadav.cs@gmail.com>
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>

Since, through struct pci_host_bridge.map/swizzle_irq hooks, IRQs are now
allocated in the pci_assign_irq() callback automatically, PCI host bridge
drivers can stop relying on pci_fixup_irqs() for IRQ allocation.

Drop pci_fixup_irqs() usage from PCI xilinx host bridge driver.
Signed-off-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
Cc: Michal Simek <michal.simek@xilinx.com>

The introduction of pci_scan_root_bus_bridge() provides a PCI core API to
scan a PCI root bus backed by an already initialized struct pci_host_bridge
object, which simplifies the bus scan interface and makes the PCI scan root
bus interface easier to generalize as members are added to the struct
pci_host_bridge.

Convert PCI xilinx host code to pci_scan_root_bus_bridge() to improve the
PCI root bus scanning interface.
Signed-off-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
CC: Michal Simek <michal.simek@xilinx.com>

PCI configuration space should be mapped with a memory region type that
generates on the CPU host bus non-posted write transations. Update the
driver to use the devm_pci_remap_cfg* interface to make sure the correct
memory mappings for PCI configuration space are used.
Signed-off-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
Cc: Bharat Kumar Gogada <bharat.kumar.gogada@xilinx.com>
Cc: Michal Simek <michal.simek@xilinx.com>

Make sure PCIe MPS settings are valid when we enumerate a new hierarchy.
Based-on-patch-by: NJon Mason <jon.mason@broadcom.com>
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>

xilinx_pcie_assign_msi() doesn't use the struct xilinx_pcie_port pointer
passed to it, so remove the argument completely.  No functional change
intended.
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>

The xilinx driver never uses the platform drvdata pointer, so don't
bother setting it.  No functional change intended.
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>

Use a local "struct device *dev" for brevity and consistency with other
drivers.  No functional change intended.
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>

Dispose of virtual IRQ being created for MSI interrupts.
Signed-off-by: NBharat Kumar Gogada <bharatku@xilinx.com>
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
Acked-by: NMichal Simek <michal.simek@xilinx.com>

Kernel provides virtual IRQ number at teardown.  Get hwirq number from
virtual IRQ and clear correct MSI set bit.
Signed-off-by: NBharat Kumar Gogada <bharatku@xilinx.com>
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
Acked-by: NMichal Simek <michal.simek@xilinx.com>

The interrupt decode register is not being cleared if an invalid interrupt
arises.  Clear the decode register in this case.
Signed-off-by: NBharat Kumar Gogada <bharatku@xilinx.com>
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
Acked-by: NMichal Simek <michal.simek@xilinx.com>

When built with MSI support, the legacy domain reference was being
overwritten with MSI.

Create two separate domains for MSI and legacy interrupts.
Signed-off-by: NBharat Kumar Gogada <bharatku@xilinx.com>
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
Acked-by: NMichal Simek <michal.simek@xilinx.com>

Previously we only allowed device 0 to be directly attached to the root
port.  But SR-IOV devices may use non-zero device numbers for VFs.

Remove the restriction that only device 0 may be attached to a root port.

[bhelgaas: changelog]
Signed-off-by: NPo Liu <po.liu@nxp.com>
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>

This code is not being built as a module by anyone:

  drivers/pci/host/Kconfig:config PCIE_XILINX
  drivers/pci/host/Kconfig:  bool "Xilinx AXI PCIe host bridge support"

Remove uses of MODULE_DESCRIPTION(), MODULE_AUTHOR(), MODULE_LICENSE(),
etc., so that when reading the driver there is no doubt it is builtin-only.
The information is preserved in comments at the top of the file.

Note that for non-modular code, builtin_platform_driver() uses the same
init level priority as module_platform_driver(), so this doesn't change
init ordering.

[bhelgaas: changelog]
Signed-off-by: NPaul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
CC: Michal Simek <michal.simek@xilinx.com>
CC: "Sören Brinkmann" <soren.brinkmann@xilinx.com>

In xilinx_pcie_init_irq_domain(), the pattern used to check and return
error is:

   if (!var) {
      dev_err(...);
      return PTR_ERR(var);
   }

So the returned value in case of error is always 0, which means 'success'.
Change it to return -ENODEV instead.
Signed-off-by: NChristophe JAILLET <christophe.jaillet@wanadoo.fr>
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
Acked-by: NSören Brinkmann <soren.brinkmann@xilinx.com>

Request host bridge window resources so they appear in ioport_resource and
iomem_resource and are reflected in /proc/ioports and /proc/iomem.
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>

of_pci_get_host_bridge_resources() allocates a list of resources for host
bridge windows.  If we fail after allocating that list, free it before we
return error.
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>

The Xilinx AXI PCIe Host Bridge Soft IP driver was previously only
supported on ARM (in particular, on ARCH_ZYNC), and pci_fixup_irqs() is
available there.  But Microblaze will do IRQ fixup in pcibios_add_device(),
so pci_fixup_irqs() is not available on Microblaze.

Don't call pci_fixup_irqs() on Microblaze, so the driver can work on both
Zynq and Microblaze Architectures.

[bhelgaas: revise changelog to show similarity to bdb8a184 ("PCI: iproc: Call pci_fixup_irqs() for ARM64 as well as ARM")]
Signed-off-by: NBharat Kumar Gogada <bharatku@xilinx.com>
Signed-off-by: NRavi Kiran Gummaluri <rgummal@xilinx.com>
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
Reviewed-by: NArnd Bergmann <arnd@arndb.de>
Acked-by: NMichal Simek <michal.simek@xilinx.com>

The Xilinx PCIe host controller driver uses pci_common_init_dev(), which
is ARM-specific and requires the ARM struct hw_pci.  The part of
pci_common_init_dev() that is needed is limited and can be done here
without using hw_pci.

Create and scan the root bus directly without using the ARM
pci_common_init_dev() interface.

[bhelgaas: revise changelog to show similarity to 79953dd2 ("PCI: rcar: Remove dependency on ARM-specific struct hw_pci")]
Signed-off-by: NBharat Kumar Gogada <bharatku@xilinx.com>
Signed-off-by: NRavi Kiran Gummaluri <rgummal@xilinx.com>
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
Reviewed-by: NArnd Bergmann <arnd@arndb.de>
Acked-by: NMichal Simek <michal.simek@xilinx.com>

Use the new of_pci_get_host_bridge_resources() API in place of the PCI OF
DT parser.

[bhelgaas: revise changelog to show similarity to 0021d22b ("PCI: designware: Use of_pci_get_host_bridge_resources() to parse DT")]
Signed-off-by: NBharat Kumar Gogada <bharatku@xilinx.com>
Signed-off-by: NRavi Kiran Gummaluri <rgummal@xilinx.com>
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
Reviewed-by: NArnd Bergmann <arnd@arndb.de>
Acked-by: NMichal Simek <michal.simek@xilinx.com>

On -RT and if kernel is booting with "threadirqs" cmd line parameter,
PCIe/PCI (MSI) IRQ cascade handlers (like dra7xx_pcie_msi_irq_handler())
will be forced threaded and, as result, will generate warnings like this:

  WARNING: CPU: 1 PID: 82 at kernel/irq/handle.c:150 handle_irq_event_percpu+0x14c/0x174()
  irq 460 handler irq_default_primary_handler+0x0/0x14 enabled interrupts
  Backtrace:
   (warn_slowpath_common) from (warn_slowpath_fmt+0x38/0x40)
   (warn_slowpath_fmt) from (handle_irq_event_percpu+0x14c/0x174)
   (handle_irq_event_percpu) from (handle_irq_event+0x84/0xb8)
   (handle_irq_event) from (handle_simple_irq+0x90/0x118)
   (handle_simple_irq) from (generic_handle_irq+0x30/0x44)
   (generic_handle_irq) from (dra7xx_pcie_msi_irq_handler+0x7c/0x8c)
   (dra7xx_pcie_msi_irq_handler) from (irq_forced_thread_fn+0x28/0x5c)
   (irq_forced_thread_fn) from (irq_thread+0x128/0x204)

This happens because all of them invoke generic_handle_irq() from the
requested handler.  generic_handle_irq() grabs raw_locks and thus needs to
run in raw-IRQ context.

This issue was originally reproduced on TI dra7-evem, but, as was
identified during discussion [1], other hosts can also suffer from this
issue.  Fix all them at once by marking PCIe/PCI (MSI) IRQ cascade handlers
IRQF_NO_THREAD explicitly.

[1] http://lkml.kernel.org/r/1448027966-21610-1-git-send-email-grygorii.strashko@ti.com

[bhelgaas: add stable tag, fix typos]
Signed-off-by: NGrygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
Acked-by: Lucas Stach <l.stach@pengutronix.de> (for imx6)
CC: stable@vger.kernel.org
CC: Kishon Vijay Abraham I <kishon@ti.com>
CC: Jingoo Han <jingoohan1@gmail.com>
CC: Kukjin Kim <kgene@kernel.org>
CC: Krzysztof Kozlowski <k.kozlowski@samsung.com>
CC: Richard Zhu <Richard.Zhu@freescale.com>
CC: Thierry Reding <thierry.reding@gmail.com>
CC: Stephen Warren <swarren@wwwdotorg.org>
CC: Alexandre Courbot <gnurou@gmail.com>
CC: Simon Horman <horms@verge.net.au>
CC: Pratyush Anand <pratyush.anand@gmail.com>
CC: Michal Simek <michal.simek@xilinx.com>
CC: "Sören Brinkmann" <soren.brinkmann@xilinx.com>
CC: Sebastian Andrzej Siewior <bigeasy@linutronix.de>

ARM previously stored the msi_controller pointer in its sysdata, struct
pci_sys_data, and implemented pcibios_msi_controller() to retrieve it.
That made PCI host controller drivers specific to ARM because they had to
put the msi_controller pointer in the ARM-specific pci_sys_data.

There is now a generic mechanism, pci_scan_root_bus_msi(), for giving the
msi_controller pointer to the PCI core.  Use this for all ARM systems and
for the DesignWare and Xilinx PCI host controller drivers.

This removes an ARM dependency from the DesignWare, DRA7xx, EXYNOS, i.MX6,
Keystone, Layerscape, SPEAr13xx, and Xilinx drivers.

[bhelgaas: changelog, split into separate patch]
Suggested-by: NRussell King <linux@arm.linux.org.uk>
Signed-off-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
Acked-by: NJingoo Han <jingoohan1@gmail.com>
CC: Pratyush Anand <pratyush.anand@gmail.com>
CC: Arnd Bergmann <arnd@arndb.de>
CC: Simon Horman <horms@verge.net.au>
CC: Russell King <linux@arm.linux.org.uk>
CC: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
CC: Thierry Reding <thierry.reding@gmail.com>
CC: Michal Simek <michal.simek@xilinx.com>
CC: Marc Zyngier <marc.zyngier@arm.com>