This flag is a no-op now. Remove usage of the flag.
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>

This flag is a no-op now. Remove usage of the flag.
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>

Add DT binding documentation for lpc1850-creg-clk driver.
Signed-off-by: NJoachim Eastwood <manabian@gmail.com>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>

The CREG block on lpc18xx contains configuration register
for two low power clocks. Support enabling of these two
clocks with a clk driver that access CREG trough the
syscon regmap interface.

These clocks are needed to support peripherals like the
internal RTC on lpc18xx.
Signed-off-by: NJoachim Eastwood <manabian@gmail.com>
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>

Merge tag 'v4.6-rockchip-clk2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-next

Pull second batch of rockchip clk updates from Heiko Stuebner:

Inclusion of the rk3368 fractional dividers into our handling scheme,
fixes for missing error-handling in mmc-phase, inverters and cpu-clocks
and some more clock-ids.

* tag 'v4.6-rockchip-clk2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  clk: rockchip: include downstream muxes into fractional dividers on rk3368
  clk: rockchip: set the clock ids for RK3228 HDMI
  clk: rockchip: set the clock ids for RK3228 VOP
  clk: rockchip: add the tsadc clocks found on rk3228 SoCs
  clk: rockchip: add the new clock ids for RK3228 HDMI
  clk: rockchip: add the new clock ids for RK3228 VOP
  clk: rockchip: add id of the tsadc clock found on rk3228 SoCs
  clk: rockchip: fix coding style for clk-cpu.c
  clk: rockchip: don't return NULL when registering mmc branch fails
  clk: rockchip: don't return NULL when registering inverter fails
  clk: rockchip: check grf when waiting pll lock
  clk: rockchip: disable alt_parent clk in err cases when registering cpuclk

Remove the following false positives compilation warning:
- drivers/clk/nxp/clk-lpc32xx.c: In function 'lpc32xx_clk_register':
  warning: 'hw' may be used uninitialized in this function [-Wmaybe-uninitialized]
- drivers/clk/nxp/clk-lpc32xx.c: In function 'clk_hclk_pll_round_rate':
  warning: 'p' may be used uninitialized in this function [-Wmaybe-uninitialized]
  warning: 'n' may be used uninitialized in this function [-Wmaybe-uninitialized]
  warning: 'm' may be used uninitialized in this function [-Wmaybe-uninitialized]

Tested using gcc version 4.7.3.
Signed-off-by: NSylvain Lemieux <slemieux@tycoint.com>
[sboyd@codeaurora.org: Drop assignment of hw to NULL as return
silences it and is less likely to lead to hiding problems later]
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>

In the initial fix for non-zero divider shift value, the parenthesis
was missing after the negate operation. This patch adds the required
parenthesis. Otherwise, lower bits may be cleared unintentionally.
Signed-off-by: NLoc Ho <lho@apm.com>
Acked-by: NToan Le <toanle@apm.com>
Fixes: 1382ea63 ("clk: xgene: Fix divider with non-zero shift value")
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>

This flag is a no-op now. Remove usage of the flag.
Acked-by: NJassi Brar <jaswinder.singh@linaro.org>
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>

This driver is a clk provider and not a clk consumer, so remove
the clk.h include. Also, drop clkdev.h because there's not clkdev
usage here either.
Acked-by: NMika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>

This flag is a no-op now. Remove usage of the flag.
Acked-by: NMika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>

This flag is a no-op now. Remove usage of the flag.
Acked-by: NGregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>

This is part of an ongoing process to migrate from ARCH_SHMOBILE to
ARCH_RENESAS the motivation for which being that RENESAS seems to be a more
appropriate name than SHMOBILE for the majority of Renesas ARM based SoCs.

Along with the above mentioned Kconfig changes it seems appropriate
to also rename directories that only hold drivers for such SoCs.
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
Acked-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>

Merge branch 'clk-shmobile-for-v4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-next

Pull shmobile clk updates from Geert Uytterhoeven:

   - Fix a bug in the div6 clock driver that was exposed by CAN
     support on R-Car H3,
   - Add more module clocks for R-Car H3.

* 'clk-shmobile-for-v4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers:
  clk: shmobile: r8a7795: Add CAN FD peripheral clock
  clk: shmobile: r8a7795: Add CANFD clock
  clk: shmobile: r8a7795: Add CAN peripheral clock
  clk: shmobile: div6: Fix .recalc_rate() using a stale divisor
  clk: shmobile: r8a7795: Add LVDS module clock
  clk: shmobile: r8a7795: Add FCP clocks

This flag is a no-op now. Remove usage of the flag.

Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Cc: Guenter Roeck <linux@roeck-us.net>
Reviewed-by: NSören Brinkmann <soren.brinkmann@xilinx.com>
Cc: Mike Looijmans <mike.looijmans@topic.nl>
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>

This flag is a no-op now. Remove usage of the flag.
Acked-by: NSudeep Holla <sudeep.holla@arm.com>
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>

This flag is a no-op now. Remove usage of the flag.
Acked-by: NAndi Shyti <andi.shyti@samsung.com>
Cc: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>

This flag is a no-op now. Remove usage of the flag.
Acked-by: NPhilipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>

This flag is a no-op now. Remove usage of the flag.
Acked-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>

This flag is a no-op now. Remove usage of the flag.
Reviewed-by: NSören Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>

This flag is a no-op now. Remove usage of the flag.
Acked-by: NUlf Hansson <ulf.hansson@linaro.org>
Cc: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>

This flag is a no-op now. Remove usage of the flag.
Acked-by: NTero Kristo <t-kristo@ti.com>
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>

This flag is a no-op now. Remove usage of the flag.
Acked-by: NRhyland Klein <rklein@nvidia.com>
Acked-by: NThierry Reding <treding@nvidia.com>
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>

This flag is a no-op now. Remove usage of the flag.
Acked-by: NViresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>

This flag is a no-op now. Remove usage of the flag.
Acked-by: NSylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>

This flag is a no-op now. Remove usage of the flag.
Acked-by: NRobert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>

This flag is a no-op now. Remove usage of the flag.
Acked-by: NJoachim Eastwood <manabian@gmail.com>
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>

This flag is a no-op now. Remove usage of the flag.
Acked-by: NShawn Guo <shawnguo@kernel.org>
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>

This flag is a no-op now. Remove usage of the flag.
Acked-by: NShawn Guo <shawnguo@kernel.org>
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>

This flag is a no-op now. Remove usage of the flag.
Acked-by: NJames Liao <jamesjj.liao@mediatek.com>
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>

This flag is a no-op now. Remove usage of the flag.
Tested-by: NLeo Yan <leo.yan@linaro.org>
Cc: Bintian Wang <bintian.wang@huawei.com>
Cc: Zhangfei Gao <zhangfei.gao@linaro.org>
Cc: Haojian Zhuang <haojian.zhuang@gmail.com>
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>

This flag is a no-op now. Remove usage of the flag.
Acked-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>

This flag is a no-op now. Remove usage of the flag.

Cc: Lee Jones <lee@kernel.org>
Reviewed-by: NEric Anholt <eric@anholt.net>
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>

Merge tag 'imx-clk-4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into clk-next

Pull i.MX clk updates from Shawn Guo:

The i.MX clock update for 4.6:
- Add the clock driver support for the latest i.MX6 family SoCs
  addition - i.MX6QP.
- Clean up the whitespace in i.MX6UL clock driver and add the missing
  KPP clock.
- Correct pwm7 clock name in i.MX6UL clock driver.

* tag 'imx-clk-4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  clk: imx: add kpp clock for i.MX6UL
  clk: imx: whitespace cleanup; no functional change
  clk: imx: correct pwm7 clock name in driver for i.MX6UL
  clk: imx: Add clock support for imx6qp

Merge tag 'sunxi-clocks-for-4.6' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into clk-next

Pull Allwinner clk updates from Maxime Ripard:

Allwinner clocks additions for 4.6

A bunch of things, mostly:
  - Finally switched everything over to OF_CLK_DECLARE, which should remove
    orphans clocks entirely
  - Reworked the clk-factors to be able to add new parameters
  - Improved the error reporting
  - A bunch of new clocks for new SoCs.

* tag 'sunxi-clocks-for-4.6' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux: (25 commits)
  clk: sunxi: Add apb0 gates for H3
  clk: sunxi: Improve divs_clk error handling and reporting
  clk: sunxi: improve divider_clk error handling and reporting
  clk: sunxi: improve mux_clk error handling and reporting
  clk: sunxi: Fix sun8i-a23-apb0-clk divider flags
  clk: sunxi: Remove clk_register_clkdev calls
  clk: sunxi: Remove old probe and protection code
  clk: sunxi: convert current clocks registration to CLK_OF_DECLARE
  clk: sunxi: Make clocks setup functions take const pointer
  clk: sunxi: Make clocks setup functions return their clock
  clk: sunxi: improve error reporting for the mux clock
  clk: sunxi: don't mark sun6i_ar100_data __initconst
  clk: sunxi: add bus gates for A83T
  clk: sunxi: Add apb0 gates for A83T
  clk: sunxi: rewrite sun8i-a23-mbus-clk using the simpler composite clk
  clk: sunxi: rewrite sun6i-ar100 using factors clk
  clk: sunxi: rewrite sun6i-a31-ahb1-clk using factors clk with custom recalc
  clk: sunxi: factors: Drop round_rate from clk ops
  clk: sunxi: factors: Support custom formulas
  clk: sunxi: factors: Consolidate get_factors parameters into a struct
  ...

The offset seems to have been copied from the sata clk. Fix it so
that enabling the crypto engine source clk works.
Tested-by: NSrinivas Kandagatla <srinivas.kandagatla@linaro.org>
Tested-by: NBjorn Andersson <bjorn.andersson@linaro.org>
Fixes: 5f775498 ("clk: qcom: Fully support apq8064 global clock control")
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>

Conflicts:
	drivers/clk/Kconfig

drivers/clk/ti/clk-814x.c:34:12: warning: symbol 'dm814x_adpll_early_init' was not declared. Should it be static?
drivers/clk/ti/clk-814x.c:58:12: warning: symbol 'dm814x_adpll_enable_init_clocks' was not declared. Should it be static?
drivers/clk/ti/adpll.c:465 ti_adpll_recalc_rate() warn: should '__readw(d->regs + 20) << 18' be a 64 bit type?
drivers/clk/ti/adpll.c:945 ti_adpll_probe() error: we previously assumed 'd->clocks' could be null (see line 921)

The last one looks like a real bug because we don't return an
error on allocation failure.

Cc: Tero Kristo <t-kristo@ti.com>
Tested-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>

The arch independent drivers can be build testeed with
COMPILE_TEST. Let's allow that for drivers/clk/ti.
Signed-off-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NMichael Turquette <mturquette@baylibre.com>

On dm814x we have 13 ADPLLs with 3 to 4 outputs on each. The
ADPLLs have several dividers and muxes controlled by a shared
control register for each PLL.

Note that for the clocks to work as device drivers for booting on
dm814x, this patch depends on "ARM: OMAP2+: Change core_initcall
levels to postcore_initcall" that has already been merged.

Also note that this patch does not implement clk_set_rate for the
PLL, that will be posted later on when available.

Cc: Stephen Boyd <sboyd@codeaurora.org>
Acked-by: NTero Kristo <t-kristo@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NMichael Turquette <mturquette@baylibre.com>

The clk_rcg_pixel_set_rate clk_op sets up the pre-divider by reading
its current value from the NS register.

Using the pre-divider wasn't really intended when creating these ops.
The pixel RCG was only intended to achieve fractional multiplication
provided in the pixel_table array. Leaving the pre-divider to the
existing register value results in a wrong pixel clock when the
bootloader sets up the display. This was left unidentified because
the IFC6410 Plus board on which this was verified didn't have a
bootloader that configured the display.

Don't set the RCG pre-divider in freq_tbl to the existing NS register
value. Force it to 1 and only use the M/N counter to achieve the desired
fractional multiplication.

Cc: Vinay Simha <vinaysimha@inforcecomputing.com>
Signed-off-by: NArchit Taneja <architt@codeaurora.org>
Tested-by: NJohn Stultz <john.stultz@linaro.org>
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>