1. 22 11月, 2012 3 次提交
  2. 22 9月, 2012 1 次提交
  3. 19 4月, 2012 1 次提交
  4. 25 2月, 2012 1 次提交
  5. 28 11月, 2011 1 次提交
  6. 01 11月, 2011 1 次提交
  7. 23 1月, 2011 1 次提交
    • P
      USB: ehci-fsl: Fix 'have_sysif_regs' detection · cc604ddd
      Peter Tyser 提交于
      Previously a check was done on an ID register at the base of a CPU's
      internal USB registers to determine if system interface regsiters were
      present.  The check looked for an ID register that had the format
      ID[0:5] == ~ID[8:13] as described in the MPC5121 User's Manual to
      determine if a MPC5121 or MPC83xx/85xx was being used.
      
      There are two issues with this method:
      - The ID register is not defined on the MPC83xx/85xx CPUs, so its
        unclear what is being checked on them.
      - Newer CPUs such as the P4080 also don't document the ID register, but
        do share the same format as the MPC5121.  Thus the previous code did
        not set 'have_sysif_regs' properly which results in the P4080 not
        properly initializing its USB ports.
      
      Using the device tree 'compatible' node is a cleaner way to determine if
      'have_sysif_regs' should be set and resolves the USB initialization issue
      seen on the P4080.
      
      Tested on a P4080-based system and compile tested on mpc512x_defconfig
      with Freescale EHCI driver enabled.
      
      Cc: Anatolij Gustschin <agust@denx.de>
      Cc: David Brownell <dbrownell@users.sourceforge.net>
      Cc: Kumar Gala <galak@kernel.crashing.org>
      Cc: linuxppc-dev@lists.ozlabs.org
      Signed-off-by: NPeter Tyser <ptyser@xes-inc.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      cc604ddd
  8. 23 10月, 2010 2 次提交
    • A
      USB: add USB EHCI support for MPC5121 SoC · 230f7ede
      Anatolij Gustschin 提交于
      Extends FSL EHCI platform driver glue layer to support
      MPC5121 USB controllers. MPC5121 Rev 2.0 silicon EHCI
      registers are in big endian format. The appropriate flags
      are set using the information in the platform data structure.
      MPC83xx system interface registers are not available on
      MPC512x, so the access to these registers is isolated in
      MPC512x case. Furthermore the USB controller clocks
      must be enabled before 512x register accesses which is
      done by providing platform specific init callback.
      
      The MPC512x internal USB PHY doesn't provide supply voltage.
      For boards using different power switches allow specifying
      DRVVBUS and PWR_FAULT signal polarity of the MPC5121 internal
      PHY using "fsl,invert-drvvbus" and "fsl,invert-pwr-fault"
      properties in the device tree USB nodes. Adds documentation
      for this new device tree bindings.
      Signed-off-by: NAnatolij Gustschin <agust@denx.de>
      Cc: Grant Likely <grant.likely@secretlab.ca>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      230f7ede
    • A
      USB: add platform glue driver for FSL USB DR controller · 126512e3
      Anatolij Gustschin 提交于
      Replace FSL USB platform code by simple platform driver for
      creation of FSL USB platform devices.
      
      The driver creates platform devices based on the information
      from USB nodes in the flat device tree. This is the replacement
      for old arch fsl_soc usb code removed by this patch. The driver
      uses usual of-style binding, available EHCI-HCD and UDC
      drivers can be bound to the created devices. The new of-style
      driver additionaly instantiates USB OTG platform device, as the
      appropriate USB OTG driver will be added soon.
      Signed-off-by: NAnatolij Gustschin <agust@denx.de>
      Cc: Kumar Gala <galak@kernel.crashing.org>
      Cc: Grant Likely <grant.likely@secretlab.ca>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      126512e3