- 24 4月, 2019 1 次提交
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由 Geert Uytterhoeven 提交于
- Replace explicit clock handling by Runtime PM calls, - Streamline Runtime PM handling in error paths, - Enable Runtime PM in .probe(), - Disable Runtime PM in .remove(), - Make sure the device is runtime-resumed when disabling interrupts in .remove(). Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: NNiklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Tested-by: NChris Brandt <chris.brandt@renesas.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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- 16 4月, 2019 14 次提交
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由 Fabien Parent 提交于
Add binding documentation of i2c-mtk for MT8516 SoC. Signed-off-by: NFabien Parent <fparent@baylibre.com> Acked-by: NRob Herring <robh@kernel.org> Acked-by: NMatthias Brugger <matthias.bgg@gmail.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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Some recent commits to this driver were trying to make sure the TSS interrupt is not generated on busy system due to 25ms timer expiring between commands. It can still happen, however if STOP command is not issued on time at the end of the transmission. If wait_for_completion in axxia_i2c_xfer_msg() would not return after 25ms of getting an interrupt, TSS will be generated and idev->err_msg will be set to -ETIMEDOUT which will be returned from the axxia_i2c_xfer_msg(), even though the transfer did actually succeed (STOP is automatically issued when TSS triggers). Fortunately, apart from already used manual and sequence commands, the controller also has so called auto command. It works just like manual mode but it but an automatic STOP is issued when either transfer length is met or NAK is received from slave device. This patch changes the axxia_i2c_xfer_msg() function so that auto command is used for last message in transaction letting hardware manage issuing STOP. TSS is disabled just after command transferring last message finishes. Auto command, just like sequence, ends with SS interrupt instead of SNS so handling of both had to be unified. The axxia_i2c_stop() is no longer needed as the transfer can only end with following conditions: - fully successful - then last message was send by AUTO command and STOP was issued automatically - NAK received - STOP is issued automatically by controller - arbitration lost - STOP should not be issued as we don't control the bus - IP interrupt received - this is sent when transfer length is set to 0 for auto/sequence command. The check for that is done before START is send so no STOP is required - TSS received between commands - STOP is issued by the controller Signed-off-by: NKrzysztof Adamski <krzysztof.adamski@nokia.com> Reviewed-by: NAlexander Sverdlin <alexander.sverdlin@nokia.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Wolfram Sang 提交于
If switching GPIOs does not sleep, then we can support atomic transfers. Signed-off-by: NWolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: NLinus Walleij <linus.walleij@linaro.org> Reviewed-by Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Wolfram Sang 提交于
Use the new xfer_atomic callback to check a newly introduced flag to whitelist atomic transfers. This will report configurations which worked accidently. Signed-off-by: NWolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Wolfram Sang 提交于
Use the new callback to reject atomic transfers. Signed-off-by: NWolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Wolfram Sang 提交于
The driver already has the routine in place, tie it to the new callback. Signed-off-by: NWolfram Sang <wsa+renesas@sang-engineering.com> Cc: Andrew Lunn <andrew@lunn.ch> Reviewed-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Wolfram Sang 提交于
By properly setting up the algorithm at probe time, we can skip the check at every transfer. This allows us to get rid of the flags completely. Signed-off-by: NWolfram Sang <wsa+renesas@sang-engineering.com> Cc: Andrew Lunn <andrew@lunn.ch> Acked-by: NPeter Korsgaard <peter@korsgaard.com> Reviewed-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Wolfram Sang 提交于
The driver did handle this internally, convert it to use the new callbacks. Reviewed-by: NTimo Alho <talho@nvidia.com> Acked-by: NThierry Reding <treding@nvidia.com> Reviewed-by: NSimon Horman <horms+renesas@verge.net.au> Signed-off-by: NWolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Wolfram Sang 提交于
Add the master_xfer_atomic hook to enable i2c transactions in irq disabled contexts like the poweroff case. Signed-off-by: NTero Kristo <t-kristo@ti.com> Signed-off-by: NKeerthy <j-keerthy@ti.com> [wsa: simplified code a little: 'timeout = !ret'] Reviewed-by: NSimon Horman <horms+renesas@verge.net.au> Signed-off-by: NWolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Wolfram Sang 提交于
If the parent has an atomic callback, we need to translate it the same way as the non-atomic callback. Signed-off-by: NWolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Wolfram Sang 提交于
If the parent adapter has atomic_xfer callbacks, populate them for the mux adapter as well. We can use the same translation function as for the non-atomic xfer callback. Signed-off-by: NWolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: NPeter Rosin <peda@axentia.se> Reviewed-by Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Wolfram Sang 提交于
We had the request to access devices very late when interrupts are not available anymore multiple times now. Mostly to prepare shutdown or reboot. Allow adapters to specify a specific callback for this case. Note that we fall back to the generic {master|smbus}_xfer callback if this new atomic one is not present. This is intentional to preserve the previous behaviour and avoid regressions. Because there are drivers not using interrupts or because it might have worked "accidently" before. Signed-off-by: NWolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by Andy Shevchenko <andriy.shevchenko@linux.intel.com> Tested-by: NStefan Lengfeld <contact@stefanchrist.eu> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Wolfram Sang 提交于
If I2C transfers are executed in atomic contexts, trylock is used instead of lock. This behaviour was missing for SMBUS, although a lot of transfers are of SMBUS type, either emulated or direct. So, factor out the locking routine into a helper and use it for I2C and SMBUS. Signed-off-by: NWolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Wolfram Sang 提交于
Commit cea443a8 ("i2c: Support i2c_transfer in atomic contexts") added in_atomic() to the I2C core. However, the use of in_atomic() outside of core kernel code is discouraged and was already[1] when this code was added in early 2008. The above commit was a preparation for commit b7a36701 ("i2c-pxa: Add polling transfer"). Its commit message says explicitly it was added "for cases where I2C transactions have to occur at times interrup[t]s are disabled". So, the intention was 'disabled interrupts'. This matches the use cases for atomic I2C transfers I have seen so far: very late communication (mostly to a PMIC) to powerdown or reboot the system. For those cases, interrupts are disabled then. It doesn't seem that in_atomic() adds value. After a discussion with Peter Zijlstra[2], we came up with a better set of conditionals to match the use case. The I2C core will soon gain an extra callback into bus drivers especially for atomic transfers to make them more generic. The code deciding which transfer to use (atomic/non-atomic) should mimic the behaviour which locking to use (trylock/lock). This is why we add a helper for it. [1] https://lwn.net/Articles/274695/ [2] http://patchwork.ozlabs.org/patch/1067437/Signed-off-by: NWolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by Andy Shevchenko <andriy.shevchenko@linux.intel.com> Tested-by: NStefan Lengfeld <contact@stefanchrist.eu> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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- 15 4月, 2019 6 次提交
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由 Wolfram Sang 提交于
No further occurences in the driver. Fixes: dd1aa252 ("i2c: brcmstb: Add Broadcom settop SoC i2c controller driver") Signed-off-by: NWolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Qii Wang 提交于
Add i2c compatible for MT8183. Compare to MT2712 i2c controller, MT8183 has different register offsets. Ltiming_reg is added to adjust low width of SCL. Arb clock and dma_sync are needed. Signed-off-by: NQii Wang <qii.wang@mediatek.com> Reviewed-by: NNicolas Boichat <drinkcat@chromium.org> Reviewed-by: NMatthias Brugger <matthias.bgg@gmail.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Qii Wang 提交于
When i2c and apdma use different source clocks, we should enable synchronization between them. Signed-off-by: NQii Wang <qii.wang@mediatek.com> Reviewed-by: NNicolas Boichat <drinkcat@chromium.org> Reviewed-by: NMatthias Brugger <matthias.bgg@gmail.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Qii Wang 提交于
When two i2c controllers are internally connected to the same GPIO pins, the arb clock is needed to ensure that the waveforms do not interfere with each other. And we also need to enable the interrupt to find arb lost, old i2c controllers also have the bit. Signed-off-by: NQii Wang <qii.wang@mediatek.com> Reviewed-by: NNicolas Boichat <drinkcat@chromium.org> Reviewed-by: NMatthias Brugger <matthias.bgg@gmail.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Qii Wang 提交于
Add MT8183 i2c binding to binding file. Compare to MT2712 i2c controller, MT8183 has different registers, offsets, and clock. Signed-off-by: NQii Wang <qii.wang@mediatek.com> Reviewed-by: NRob Herring <robh@kernel.org> Reviewed-by: NMatthias Brugger <matthias.bgg@gmail.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Qii Wang 提交于
New i2c registers would have different offsets, so we use different offsets array to distinguish different i2c registers version. Signed-off-by: NQii Wang <qii.wang@mediatek.com> Reviewed-by: NMatthias Brugger <matthias.bgg@gmail.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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- 04 4月, 2019 10 次提交
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由 Bjorn Helgaas 提交于
Commit 54fb4a05 ("i2c: Check for ACPI resource conflicts") included <linux/acpi.h> so we could use acpi_check_region(). Commit fd46a006 ("i2c: convert i2c-isch to platform_device") removed the use of acpi_check_region() but not the include. Remove the now-unnecessary include of <linux/acpi.h>. No functional change intended. Fixes: fd46a006 ("i2c: convert i2c-isch to platform_device") Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Reviewed-by: NJean Delvare <jdelvare@suse.de> Reviewed-by: NMukesh Ojha <mojha@codeaurora.org> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Dan Carpenter 提交于
"res" can't be NULL because it's a pointer to somewhere in the middle of the "adev" struct. Also probe() succeeded so there is no need to check here. Signed-off-by: NDan Carpenter <dan.carpenter@oracle.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Rayagonda Kokatanur 提交于
Add NIC I2C support to the iProc I2C driver. Access to the NIC I2C base registers requires going through the IDM wrapper to map into the NIC's address space Signed-off-by: NRayagonda Kokatanur <rayagonda.kokatanur@broadcom.com> Signed-off-by: NRay Jui <ray.jui@broadcom.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Rayagonda Kokatanur 提交于
Update iProc I2C binding document to add new compatible string "brcm,iproc-nic-i2c". Optional property "brcm,ape-hsls-addr-mask" is also added that allows configuration of the host view into the APE's address for "brcm,iproc-nic-i2c" Signed-off-by: NRayagonda Kokatanur <rayagonda.kokatanur@broadcom.com> Signed-off-by: NRay Jui <ray.jui@broadcom.com> Reviewed-by: NRob Herring <robh@kernel.org> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Rayagonda Kokatanur 提交于
Use the following wrapper for read/write access of iProc i2c registers: u32 iproc_i2c_rd_reg(struct bcm_iproc_i2c_dev *iproc_i2c, u32 offset) void iproc_i2c_wr_reg(struct bcm_iproc_i2c_dev *iproc_i2c, u32 offset, u32 val) This preps the driver for support of indirect register access required by certain SoCs with this iProc I2C block integrated Signed-off-by: NRayagonda Kokatanur <rayagonda.kokatanur@broadcom.com> Signed-off-by: NRay Jui <ray.jui@broadcom.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Rayagonda Kokatanur 提交于
Add polling support to the iProc I2C driver. Polling mode is activated when the driver fails to obtain an interrupt ID from device tree Signed-off-by: NRayagonda Kokatanur <rayagonda.kokatanur@broadcom.com> Signed-off-by: NRay Jui <ray.jui@broadcom.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Ray Jui 提交于
Update the binding document to make the 'interrupts' property optional. For certain revisions of the I2C controller (e.g., iProc NIC I2C), I2C interrupt is unwired to the interrupt controller. In such case, this 'interrupts' property should be left unspecified, and driver will fall back to polling mode Signed-off-by: NRay Jui <ray.jui@broadcom.com> Signed-off-by: NRayagonda Kokatanur <rayagonda.kokatanur@broadcom.com> Reviewed-by: NRob Herring <robh@kernel.org> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Michael Cheng 提交于
Add support for more master error status including FIFO underrun and RX FIFO full Signed-off-by: NMichael Cheng <ccheng@broadcom.com> Signed-off-by: NRay Jui <ray.jui@broadcom.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Shreesha Rajashekar 提交于
Add slave mode support to the iProc I2C driver. Signed-off-by: NRayagonda Kokatanur <rayagonda.kokatanur@broadcom.com> Signed-off-by: NMichael Cheng <ccheng@broadcom.com> Signed-off-by: NShreesha Rajashekar <shreesha.rajashekar@broadcom.com> Signed-off-by: NRay Jui <ray.jui@broadcom.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Shreesha Rajashekar 提交于
Add support to allow I2C master read transfer up to 255 bytes. Signed-off-by: NShreesha Rajashekar <shreesha@broadcom.com> Signed-off-by: NRayagonda Kokatanur <rayagonda.kokatanur@broadcom.com> Signed-off-by: NRay Jui <ray.jui@broadcom.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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- 27 3月, 2019 2 次提交
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由 Wolfram Sang 提交于
Signed-off-by: NWolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: NSimon Horman <horms+renesas@verge.net.au> Reviewed-by: NAndy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Andy Shevchenko 提交于
Instead of using custom variables and parser, convert the driver to use the ones provided by I2C core. No functional change intended. Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: NLudovic Desroches <ludovic.desroches@microchip.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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- 25 3月, 2019 6 次提交
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由 Elie Morisse 提交于
MP2 controllers have two separate busses, so may accommodate up to two I2C adapters. Those adapters are listed in the ACPI namespace with the "AMDI0011" HID, and probed by a platform driver. Communication with the MP2 takes place through MMIO registers, or through DMA for more than 32 bytes transfers. This is major rework of the patch submitted by Nehal-bakulchandra Shah from AMD (https://patchwork.kernel.org/patch/10597369/). Most of the event handling of v3 was rewritten to make it work with more than one bus (e.g on Ryzen-based Lenovo Yoga 530), and this version contains many other improvements. Signed-off-by: NElie Morisse <syniurge@gmail.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Bich HEMON 提交于
Add STM32H7 and STM32MP1 in the list of compatible socs for each optional property. Signed-off-by: NBich Hemon <bich.hemon@st.com> Reviewed-by: NPierre-Yves MORDRET <pierre-yves.mordret@st.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Bich HEMON 提交于
Remove extra spaces before colons. Signed-off-by: NBich Hemon <bich.hemon@st.com> Reviewed-by: NPierre-Yves MORDRET <pierre-yves.mordret@st.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Juergen Fitschen 提交于
Slave mode driver is based on the concept of i2c-designware driver. Signed-off-by: NJuergen Fitschen <me@jue.yt> [ludovic.desroches@microchip.com: rework Kconfig and replace IS_ENABLED by defined] Signed-off-by: NLudovic Desroches <ludovic.desroches@microchip.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Juergen Fitschen 提交于
The single file i2c-at91.c has been split into core code (i2c-at91-core.c) and master mode specific code (i2c-at91-master.c). This should enhance maintainability and reduce ifdeffery for slave mode related code. The code itself hasn't been touched. Shared functions only had to be made non-static. Furthermore, includes have been cleaned up. Signed-off-by: NJuergen Fitschen <me@jue.yt> [ludovic.desroches@microchip.com: fix checkpatch errors and use SPDX] Signed-off-by: NLudovic Desroches <ludovic.desroches@microchip.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Juergen Fitschen 提交于
In order to implement slave mode support for the at91 hardware we have to segregate all master mode specific function parts from the general parts. The upcoming slave mode patch will call its sepcific probe resp. init function instead of the master mode functions after the shared general code has been executed. This concept has been influenced by the i2c-designware driver. Signed-off-by: NJuergen Fitschen <me@jue.yt> Signed-off-by: NLudovic Desroches <ludovic.desroches@microchip.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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- 21 3月, 2019 1 次提交
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由 Wolfram Sang 提交于
When sending with DMA, the driver transfers the first byte with PIO (as documented). However, it started DMA right after the first byte was written. This worked, but was not according to the datasheet which suggests to wait until data register was empty again. Implement this. Signed-off-by: NWolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: NSimon Horman <horms+renesas@verge.net.au> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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