1. 24 10月, 2012 4 次提交
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      drm/i915/eDP: compute the panel power clock divisor from the pch rawclock · d2acd215
      Daniel Vetter 提交于
      We need this when the bios forgets even to set that bit up. Most seem
      to do that, even when they don't set up anything else in the panel
      power sequencer.
      
      Note that on IBX the rawclk is variable according to Bspec, but
      everyone is using 125MHz. The rawclk is fixed to 125MHz on CPT, but
      luckily we still have the same register available. On hsw, different
      variants have different clocks, hence we need to check the register.
      
      Since other pieces are driven by the rawclock, too, keep the little
      helper in a central place.
      Reviewed-by: NJesse Barnes <jbarnes@virtuousgeek.org>
      Tested-by: NPaulo Zanoni <paulo.r.zanoni@intel.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      d2acd215
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      drm/i915: enable/disable backlight for eDP · 035aa3de
      Daniel Vetter 提交于
      Like we already do for the LVDS panels. This seems to help greatly
      in setting up the backlight, since the BIOS might refuse to cooperate.
      Reviewed-by: NJesse Barnes <jbarnes@virtuousgeek.org>
      Tested-by: NPaulo Zanoni <paulo.r.zanoni@intel.com>
      
      v2: Move the backlight_off call from panel_off to edp_backlight_off,
      noticed by Paulo Zanoni.
      Reviewed-by: NPaulo Zanoni <przanoni@gmail.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      035aa3de
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      drm/i915: make edp panel power sequence setup more robust · 82ed61fa
      Daniel Vetter 提交于
      3 changes:
      - If a given value is unset, use the maximal limits from the eDP spec.
      - Write back the new values, since otherwise the panel power sequencing
        hw will not dtrt.
      - Revert the early bail-out in case the register values are unset.
      
      The last change reverts
      
      commit bfa3384a
      Author: Jesse Barnes <jbarnes@virtuousgeek.org>
      Date:   Tue Apr 10 11:58:04 2012 -0700
      
          drm/i915: check PPS regs for sanity when using eDP
      
      v2:
      - Unlock the PP regs as the very first thing. This is a required w/a
        for cpu eDP on port A, and generally a good idea.
      - Fixup the panel power control port selection bits.
      
      v3: Paulo Zanoni noticed that I've fumbled the computation of the spec
      limit values. Fix them up. We've also noticed that the t8/t9 values in
      the vbt/bios-programmed pp are much larger than any limits. My guess
      is that this is to conceal any backlight enable/disable delays. So by
      using the much shorter limits from the spec, which only concerns the
      sink, we risk that we might display before the backlight is fully on,
      or disable the output while the backlight still has afterglow. I've
      figured I don't care too much, since this will only happen when both
      the pp regs are not programmed, and the vbt tables don't contain
      anything useful.
      
      v4: Don't set the port selection bits on hsw/LPT, they don't exist any
      more.
      
      v5: Fixup spelling issues in comments, as noticed by Jesse Barnes.
      Reviewed-by: NJesse Barnes <jbarnes@virtuousgeek.org>
      Tested-by: NPaulo Zanoni <paulo.r.zanoni@intel.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      82ed61fa
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      drm/i915: Don't try to use SPR_SCALE when we don't have a sprite scaler · 2d354c34
      Damien Lespiau 提交于
      Haswell does not have a scaler in the sprite pipeline anymore, so let's
      ensure:
        1/ We bail out of update_plate() when someone is trying to ask to
           display a scaled framebuffer,
        2/ We never write to the nonexistent SPR_SCALE register
      
      v2: Smash in the fixup from Damien in the disable_plane function.
      
      Signed-off-by: Damien Lespiau <damien.lespiau@intel.com> (for v1)
      Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> (for v1)
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      2d354c34
  2. 23 10月, 2012 20 次提交
  3. 22 10月, 2012 1 次提交
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      Merge tag 'v3.7-rc2' into drm-intel-next-queued · c2fb7916
      Daniel Vetter 提交于
      Linux 3.7-rc2
      
      Backmerge to solve two ugly conflicts:
      - uapi. We've already added new ioctl definitions for -next. Do I need to say more?
      - wc support gtt ptes. We've had to revert this for snb+ for 3.7 and
        also fix a few other things in the code. Now we know how to make it
        work on snb+, but to avoid losing the other fixes do the backmerge
        first before re-enabling wc gtt ptes on snb+.
      
      And a few other minor things, among them git getting confused in
      intel_dp.c and seemingly causing a conflict out of nothing ...
      
      Conflicts:
      	drivers/gpu/drm/i915/i915_reg.h
      	drivers/gpu/drm/i915/intel_display.c
      	drivers/gpu/drm/i915/intel_dp.c
      	drivers/gpu/drm/i915/intel_modes.c
      	include/drm/i915_drm.h
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      c2fb7916
  4. 21 10月, 2012 2 次提交
  5. 20 10月, 2012 13 次提交