- 01 12月, 2016 1 次提交
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由 Vineet Gupta 提交于
This adds support for - CONFIG_ARC_TIMERS : legacy 32-bit TIMER0 and TIMER1 which count UP from @CNT to @LIMIT, before optionally triggering an interrupt. These are programmed using ARC auxiliary register interface. These are present in all ARC cores (ARC700 and ARC HS38) TIMER0 serves as clockevent for all ARC linux builds. TIMER1 is used for clocksource in arc700 builds. - CONFIG_ARC_TIMERS_64BIT: 64-bit counters, RTC and GFRC found in ARC HS38 cores. These are independnet IP blocks with different programming model respectively. Link: http://lkml.kernel.org/r/20161111231132.GA4186@maiAcked-by: NDaniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: NVineet Gupta <vgupta@synopsys.com>
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- 21 10月, 2016 1 次提交
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由 Rich Felker 提交于
At the hardware level, the J-Core PIT is integrated with the interrupt controller, but it is represented as its own device and has an independent programming interface. It provides a 12-bit countdown timer, which is not presently used, and a periodic timer. The interval length for the latter is programmable via a 32-bit throttle register whose units are determined by a bus-period register. The periodic timer is used to implement both periodic and oneshot clock event modes; in oneshot mode the interrupt handler simply disables the timer as soon as it fires. Despite its device tree node representing an interrupt for the PIT, the actual irq generated is programmable, not hard-wired. The driver is responsible for programming the PIT to generate the hardware irq number that the DT assigns to it. On SMP configurations, J-Core provides cpu-local instances of the PIT; no broadcast timer is needed. This driver supports the creation of the necessary per-cpu clock_event_device instances. A nanosecond-resolution clocksource is provided using the J-Core "RTC" registers, which give a 64-bit seconds count and 32-bit nanoseconds that wrap every second. The driver converts these to a full-range 32-bit nanoseconds count. Signed-off-by: NRich Felker <dalias@libc.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: devicetree@vger.kernel.org Cc: linux-sh@vger.kernel.org Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Rob Herring <robh+dt@kernel.org> Link: http://lkml.kernel.org/r/b591ff12cc5ebf63d1edc98da26046f95a233814.1476393790.git.dalias@libc.orgSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
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- 28 6月, 2016 12 次提交
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由 Daniel Lezcano 提交于
Change the Kconfig option logic to fullfil with the current approach. A new Kconfig option is added, CONFIG_INTEGRATOR_AP_TIMER and is selected by the platform. Then the clocksource's Kconfig is changed to make this option selectable by the user if the COMPILE_TEST option is set. Otherwise, it is up to the platform's Kconfig to select the timer. Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
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由 Daniel Lezcano 提交于
Change the Kconfig option logic to fullfil with the current approach. A new Kconfig option is added, CONFIG_KEYSTONE_TIMER and is selected by the platform. Then the clocksource's Kconfig is changed to make this option selectable by the user if the COMPILE_TEST option is set. Otherwise, it is up to the platform's Kconfig to select the timer. Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
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由 Daniel Lezcano 提交于
Change the Kconfig option logic to fullfil with the current approach. A new Kconfig option is added, CONFIG_NSPIRE_TIMER and is selected by the platform. Then the clocksource's Kconfig is changed to make this option selectable by the user if the COMPILE_TEST option is set. Otherwise, it is up to the platform's Kconfig to select the timer. Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
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由 Daniel Lezcano 提交于
Change the Kconfig option logic to fullfil with the current approach. A new Kconfig option is added, CONFIG_U300_TIMER and is selected by the platform. Then the clocksource's Kconfig is changed to make this option selectable by the user if the COMPILE_TEST option is set. Otherwise, it is up to the platform's Kconfig to select the timer. Due on the delay specific code, this driver will compile only on the ARM architecture. Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
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由 Daniel Lezcano 提交于
Change the Kconfig option logic to fullfil with the current approach. A new Kconfig option is added, CONFIG_PRIMA2_TIMER and is selected by the platform. Then the clocksource's Kconfig is changed to make this option selectable by the user if the COMPILE_TEST option is set. Otherwise, it is up to the platform's Kconfig to select the timer. Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
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由 Daniel Lezcano 提交于
Change the Kconfig option logic to fullfil with the current approach. A new Kconfig option is added, CONFIG_MXS_TIMER and is selected by the platform. Then the clocksource's Kconfig is changed to make this option selectable by the user if the COMPILE_TEST option is set. Otherwise, it is up to the platform's Kconfig to select the timer. Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
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由 Daniel Lezcano 提交于
Change the Kconfig option logic to fullfil with the current approach. A new Kconfig option is added, CONFIG_MOXART_TIMER and is selected by the platform. Then the clocksource's Kconfig is changed to make this option selectable by the user if the COMPILE_TEST option is set. Otherwise, it is up to the platform's Kconfig to select the timer. Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
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由 Daniel Lezcano 提交于
Change the Kconfig option logic to fullfil with the current approach. A new Kconfig option is added, CONFIG_ATLAS7_TIMER and is selected by the platform. Then the clocksource's Kconfig is changed to make this option selectable by the user if the COMPILE_TEST option is set. Otherwise, it is up to the platform's Kconfig to select the timer. Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
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由 Daniel Lezcano 提交于
Change the Kconfig option logic to fullfil with the current approach. A new Kconfig option is added, CONFIG_CLPS711X_TIMER and is selected by the platform. Then the clocksource's Kconfig is changed to make this option selectable by the user if the COMPILE_TEST option is set. Otherwise, it is up to the platform's Kconfig to select the timer. Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
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由 Daniel Lezcano 提交于
Change the Kconfig option logic to fullfil with the current approach. A new Kconfig option is added, CONFIG_BCM_KONA_TIMER and is selected by the platform. Then the clocksource's Kconfig is changed to make this option selectable by the user if the COMPILE_TEST option is set. Otherwise, it is up to the platform's Kconfig to select the timer. Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
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由 Daniel Lezcano 提交于
Change the Kconfig option logic to fullfil with the current approach. A new Kconfig option is added, CONFIG_BCM2835_TIMER and is selected by the platform. Then the clocksource's Kconfig is changed to make this option selectable by the user if the COMPILE_TEST option is set. Otherwise, it is up to the platform's Kconfig to select the timer. Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
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由 Neil Armstrong 提交于
Add clocksource and clockevent driver from dual RPS timer. The HW provides a dual one-shot or periodic 24bit timers, the drivers set the first one as tick event source and the second as a continuous scheduler clock source. The timer can use 1, 16 or 256 as pre-dividers, thus the clocksource uses 16 by default. CC: Ma Haijun <mahaijuns@gmail.com> Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com> Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
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- 09 5月, 2016 1 次提交
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由 Noam Camus 提交于
Add internal tick generator which is shared by all cores. Each cluster of cores view it through dedicated address. This is used for SMP system where all CPUs synced by same clock source. Signed-off-by: NNoam Camus <noamc@ezchip.com> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: John Stultz <john.stultz@linaro.org> Acked-by: NVineet Gupta <vgupta@synopsys.com> Acked-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
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- 28 4月, 2016 1 次提交
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由 Vladimir Murzin 提交于
MPS2 platform has simple 32 bits general purpose countdown timers. The driver uses the first detected timer as a clocksource and the rest of the timers as a clockevent Acked-by: NDaniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: NVladimir Murzin <vladimir.murzin@arm.com> Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
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- 15 12月, 2015 1 次提交
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由 Daniel Lezcano 提交于
The current Kconfig option is the H8300 arch option. In order to comply to the current rule, let's create a specific option for the timer8 and select it from the arch's Kconfig. Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
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- 17 10月, 2015 1 次提交
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由 Felipe Balbi 提交于
Introduce a new clocksource driver for Texas Instruments 32.768 Hz device which is available on most OMAP-like devices. Acked-by: NDaniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: NFelipe Balbi <balbi@ti.com>
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- 16 10月, 2015 1 次提交
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由 Marc Gonzalez 提交于
Sigma Designs Tango platforms provide a 27 MHz crystal oscillator. Use it for clocksource, sched_clock, and delay_timer. Signed-off-by: NMarc Gonzalez <marc_gonzalez@sigmadesigns.com> Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
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- 01 10月, 2015 2 次提交
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由 Marc Zyngier 提交于
Seeing the 'of' characters in a symbol that is being called from ACPI seems to freak out people. So let's do a bit of pointless renaming so that these folks do feel at home. Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com> Acked-by: NCatalin Marinas <catalin.marinas@arm.com> Reviewed-by: NHanjun Guo <hanjun.guo@linaro.org> Acked-by: NThomas Gleixner <tglx@linutronix.de> Tested-by: NHanjun Guo <hanjun.guo@linaro.org> Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
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由 Marc Zyngier 提交于
The clocksource probing infrastructure currently depends on CONFIG_CLKSRC_OF, which depends on CONFIG_OF. In order to make this infrastructure selectable even if CONFIG_OF is not selected, introduce a new CONFIG_CLKSRC_PROBE (which allow the infrastructure to be compiled in), and CONFIG_CLKSRC_ACPI (which is the pendent of CONFIG_CLKSRC_OF for ACPI). Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com> Acked-by: NThomas Gleixner <tglx@linutronix.de> Tested-by: NHanjun Guo <hanjun.guo@linaro.org> Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
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- 23 9月, 2015 1 次提交
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由 Daniel J Blueman 提交于
Add 1GHz 64-bit Numachip2 clocksource timer support for accurate system-wide timekeeping, as core TSCs are unsynchronised. Additionally, add a per-core clockevent mechanism that interrupts via the platform IPI vector after a programmed period. [ tglx: Taking it through x86 due to dependencies ] Signed-off-by: NDaniel J Blueman <daniel@numascale.com> Acked-by: NSteffen Persvold <sp@numascale.com> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Link: http://lkml.kernel.org/r/1442829745-29311-1-git-send-email-daniel@numascale.comSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
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- 03 9月, 2015 1 次提交
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由 Ezequiel Garcia 提交于
The Pistachio SoC provides four general purpose timers, and allow to implement a clocksource driver. This driver can be used as a replacement for the MIPS GIC and MIPS R4K clocksources and sched clocks, which are clocked from the CPU clock. Given the general purpose timers are clocked from an independent clock, this new clocksource driver will be useful to introduce CPUFreq support for Pistachio machines. Signed-off-by: NEzequiel Garcia <ezequiel.garcia@imgtec.com> Signed-off-by: NGovindraj Raja <govindraj.raja@imgtec.com> Reviewed-by: NThomas Gleixner <tglx@linutronix.de> Acked-by: NDaniel Lezcano <daniel.lezcano@linaro.org> Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Cc: Andrew Bresticker <abrestic@chromium.org> Cc: James Hartley <James.Hartley@imgtec.com> Cc: Damien Horsley <Damien.Horsley@imgtec.com> Cc: James Hogan <James.Hogan@imgtec.com> Cc: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Cc: Ezequiel Garcia <ezequiel.garcia@imgtec.com> Patchwork: https://patchwork.linux-mips.org/patch/10899/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 24 7月, 2015 1 次提交
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由 Lee Jones 提交于
This IP is shared with Watchdog and RTC functionality. All 3 of these devices are mutually exclusive from one another i.e. Only 1 IP can be used at any given time. We use the device-driver model combined with a DT 'mode' property to enforce this. The ST LPC Clocksource IP can be used as the system (tick) timer. Acked-by: NDaniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: NLee Jones <lee.jones@linaro.org>
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- 23 6月, 2015 1 次提交
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由 Yoshinori Sato 提交于
h8300_timer8: 8bit clockevent device h8300_timer16 / h8300_tpu: 16bit clocksource Signed-off-by: NYoshinori Sato <ysato@users.sourceforge.jp>
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- 03 6月, 2015 1 次提交
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由 Shawn Guo 提交于
After the cleanup on imx timer driver, now it's ready to be moved into drivers/clocksource/. Let's do it. Signed-off-by: NShawn Guo <shawn.guo@linaro.org> Acked-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
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- 02 6月, 2015 4 次提交
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由 Maxime Coquelin 提交于
STM32 MCUs feature 16 and 32 bits general purpose timers with prescalers. The drivers detects whether the time is 16 or 32 bits, and applies a 1024 prescaler value if it is 16 bits. Reviewed-by: NLinus Walleij <linus.walleij@linaro.org> Tested-by: NChanwoo Choi <cw00.choi@samsung.com> Signed-off-by: NMaxime Coquelin <mcoquelin.stm32@gmail.com> Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
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由 Maxime Coquelin 提交于
This patch adds clocksource support for ARMv7-M's System timer, also known as SysTick. Tested-by: NChanwoo Choi <cw00.choi@samsung.com> Acked-by: NDaniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: NMaxime Coquelin <mcoquelin.stm32@gmail.com> Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
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由 Joachim Eastwood 提交于
Add support for using the NXP LPC timer as clocksource and clock event. These timers are present on many NXP devices including LPC32xx, LPC17xx, LPC18xx and LPC43xx. The timer has a 32-bit timer counter register with a programmable 32-bit prescaler. It supports up to 4 compare match values with interrupt generation and reset/stop timer counter action. Signed-off-by: NJoachim Eastwood <manabian@gmail.com> Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: NEzequiel Garcia <ezequiel@vanguardiasur.com.ar> Acked-by: NArnd Bergmann <arnd@arndb.de>
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由 Sudeep Holla 提交于
The ARM Dual-Timer SP804 module is peripheral found not only on ARM32 platforms but also on ARM64 platforms. This patch moves the driver out of arch/arm to driver/clocksource so that it can be used on ARM64 platforms also. Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Rob Herring <robh@kernel.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Olof Johansson <olof@lixom.net> Acked-by: NThomas Gleixner <tglx@linutronix.de> Signed-off-by: NSudeep Holla <sudeep.holla@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 17 3月, 2015 1 次提交
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由 Alexandre Belloni 提交于
Import at91rm9200_time.c from mach-at91 as timer-atmel-st.c. Further cleanup is required to get rid of the mach-at91 headers. Signed-off-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Acked-by: NDaniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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- 29 1月, 2015 4 次提交
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由 Baruch Siach 提交于
Add clocksource driver to the Conexant CX92755 SoC, part of the Digicolor SoCs series. Hardware provides 8 timers, A to H. Timer A is dedicated to a future watchdog driver so we don't use it here. Use timer B for sched_clock, and timer C for clock_event. Signed-off-by: NBaruch Siach <baruch@tkos.co.il> Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
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由 Daniel Lezcano 提交于
The rk3288 board uses the architected timers and these ones are shutdown when the cpu is powered down. There is a need of a broadcast timer in this case to ensure proper wakeup when the cpus are in sleep mode and a timer expires. This driver provides the basic timer functionnality as a backup for the local timers at sleep time. The timer belongs to the alive subsystem. It includes two programmables 64 bits timer channels but the driver only uses 32bits. It works with two operations mode: free running and user defined count. Programing sequence: 1. Timer initialization: * Disable the timer by writing '0' to the CONTROLREG register * Program the timer mode by writing the mode to the CONTROLREG register * Set the interrupt mask 2. Setting the count value: * Load the count value to the registers COUNT0 and COUNT1 (not used). 3. Enable the timer * Write '1' to the CONTROLREG register with the mode (free running or user) Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: NHeiko Stuebner <heiko@sntech.de>
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由 Oleksij Rempel 提交于
In some cases asm9260 looks similar to iMX2x. One of exceptions is timer controller. So this patch introduces new driver for this special case. Signed-off-by: NOleksij Rempel <linux@rempel-privat.de> Acked-by: NDaniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
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由 Barry Song 提交于
marco project is replaced by atlas7 and we should obliterate its all traces. Signed-off-by: NBarry Song <Baohua.Song@csr.com> Acked-by: NArnd Bergmann <arnd@arndb.de> Acked-by: NDaniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
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- 14 1月, 2015 1 次提交
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由 Dmitry Eremin-Solenikov 提交于
SA-11x0 platform used the same IP block as was used on PXA. Consequently it makes sense to have only one driver. Enable pxa_timer clocksource for StrongARM platform. Signed-off-by: NDmitry Eremin-Solenikov <dbaryshkov@gmail.com> Acked-by: NThomas Gleixner <tglx@linutronix.de> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 09 1月, 2015 1 次提交
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由 Thierry Reding 提交于
Instead of directly using the ARCH_TEGRA Kconfig symbol to enable this driver, add a new, non-user-visible Kconfig symbol (TEGRA_TIMER) which can be selected by the various SoCs. This is useful to disable building the driver on Tegra132 (64-bit ARM) where it doesn't currently compile but also isn't needed (yet). Acked-by: NDaniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: NThierry Reding <treding@nvidia.com>
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- 24 11月, 2014 1 次提交
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由 Andrew Bresticker 提交于
Move the GIC clocksource driver to drivers/clocksource/mips-gic-timer.c. Signed-off-by: NAndrew Bresticker <abrestic@chromium.org> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Paul Burton <paul.burton@imgtec.com> Cc: Qais Yousef <qais.yousef@imgtec.com> Cc: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8133/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 28 10月, 2014 1 次提交
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由 Linus Walleij 提交于
This moves the timer/clocksource implementation for the Integrator/AP down to drivers/clocksource and augments the driver a little to use CLOCKSOURCE_OF_DECLARE(). Remove the static mapping of the timer blocks while we're at it. Tested on the Integrator/AP. Acked-by: NThomas Gleixner <tglx@linutronix.de> Acked-by: NDaniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 29 9月, 2014 1 次提交
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由 Carlo Caione 提交于
Meson6 SoCs are equipped with 5 32-bit timers, called TIMER_A, TIMER_B, TIMER_C, TIMER_D and TIMER_E. The driver is providing clocksource support for the 32-bit counter using TIMER_E. Clockevents are also supported using TIMER_A. Acked-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NCarlo Caione <carlo@caione.org> Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: NMatthias Brugger <matthias.bgg@gmail.com>
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