- 24 9月, 2010 30 次提交
-
-
由 Cyril Chemparathy 提交于
This patch adds mdio platform devices on SoCs that have the necessary hardware. Clock lookup entries (aliases) have also been added, so that the MDIO and EMAC drivers can independently enable/disable a shared underlying clock. Further, the EMAC MMR region has been split down into separate MDIO and EMAC regions. Signed-off-by: NCyril Chemparathy <cyril@ti.com> Acked-by: NDavid S. Miller <davem@davemloft.net> Tested-by: NMichael Williamson <michael.williamson@criticallink.com> Tested-by: NCaglar Akyuz <caglarakyuz@gmail.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
-
由 Michael Williamson 提交于
This patch adds the i2c0 bus and attached devices to the MityDSP-L138 and MityARM-1808 davinci SoM. Included is a TPS65023 voltage regulator needed for power management and a small 24c02 EPROM that contains factory configuration data. Signed-off-by: NMichael Williamson <michael.williamson@criticallink.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
-
由 Cyril Chemparathy 提交于
This patch adds an entry into the idcode table for tnetv107x silicon revision 1.1 and 1.2 devices. Signed-off-by: NCyril Chemparathy <cyril@ti.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
-
由 Michael Williamson 提交于
This patch adds initial support for the MityDSP-L138 and MityDSP-1808 system on Module (SOM) under the machine name "mityomapl138". These SOMs are based on the da850 davinci CPU architecture. Information on these SOMs may be found at http://www.mitydsp.com. Basic support for the console UART, NAND, and EMAC (MII interface) is included in this patch. Signed-off-by: NMichael Williamson <michael.williamson@criticallink.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
-
由 Michael Williamson 提交于
In order to support reference DA8XX machines not providing a voltage regulator control for the core voltage, the REGULATOR_DUMMY option is required. Signed-off-by: NMichael Williamson <michael.williamson@criticallink.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
-
由 Michael Williamson 提交于
This patch adds machine checks in the serial console init routines for the DA8XX EVM boards. This is needed because there are other DA8XX based machines that use a different UART/tty as the console and may be included in a common kernel build. Signed-off-by: NMichael Williamson <michael.williamson@criticallink.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
-
由 Sekhar Nori 提交于
Setup NAND flash timing on DM6467T EVM. Without the timing setup, the NAND flash on DM6467T RevC EVM reports a number of random bad blocks because of read errors. Also, with this, copying a 100M file on RevB EVM takes ~35 sec against 1 minute 30 seconds earlier. Signed-off-by: NSekhar Nori <nsekhar@ti.com> Acked-by: NKevin Hilman <khilman@deeprootsystems.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
-
由 Sekhar Nori 提交于
Setup the NAND flash timings for DA850 EVM Before configuring the timing values, throughput calculation using dd command yielded 469 kB/s write and 966 kB/s read speed. After the timing configuration, the throughput was measured to be 2.4 MB/s write and 5 MB/s read. [Mukul Bhatnagar: actual calculation of timing values from the NAND datasheet] Signed-off-by: NSekhar Nori <nsekhar@ti.com> Cc: Mukul Bhatnagar <mbhatnagar@ti.com> Acked-by: NKevin Hilman <khilman@deeprootsystems.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
-
由 Sudhakar Rajashekhara 提交于
Setup the NAND flash timings for DA830 EVM. Before configuring the timing values, throughput calculation using dd command yielded 477 kB/s write and 970 kB/s read speed. After the timing configuration, the throughput was measured to be 2.5 MB/s write and 5.1 MB/s read. [Mukul Bhatnagar: actual calculation of timing values from the NAND datasheet] Signed-off-by: NSudhakar Rajashekhara <sudhakar.raj@ti.com> Cc: Mukul Bhatnagar <mbhatnagar@ti.com> Signed-off-by: NSekhar Nori <nsekhar@ti.com> Acked-by: NKevin Hilman <khilman@deeprootsystems.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
-
由 Sekhar Nori 提交于
The DM644x EVM nand flash timing was earlier being done as a special case in the NAND driver itself. With the NAND driver now capable of progamming the AEMIF interface using timing data passed from the platform, the timing values are being moved into their rightful place in the EVM specific board file. The values being programmed match what was being done earlier and thus do not represent any change in performance/functionality. Signed-off-by: NSekhar Nori <nsekhar@ti.com> Acked-by: NKevin Hilman <khilman@deeprootsystems.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
-
由 Sekhar Nori 提交于
This patch modifies the DaVinci NAND driver to use the new AEMIF timing setup API to configure the NAND access timings. Earlier, AEMIF configuration was being done as a special case for DM644x board, but now more boards emerge which have capability to boot for other media (SPI flash, NOR flash) and have the kernel access NAND flash. This means that kernel cannot always depend on the bootloader to setup the NAND. Also, on platforms such as da850/omap-l138, the aemif input frequency changes as cpu frequency changes; necessiating re-calculation of timimg values as part of cpufreq transtitions. This patch forms the basis for adding that support. Signed-off-by: NSekhar Nori <nsekhar@ti.com> Acked-by: NKevin Hilman <khilman@deeprootsystems.com> Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com>
-
由 Sekhar Nori 提交于
This patch adds support to configure the AEMIF interface with supplied timing values. Since this capability is useful both from NOR and NAND flashes, it is provided as a new interface and in a file of its own. AEMIF timing configuration is required in cases: 1) Where the AEMIF clock rate can change at runtime (a side affect of cpu frequency change). 2) Where U-Boot does not support NAND/NOR but supports other media like SPI Flash or MMC/SD and thus does not care about setting up the AEMIF timing for kernel to use. 3) Where U-Boot just hasn't configured the timing values and cannot be upgraded because the box is already in the field. Since there is now a header file for AEMIF interface, the common (non-NAND specific) defines for AEMIF registers have been moved from nand.h into the newly created aemif.h Signed-off-by: NSekhar Nori <nsekhar@ti.com> Acked-by: NKevin Hilman <khilman@deeprootsystems.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
-
由 Sekhar Nori 提交于
By default the audio driver uses EDMAQ_0 as the DMA queue, but on DM365 this queue is specially designed for video transfers with a large fifo size. Having both audio and video transfers on the same queue leads to noise on the audio side. This patch changes the audio queue number for DM365 to EDMAQ_3. Signed-off-by: NSekhar Nori <nsekhar@ti.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
-
由 Juha Kuikka 提交于
Add resources, platform device and convenience registration function for DA850's second MMC/SD controller (MMCSD1). Signed-off-by: NJuha Kuikka <juha.kuikka@elektrobit.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
-
由 Juha Kuikka 提交于
Split mmcsd_clk into mmcsd0_clk and mmcsd1_clk and add davinci_mmc.1 in preparation for adding support for MMCSD1 peripheral in DA850. Signed-off-by: NJuha Kuikka <juha.kuikka@elektrobit.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
-
由 Juha Kuikka 提交于
Add LPSC id for DA850's MMCSD1 peripheral. Signed-off-by: NJuha Kuikka <juha.kuikka@elektrobit.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
-
由 Kulikov Vasiliy 提交于
If irq2ctlr() fails return IRQ_NONE. Also as it can fail make 'ctlr' signed. The semantic patch that finds this problem (many false-positive results): (http://coccinelle.lip6.fr/) // <smpl> @ r1 @ identifier f; @@ int f(...) { ... } @@ identifier r1.f; type T; unsigned T x; @@ *x = f(...) ... *x > 0 Signed-off-by: NKulikov Vasiliy <segooon@gmail.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
-
由 Sergei Shtylyov 提交于
The CPGMAC pin list in da850.c was incorrectly split into two MII/RMII mode specific pin lists, while what pin group is used is a function of how the board is wired. Copy the pin lists to board-da850-evm.c, renaming them accordingly, and merge the two lists in da850.c into one, da850_cpgmac_pins[], representing the CPGMAC module as a whole... Signed-off-by: NSergei Shtylyov <sshtylyov@ru.mvista.com> Tested-by: NBen Gardiner <bengardiner@nanometrics.ca> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
-
由 Sergei Shtylyov 提交于
The NAND/NOR flash pin lists (da850_nand_pins/da850_nor_pins) are purely board specific and as such shouldn't be in da850.c -- copy them to board-da850-evm.c, renaming to da850_evm_nand_pins/da850_evm_nor_pins respectively, and merge the two lists in da850.c into one, representing the EMIF 2.5 module as a whole, just like we have it in da830.c... While at it, remove the '__init' modifier from da850_evm_setup_nor_nand() as this function is called from non '__init' code... Signed-off-by: NSergei Shtylyov <sshtylyov@ru.mvista.com> Tested-by: NBen Gardiner <bengardiner@nanometrics.ca> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
-
由 Cyril Chemparathy 提交于
This is a bugfix for the original tnetv107x submission series. The psc_regs base array was being discarded post-init, and this was causing a crash during post-init clock enable/disable. Signed-off-by: NCyril Chemparathy <cyril@ti.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
-
由 Sekhar Nori 提交于
Keep PLL0 SYSCLK3 at a constant rate of 100MHz. This enables the AEMIF timing to remain valid even as the PLL0 output is changed by cpufreq driver to save power. Signed-off-by: NSekhar Nori <nsekhar@ti.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
-
由 Sekhar Nori 提交于
On OMAP-L138 SoC, some of the sysclks need not be at a fixed ratio to CPU clock and can be kept at a relatively constant rate by adjusting the PLLDIVn ratio even as cpufreq goes ahead and changes the CPU clock. This feature can be used to keep the EMIFA (PLL0 SYSCLK3) clock at a constant rate so that the EMIF timings need not be re-programmed whenever the CPU frequency changes. This patch adds the required suppport to cpufreq driver. Signed-off-by: NSekhar Nori <nsekhar@ti.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
-
由 Sekhar Nori 提交于
Setting sysclk rate will be useful in cases where the sysclk is not at a fixed ratio to the PLL output but can asynchronously be changed. This support forms the basis of attempt to keep the AEMIF clock constant on OMAP-L138 even as PLL0 output changes as ARM clock is changed to save power. This patch has been tested on OMAP-L138. Signed-off-by: NSekhar Nori <nsekhar@ti.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
-
由 Sekhar Nori 提交于
This patch disables internal pulldowns for all MMC/SD1 pins. Presently only MMCSD1_CMD pin's pull down is disabled, but with this some MMC/SD cards do not get detected on MMC/SD1 slot of the EVM. The problem was reproducible with SanDisk 4GB SDHC card. Reported-by: NStephane Bovagne <s-bovagne@ti.com> Signed-off-by: NSekhar Nori <nsekhar@ti.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
-
由 Sekhar Nori 提交于
For each DA850 OPP, the normal ('NOM') voltage defined in the tecnical reference manual (TRM) is actually the minimum voltage the frequency is supported at. The minimum ('MIN') voltage defined in TRM is meant to take care of voltage fluctuations and the device should not be run at this voltage for extended periods of time. Fix the OPP definitions to define the cvdd_min as the normal voltage defined in the datasheet. Signed-off-by: NSekhar Nori <nsekhar@ti.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
-
由 Sekhar Nori 提交于
The Sitara AM17x SoCs from TI are an OMAP-L137 pin-to-pin compatible ARM9 microprocessor offering from TI. The Sitara AM18x SoCs from TI are an OMAP-L138 pin-to-pin compatible ARM9 microprocessor offering from TI. More information about these processors available at: www.ti.com/am1x Because of their compatibiliy with OMAP-L1x, the kernel support for OMAP-L1x is fully relevant to AM1x processors. This patch updates the Kconfig prompt and help text to include the AM1x part names to help users select configurations required for these parts easily. Also, the hardware information that shows up in /proc/cpuinfo is updated to show applicability of the respective OMAP-L1x EVMs for AM1x parts. Signed-off-by: NSekhar Nori <nsekhar@ti.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
-
由 Sekhar Nori 提交于
In arch/arm/mach-davinci/Kconfig, some of the configuration items are indented with multiple spaces instead of tabs. Also, in couple of places, two spaces are used in the middle of help text where one should do. This patch fixes both issues. Signed-off-by: NSekhar Nori <nsekhar@ti.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
-
由 Sekhar Nori 提交于
Current cpufreq code does not consider errors that can occur while changing voltage. Code to increase CPU frequency goes ahead even in the case the regulator has failed to increase the voltage. This leads to hard error since lower voltages cannot support increased frequency. Prevent this by not increasing frequency in case increasing voltage is not successful. Also, do not lower the voltage if changing the cpu frequency has failed for some reason. Note that we do not return error on failure to decrease voltage as that is not a hard error. Build fix for non-cpufreq kernels by Caglar Akyuz. Signed-off-by: NSekhar Nori <nsekhar@ti.com> Cc: Caglar Akyuz <caglar@bilkon-kontrol.com.tr> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
-
由 Kevin Hilman 提交于
The long list of clocks being disabled on boot is noisy and not needed for standard boots. Make this a debug printk instead. Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
-
由 Sekhar Nori 提交于
Without this cleanup, sparse checker reports warnings of the type: CHECK arch/arm/mach-davinci/board-da850-evm.c arch/arm/mach-davinci/board-da850-evm.c:112:22: warning: symbol 'da850_evm_nandflash_partition' was not declared. Should it be static? The nand flash partitions and regulator supplies are used within the EVM file and so should have been static This patch has been boot tested on DA830 and DA850 EVMs. Signed-off-by: NSekhar Nori <nsekhar@ti.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
-
- 21 9月, 2010 5 次提交
-
-
由 Al Viro 提交于
We need to make sure that only the first do_signal() to be handled on the way out syscall will bother with syscall restarts; additionally, the check on the "signal has user handler" path had been wrong - compare with restart prevention in sigreturn()... Signed-off-by: NAl Viro <viro@zeniv.linux.org.uk> Signed-off-by: NDavid Howells <dhowells@redhat.com> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
-
由 Al Viro 提交于
do_signal() should place the syscall number in gr7, not gr8 when handling ERESTART_WOULDBLOCK. Signed-off-by: NAl Viro <viro@zeniv.linux.org.uk> Signed-off-by: NDavid Howells <dhowells@redhat.com> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
-
由 Al Viro 提交于
Use force_sigsegv() rather than force_sig(SIGSEGV, ...) as the former resets the SEGV handler pointer which will kill the process, rather than leaving it open to an infinite loop if the SEGV handler itself caused a SEGV signal. Signed-off-by: NAl Viro <viro@zeniv.linux.org.uk> Signed-off-by: NDavid Howells <dhowells@redhat.com> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
-
由 Al Viro 提交于
a) sa_handler might be maliciously set to point to kernel memory; blindly dereferencing it in FDPIC case is a Bad Idea(tm). b) I'm not sure you need that set_fs(USER_DS) there at all, but if you do, you'd better do it *before* checking the frame you've decided to use with access_ok(), lest sigaltstack() becomes a convenient roothole. Signed-off-by: NAl Viro <viro@zeniv.linux.org.uk> Signed-off-by: NDavid Howells <dhowells@redhat.com> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
-
由 Al Viro 提交于
Reset restart_block.fn on executing a sigreturn such that any currently pending system call restarts will be forced to return -EINTR. Signed-off-by: NAl Viro <viro@zeniv.linux.org.uk> Signed-off-by: NDavid Howells <dhowells@redhat.com> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
-
- 19 9月, 2010 5 次提交
-
-
由 Al Viro 提交于
Unlike the other targets, alpha sets _one_ sigframe and buggers off until the next syscall/interrupt, even if more signals are pending. It leads to quite a few unpleasant inconsistencies, starting with SIGSEGV potentially arriving not where it should and including e.g. mess with sigsuspend(); consider two pending signals blocked until sigsuspend() unblocks them. We pick the first one; then, if we are hit by interrupt while in the handler, we process the second one as well. If we are not, and if no syscalls had been made, we get out of the first handler and leave the second signal pending; normally sigreturn() would've picked it anyway, but here it starts with restoring the original mask and voila - the second signal is blocked again. On everything else we get both delivered consistently. It's actually easy to fix; the only thing to watch out for is prevention of double syscall restart. Fortunately, the idea I've nicked from arm fix by rmk works just fine... Testcase demonstrating the behaviour in question; on alpha we get one or both flags set (usually one), on everything else both are always set. #include <signal.h> #include <stdio.h> int had1, had2; void f1(int sig) { had1 = 1; } void f2(int sig) { had2 = 1; } main() { sigset_t set1, set2; sigemptyset(&set1); sigemptyset(&set2); sigaddset(&set2, 1); sigaddset(&set2, 2); signal(1, f1); signal(2, f2); sigprocmask(SIG_SETMASK, &set2, NULL); raise(1); raise(2); sigsuspend(&set1); printf("had1:%d had2:%d\n", had1, had2); } Tested-by: NMichael Cree <mcree@orcon.net.nz> Signed-off-by: NAl Viro <viro@zeniv.linux.org.uk> Signed-off-by: NMatt Turner <mattst88@gmail.com>
-
由 Al Viro 提交于
The way sigreturn() is implemented on alpha breaks PTRACE_SYSCALL, all way back to 1.3.95 when alpha has grown PTRACE_SYSCALL support. What happens is direct return to ret_from_syscall, in order to bypass mangling of a3 (error indicator) and prevent other mutilations of registers (e.g. by syscall restart). That's fine, but... the entire TIF_SYSCALL_TRACE codepath is kept separate on alpha and post-syscall stopping/notifying the tracer is after the syscall. And the normal path we are forcibly switching to doesn't have it. So we end up with *one* stop in traced sigreturn() vs. two in other syscalls. And yes, strace is visibly broken by that; try to strace the following #include <signal.h> #include <stdio.h> void f(int sig) {} main() { signal(SIGHUP, f); raise(SIGHUP); write(1, "eeeek\n", 6); } and watch the show. The close(1) = 405 in the end of strace output is coming from return value of write() (6 == __NR_close on alpha) and syscall number of exit_group() (__NR_exit_group == 405 there). The fix is fairly simple - the only thing we end up missing is the call of syscall_trace() and we can tell whether we'd been called from the SYSCALL_TRACE path by checking ra value. Since we are setting the switch_stack up (that's what sys_sigreturn() does), we have the right environment for calling syscall_trace() - just before we call undo_switch_stack() and return. Since undo_switch_stack() will overwrite s0 anyway, we can use it to store the result of "has it been called from SYSCALL_TRACE path?" check. The same thing applies in rt_sigreturn(). Tested-by: NMichael Cree <mcree@orcon.net.nz> Signed-off-by: NAl Viro <viro@zeniv.linux.org.uk> Signed-off-by: NMatt Turner <mattst88@gmail.com>
-
由 Al Viro 提交于
Old code used to set regs->r0 and regs->r19 to force the right return value. Leaving that after switch to ERESTARTNOHAND was a Bad Idea(tm), since now that screws the restart - if we hit the case when get_signal_to_deliver() returns 0, we will step back to syscall insn, with v0 set to EINTR and a3 to 1. The latter won't matter, since EINTR is 4, aka __NR_write. Testcase: #include <signal.h> #define _GNU_SOURCE #include <unistd.h> #include <sys/syscall.h> main() { sigset_t mask; sigemptyset(&mask); sigaddset(&mask, SIGCONT); sigprocmask(SIG_SETMASK, &mask, NULL); kill(0, SIGCONT); syscall(__NR_sigsuspend, 1, "b0rken\n", 7); } results on alpha in immediate message to stdout... Fix is obvious; moreover, since we don't need regs anymore, we can switch to normal prototypes for these guys and lose the wrappers. Even better, rt_sigsuspend() is identical to generic version in kernel/signal.c now. Tested-by: NMichael Cree <mcree@orcon.net.nz> Signed-off-by: NAl Viro <viro@zeniv.linux.org.uk> Signed-off-by: NMatt Turner <mattst88@gmail.com>
-
由 Al Viro 提交于
same thing as had been done on other targets back in 2003 - move setting ->restart_block.fn into {rt_,}sigreturn(). Tested-by: NMichael Cree <mcree@orcon.net.nz> Signed-off-by: NAl Viro <viro@zeniv.linux.org.uk> Signed-off-by: NMatt Turner <mattst88@gmail.com>
-
由 Michael Cree 提交于
Pending work from the performance event subsystem is executed in the timer interrupt. This patch shifts the call to perf_event_do_pending() before the call to update_process_times() as the latter may call back into the perf event subsystem and it is prudent to have the pending work executed first. Signed-off-by: NMichael Cree <mcree@orcon.net.nz> Signed-off-by: NMatt Turner <mattst88@gmail.com>
-