- 03 8月, 2021 1 次提交
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由 Marc Zyngier 提交于
Wherever possible, replace constructs that match either generic_handle_irq(irq_find_mapping()) or generic_handle_irq(irq_linear_revmap()) to a single call to generic_handle_domain_irq(). Link: https://lore.kernel.org/r/20210802162630.2219813-4-maz@kernel.orgSigned-off-by: NMarc Zyngier <maz@kernel.org> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Acked-by: NKrzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
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- 20 4月, 2021 2 次提交
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由 Marc Zyngier 提交于
In anticipation of the removal of the msi_controller structure, convert the ancient xilinx host controller driver to MSI domains. We end-up with the usual two domain structure, the top one being a generic PCI/MSI domain, the bottom one being xilinx-specific and handling the actual HW interrupt allocation. This allows us to fix some of the most appaling MSI programming, where the message programmed in the device is the virtual IRQ number instead of the allocated vector number. The allocator is also made safe with a mutex. This should allow support for MultiMSI, but I decided not to even try, since I cannot test it. Link: https://lore.kernel.org/r/20210330151145.997953-6-maz@kernel.orgTested-by: NBharat Kumar Gogada <bharatku@xilinx.com> Signed-off-by: NMarc Zyngier <maz@kernel.org> Signed-off-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: NBjorn Helgaas <bhelgaas@google.com>
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由 Marc Zyngier 提交于
A long cargo-culted behaviour of PCI drivers is to allocate memory to obtain an address that is fed to the controller as the MSI capture address (i.e. the MSI doorbell). But there is no actual requirement for this address to be RAM. All it needs to be is a suitable aligned address that will *not* be DMA'd to. Use the physical address of the 'port' data structure as the MSI capture address, aligned on a 4K boundary. Link: https://lore.kernel.org/r/20210330151145.997953-5-maz@kernel.orgTested-by: NBharat Kumar Gogada <bharatku@xilinx.com> Signed-off-by: NMarc Zyngier <maz@kernel.org> Signed-off-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
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- 11 12月, 2020 1 次提交
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由 Krzysztof Wilczyński 提交于
Add ECAM-related constants to provide a set of standard constants defining memory address shift values to the byte-level address that can be used to access the PCI Express Configuration Space, and then move native PCI Express controller drivers to use the newly introduced definitions retiring driver-specific ones. Refactor pci_ecam_map_bus() function to use newly added constants so that limits to the bus, device function and offset (now limited to 4K as per the specification) are in place to prevent the defective or malicious caller from supplying incorrect configuration offset and thus targeting the wrong device when accessing extended configuration space. This refactor also allows for the ".bus_shift" initialisers to be dropped when the user is not using a custom value as a default value will be used as per the PCI Express Specification. Thanks to Qian Cai <qcai@redhat.com>, Michael Walle <michael@walle.cc>, and Vladimir Oltean <olteanv@gmail.com> for reporting a pci_ecam_create() issue with .bus_shift and to Vladimir for proposing the fix. [bhelgaas: incorporate Vladimir's fix, update commit log] Suggested-by: NBjorn Helgaas <bhelgaas@google.com> Link: https://lore.kernel.org/r/20201129230743.3006978-2-kw@linux.comTested-by: NMichael Walle <michael@walle.cc> Signed-off-by: NKrzysztof Wilczyński <kw@linux.com> Signed-off-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Reviewed-by: NJon Derrick <jonathan.derrick@intel.com> Reviewed-by: NBjorn Helgaas <bhelgaas@google.com>
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- 04 8月, 2020 2 次提交
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由 Rob Herring 提交于
The majority of DT based host drivers use the default .map_irq() and .swizzle_irq() functions, so let's initialize the function pointers to the default and drop setting them in the host drivers. Drivers like iProc which don't support legacy interrupts need to set .map_irq() back to NULL. Link: https://lore.kernel.org/r/20200722022514.1283916-20-robh@kernel.orgSigned-off-by: NRob Herring <robh@kernel.org> Signed-off-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: NBjorn Helgaas <bhelgaas@google.com> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Bjorn Helgaas <bhelgaas@google.com>
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由 Rob Herring 提交于
Now that pci_parse_request_of_pci_ranges() callers just setup pci_host_bridge.windows and dma_ranges directly and don't need the bus range returned, we can just initialize them when allocating the pci_host_bridge struct. With this, pci_parse_request_of_pci_ranges() becomes a static function. Link: https://lore.kernel.org/r/20200722022514.1283916-19-robh@kernel.orgSigned-off-by: NRob Herring <robh@kernel.org> Signed-off-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: NBjorn Helgaas <bhelgaas@google.com> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Bjorn Helgaas <bhelgaas@google.com>
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- 23 7月, 2020 3 次提交
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由 Rob Herring 提交于
Use pci_is_root_bus() rather than tracking the root bus number to determine if the bus is the root bus or not. This removes storing duplicated data as well as the need for the host bridge driver to have to care about the bus numbers in most cases. There was also a bug that the root_busno is never set which means the root bus number is always 0 even if the DT said something else. Link: https://lore.kernel.org/r/20200722022514.1283916-9-robh@kernel.orgSigned-off-by: NRob Herring <robh@kernel.org> Signed-off-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: NBjorn Helgaas <bhelgaas@google.com> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: linux-pci@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org
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由 Rob Herring 提交于
The struct pci_host_bridge is 0 initialized when allocated, so there's no need to explicitly set fields to 0. Link: https://lore.kernel.org/r/20200722022514.1283916-4-robh@kernel.orgSigned-off-by: NRob Herring <robh@kernel.org> Signed-off-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: NBjorn Helgaas <bhelgaas@google.com> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Bjorn Helgaas <bhelgaas@google.com>
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由 Rob Herring 提交于
The host bridge's parent device is always the platform device. As we already have a pointer to it in the devres functions, let's initialize the parent device. Drivers can still override the parent if desired. Link: https://lore.kernel.org/r/20200722022514.1283916-3-robh@kernel.orgSigned-off-by: NRob Herring <robh@kernel.org> Signed-off-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: NBjorn Helgaas <bhelgaas@google.com> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Bjorn Helgaas <bhelgaas@google.com>
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- 10 7月, 2020 1 次提交
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由 Rob Herring 提交于
The xilinx host driver does the same host registration and bus scanning calls as pci_host_probe, so let's use it instead. The only difference is pci_assign_unassigned_bus_resources() was called instead of pci_bus_size_bridges() and pci_bus_assign_resources(). This should be the same. Link: https://lore.kernel.org/r/20200522234832.954484-16-robh@kernel.orgSigned-off-by: NRob Herring <robh@kernel.org> Signed-off-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Michal Simek <michal.simek@xilinx.com>
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- 21 11月, 2019 1 次提交
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由 Rob Herring 提交于
Extend devm_of_pci_get_host_bridge_resources() and pci_parse_request_of_pci_ranges() helpers to also parse the inbound addresses from DT 'dma-ranges' and populate a resource list with the translated addresses. This will help ensure 'dma-ranges' is always parsed in a consistent way. Tested-by: NSrinath Mannam <srinath.mannam@broadcom.com> Tested-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com> # for AArdvark Signed-off-by: NRob Herring <robh@kernel.org> Signed-off-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: NSrinath Mannam <srinath.mannam@broadcom.com> Reviewed-by: NAndrew Murray <andrew.murray@arm.com> Acked-by: NGustavo Pimentel <gustavo.pimentel@synopsys.com> Cc: Jingoo Han <jingoohan1@gmail.com> Cc: Gustavo Pimentel <gustavo.pimentel@synopsys.com> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Thomas Petazzoni <thomas.petazzoni@bootlin.com> Cc: Will Deacon <will@kernel.org> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Toan Le <toan@os.amperecomputing.com> Cc: Ley Foon Tan <lftan@altera.com> Cc: Tom Joseph <tjoseph@cadence.com> Cc: Ray Jui <rjui@broadcom.com> Cc: Scott Branden <sbranden@broadcom.com> Cc: bcm-kernel-feedback-list@broadcom.com Cc: Ryder Lee <ryder.lee@mediatek.com> Cc: Karthikeyan Mitran <m.karthikeyan@mobiveil.co.in> Cc: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Cc: Simon Horman <horms@verge.net.au> Cc: Shawn Lin <shawn.lin@rock-chips.com> Cc: Heiko Stuebner <heiko@sntech.de> Cc: Michal Simek <michal.simek@xilinx.com> Cc: rfi@lists.rocketboards.org Cc: linux-mediatek@lists.infradead.org Cc: linux-renesas-soc@vger.kernel.org Cc: linux-rockchip@lists.infradead.org
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- 29 10月, 2019 1 次提交
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由 Rob Herring 提交于
Convert the Xilinx host bridge to use the common pci_parse_request_of_pci_ranges(). There's no need to assign the resources to a temporary list first. Just use bridge->windows directly and remove all the temporary list handling. Signed-off-by: NRob Herring <robh@kernel.org> Signed-off-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Andrew Murray <andrew.murray@arm.com> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Michal Simek <michal.simek@xilinx.com>
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- 30 3月, 2019 1 次提交
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由 Kangjie Lu 提交于
If __get_free_pages() fails, return -ENOMEM to avoid a NULL pointer dereference. Signed-off-by: NKangjie Lu <kjlu@umn.edu> Signed-off-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: NSteven Price <steven.price@arm.com> Reviewed-by: NMukesh Ojha <mojha@codeaurora.org>
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- 25 9月, 2018 1 次提交
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由 Rob Herring 提交于
PCI host drivers have already matched on compatible strings, so checking device_type is redundant. Also, device_type is considered deprecated for FDT though we've still been requiring it for PCI hosts as it is useful for finding PCI buses. Signed-off-by: NRob Herring <robh@kernel.org> [lorenzo.pieralisi@arm.com: reformatted the log] Signed-off-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: NAlan Douglas <adouglas@cadence.com> Acked-by: NSubrahmaya Lingappa <l.subrahmanya@mobiveil.co.in> Acked-by: NMichal Simek <michal.simek@xilinx.com> Cc: Will Deacon <will.deacon@arm.com> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Alan Douglas <adouglas@cadence.com> Cc: Subrahmanya Lingappa <l.subrahmanya@mobiveil.co.in> Cc: Michal Simek <michal.simek@xilinx.com> Cc: linux-pci@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org
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- 30 6月, 2018 1 次提交
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由 Nicholas Mc Guire 提交于
The call to of_get_next_child() returns a node pointer with refcount incremented thus it must be explicitly decremented here after the last usage. Fixes: 8961def5 ("PCI: xilinx: Add Xilinx AXI PCIe Host Bridge IP driver") Signed-off-by: NNicholas Mc Guire <hofrat@osadl.org> [lorenzo.pieralisi@arm.com: reworked commit log] Signed-off-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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- 08 6月, 2018 1 次提交
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由 Shawn Lin 提交于
Native PCI drivers for root complex devices were originally all in drivers/pci/host/. Some of these devices can also be operated in endpoint mode. Drivers for endpoint mode didn't seem to fit in the "host" directory, so we put both the root complex and endpoint drivers in per-device directories, e.g., drivers/pci/dwc/, drivers/pci/cadence/, etc. These per-device directories contain trivial Kconfig and Makefiles and clutter drivers/pci/. Make a new drivers/pci/controllers/ directory and collect all the device-specific drivers there. No functional change intended. Link: https://lkml.kernel.org/r/1520304202-232891-1-git-send-email-shawn.lin@rock-chips.comSigned-off-by: NShawn Lin <shawn.lin@rock-chips.com> [bhelgaas: changelog] Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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- 31 5月, 2018 2 次提交
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由 Jan Kiszka 提交于
of_pci_get_host_bridge_resources() allocates the resource structures it fills dynamically, but none of its callers care to release them so far. Rather than requiring everyone to do this explicitly, convert the existing function to a managed version. Tested-by: NVladimir Zapolskiy <vladimir_zapolskiy@mentor.com> Signed-off-by: NJan Kiszka <jan.kiszka@siemens.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Reviewed-by: NVladimir Zapolskiy <vladimir_zapolskiy@mentor.com> Acked-by: NJoao Pinto <jpinto@synopsys.com> Acked-by: NJingoo Han <jingoohan1@gmail.com> CC: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
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由 Jan Kiszka 提交于
Another step towards a managed version of of_pci_get_host_bridge_resources(): Feed in the underlying device, rather than just the OF node. This will allow us to use managed resource allocation internally later on. Tested-by: NVladimir Zapolskiy <vladimir_zapolskiy@mentor.com> Signed-off-by: NJan Kiszka <jan.kiszka@siemens.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Reviewed-by: NVladimir Zapolskiy <vladimir_zapolskiy@mentor.com> Acked-by: NJingoo Han <jingoohan1@gmail.com> CC: Joao Pinto <Joao.Pinto@synopsys.com> CC: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
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- 15 5月, 2018 1 次提交
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由 Rob Herring 提交于
The functions in linux/of_pci.h are primarily used by host bridge drivers, so they can be private to drivers/pci/. The remaining functions are still used mostly in host bridge drivers that still live in arch specific code. Hopefully someday, those will get moved into drivers/pci as well. Signed-off-by: NRob Herring <robh@kernel.org> Signed-off-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: NLinus Walleij <linus.walleij@linaro.org> Acked-by: NJingoo Han <jingoohan1@gmail.com>
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- 29 1月, 2018 1 次提交
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由 Bjorn Helgaas 提交于
Add SPDX GPL-2.0+ to all PCI files that specified the GPL and allowed either GPL version 2 or any later version. Remove the boilerplate GPL version 2 or later language, relying on the assertion in b2441318 ("License cleanup: add SPDX GPL-2.0 license identifier to files with no license") that the SPDX identifier may be used instead of the full boilerplate text. Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Reviewed-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 10 11月, 2017 1 次提交
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由 Bjorn Helgaas 提交于
Rename xilinx_pcie_link_is_up() to xilinx_pcie_link_up() to follow the convention of other drivers. No functional change intended. Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Reviewed-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: NMichal Simek <michal.simek@xilinx.com>
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- 02 9月, 2017 1 次提交
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由 Bjorn Helgaas 提交于
Fix various typos and whitespace errors: s/Synopsis/Synopsys/ s/Designware/DesignWare/ s/Keystine/Keystone/ s/gpio/GPIO/ s/pcie/PCIe/ s/phy/PHY/ s/confgiruation/configuration/ No functional change intended. Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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- 17 8月, 2017 3 次提交
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由 Paul Burton 提交于
The Xilinx AXI bridge for PCI Express device provides interrupts indicating the completion of config space accesses. We have previously enabled/unmasked them but do nothing with them besides acknowledge them. Leave the interrupts masked in order to avoid servicing a large number of pointless interrupts during boot. Signed-off-by: NPaul Burton <paul.burton@imgtec.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Cc: Bharat Kumar Gogada <bharatku@xilinx.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Ravikiran Gummaluri <rgummal@xilinx.com>
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由 Paul Burton 提交于
The INTx & MSI interrupt decode paths duplicated a fair bit of common functionality. They also strictly handled interrupts in order of INTx then MSI, so if both types of interrupt were to be asserted simultaneously and the MSI interrupt were first in the FIFO then the INTx code would read it & ignore it before the MSI code then had to read it again, wasting the original FIFO read. Unify the INTx & MSI decode in order to reduce that duplication & allow a single FIFO read to be performed for each interrupt regardless of its type. Signed-off-by: NPaul Burton <paul.burton@imgtec.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Cc: Bharat Kumar Gogada <bharatku@xilinx.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Ravikiran Gummaluri <rgummal@xilinx.com>
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由 Paul Burton 提交于
The pcie-xilinx driver creates an IRQ domain of size 4 for legacy PCI INTx interrupts, which at first glance seems reasonable since there are 4 possible such interrupts. Unfortunately the driver then proceeds to use the range 1-4 as the hwirq numbers for INTA-INTD, causing warnings & broken interrupts when attempting to use INTD/hwirq=4 due to it being beyond the range of the IRQ domain: WARNING: CPU: 0 PID: 1 at kernel/irq/irqdomain.c:365 irq_domain_associate+0x170/0x220 error: hwirq 0x4 is too large for dummy Modules linked in: CPU: 0 PID: 1 Comm: swapper/0 Tainted: G W 4.12.0-rc5-00126-g19e1b3a10aad-dirty #427 Stack : 0000000000000000 0000000000000004 0000000000000006 ffffffff8092c78a 0000000000000061 ffffffff8018bf60 0000000000000000 0000000000000000 ffffffff8088c287 ffffffff80811d18 a8000000ffc60000 ffffffff80926678 0000000000000001 0000000000000000 ffffffff80887880 ffffffff80960000 ffffffff80920000 ffffffff801e6744 ffffffff80887880 a8000000ffc4f8f8 000000000000089c ffffffff8018d260 0000000000010000 ffffffff80811d18 0000000000000000 0000000000000001 0000000000000000 0000000000000000 0000000000000000 a8000000ffc4f840 0000000000000000 ffffffff8042cf34 0000000000000000 0000000000000000 0000000000000000 0000000000040c00 0000000000000000 ffffffff8010d1c8 0000000000000000 ffffffff8042cf34 ... Call Trace: [<ffffffff8010d1c8>] show_stack+0x80/0xa0 [<ffffffff8042cf34>] dump_stack+0xd4/0x110 [<ffffffff8013ea98>] __warn+0xf0/0x108 [<ffffffff8013eb14>] warn_slowpath_fmt+0x3c/0x48 [<ffffffff80196528>] irq_domain_associate+0x170/0x220 [<ffffffff80196bf0>] irq_create_mapping+0x88/0x118 [<ffffffff801976a8>] irq_create_fwspec_mapping+0xb8/0x320 [<ffffffff80197970>] irq_create_of_mapping+0x60/0x70 [<ffffffff805d1318>] of_irq_parse_and_map_pci+0x20/0x38 [<ffffffff8049c210>] pci_fixup_irqs+0x60/0xe0 [<ffffffff8049cd64>] xilinx_pcie_probe+0x28c/0x478 [<ffffffff804e8ca8>] platform_drv_probe+0x50/0xd0 [<ffffffff804e73a4>] driver_probe_device+0x2c4/0x3a0 [<ffffffff804e7544>] __driver_attach+0xc4/0xd0 [<ffffffff804e5254>] bus_for_each_dev+0x64/0xa8 [<ffffffff804e5e40>] bus_add_driver+0x1f0/0x268 [<ffffffff804e8000>] driver_register+0x68/0x118 [<ffffffff801001a4>] do_one_initcall+0x4c/0x178 [<ffffffff808d3ca8>] kernel_init_freeable+0x204/0x2b0 [<ffffffff80730b68>] kernel_init+0x10/0xf8 [<ffffffff80106218>] ret_from_kernel_thread+0x14/0x1c Fix this by making use of the new pci_irqd_intx_xlate() helper to translate the INTx 1-4 range into the 0-3 range suitable for the IRQ domain of size 4, and stop adding 1 to the hwirq number decoded from the interrupt FIFO which is already in the range 0-3. Whilst we're here we switch to using PCI_NUM_INTX rather than the magic number 4, making it clearer what the 4 means. Signed-off-by: NPaul Burton <paul.burton@imgtec.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Cc: Bharat Kumar Gogada <bharatku@xilinx.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Ravikiran Gummaluri <rgummal@xilinx.com>
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- 03 7月, 2017 3 次提交
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由 Arvind Yadav 提交于
of_device_ids are not supposed to change at runtime. All functions working with of_device_ids provided by <linux/of.h> work with const of_device_ids. So mark the non-const structs as const. File size before: text data bss dec hex filename 195 600 0 795 31b drivers/pci/host/pcie-xilinx.o File size after constify xilinx_pcie_of_match: text data bss dec hex filename 595 184 0 779 30b drivers/pci/host/pcie-xilinx.o Signed-off-by: NArvind Yadav <arvind.yadav.cs@gmail.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> -
由 Lorenzo Pieralisi 提交于
Since, through struct pci_host_bridge.map/swizzle_irq hooks, IRQs are now allocated in the pci_assign_irq() callback automatically, PCI host bridge drivers can stop relying on pci_fixup_irqs() for IRQ allocation. Drop pci_fixup_irqs() usage from PCI xilinx host bridge driver. Signed-off-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Cc: Michal Simek <michal.simek@xilinx.com>
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由 Lorenzo Pieralisi 提交于
The introduction of pci_scan_root_bus_bridge() provides a PCI core API to scan a PCI root bus backed by an already initialized struct pci_host_bridge object, which simplifies the bus scan interface and makes the PCI scan root bus interface easier to generalize as members are added to the struct pci_host_bridge. Convert PCI xilinx host code to pci_scan_root_bus_bridge() to improve the PCI root bus scanning interface. Signed-off-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> CC: Michal Simek <michal.simek@xilinx.com>
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- 25 4月, 2017 1 次提交
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由 Lorenzo Pieralisi 提交于
PCI configuration space should be mapped with a memory region type that generates on the CPU host bus non-posted write transations. Update the driver to use the devm_pci_remap_cfg* interface to make sure the correct memory mappings for PCI configuration space are used. Signed-off-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Cc: Bharat Kumar Gogada <bharat.kumar.gogada@xilinx.com> Cc: Michal Simek <michal.simek@xilinx.com>
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- 09 2月, 2017 1 次提交
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由 Bjorn Helgaas 提交于
Make sure PCIe MPS settings are valid when we enumerate a new hierarchy. Based-on-patch-by: NJon Mason <jon.mason@broadcom.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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- 12 10月, 2016 3 次提交
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由 Bjorn Helgaas 提交于
xilinx_pcie_assign_msi() doesn't use the struct xilinx_pcie_port pointer passed to it, so remove the argument completely. No functional change intended. Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> -
由 Bjorn Helgaas 提交于
The xilinx driver never uses the platform drvdata pointer, so don't bother setting it. No functional change intended. Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> -
由 Bjorn Helgaas 提交于
Use a local "struct device *dev" for brevity and consistency with other drivers. No functional change intended. Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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- 13 9月, 2016 5 次提交
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由 Bharat Kumar Gogada 提交于
Dispose of virtual IRQ being created for MSI interrupts. Signed-off-by: NBharat Kumar Gogada <bharatku@xilinx.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Acked-by: NMichal Simek <michal.simek@xilinx.com>
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由 Bharat Kumar Gogada 提交于
Kernel provides virtual IRQ number at teardown. Get hwirq number from virtual IRQ and clear correct MSI set bit. Signed-off-by: NBharat Kumar Gogada <bharatku@xilinx.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Acked-by: NMichal Simek <michal.simek@xilinx.com>
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由 Bharat Kumar Gogada 提交于
The interrupt decode register is not being cleared if an invalid interrupt arises. Clear the decode register in this case. Signed-off-by: NBharat Kumar Gogada <bharatku@xilinx.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Acked-by: NMichal Simek <michal.simek@xilinx.com>
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由 Bharat Kumar Gogada 提交于
When built with MSI support, the legacy domain reference was being overwritten with MSI. Create two separate domains for MSI and legacy interrupts. Signed-off-by: NBharat Kumar Gogada <bharatku@xilinx.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Acked-by: NMichal Simek <michal.simek@xilinx.com>
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由 Po Liu 提交于
Previously we only allowed device 0 to be directly attached to the root port. But SR-IOV devices may use non-zero device numbers for VFs. Remove the restriction that only device 0 may be attached to a root port. [bhelgaas: changelog] Signed-off-by: NPo Liu <po.liu@nxp.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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- 25 8月, 2016 1 次提交
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由 Paul Gortmaker 提交于
This code is not being built as a module by anyone: drivers/pci/host/Kconfig:config PCIE_XILINX drivers/pci/host/Kconfig: bool "Xilinx AXI PCIe host bridge support" Remove uses of MODULE_DESCRIPTION(), MODULE_AUTHOR(), MODULE_LICENSE(), etc., so that when reading the driver there is no doubt it is builtin-only. The information is preserved in comments at the top of the file. Note that for non-modular code, builtin_platform_driver() uses the same init level priority as module_platform_driver(), so this doesn't change init ordering. [bhelgaas: changelog] Signed-off-by: NPaul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> CC: Michal Simek <michal.simek@xilinx.com> CC: "Sören Brinkmann" <soren.brinkmann@xilinx.com>
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- 26 7月, 2016 1 次提交
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由 Christophe JAILLET 提交于
In xilinx_pcie_init_irq_domain(), the pattern used to check and return error is: if (!var) { dev_err(...); return PTR_ERR(var); } So the returned value in case of error is always 0, which means 'success'. Change it to return -ENODEV instead. Signed-off-by: NChristophe JAILLET <christophe.jaillet@wanadoo.fr> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Acked-by: NSören Brinkmann <soren.brinkmann@xilinx.com>
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