- 20 7月, 2010 4 次提交
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由 Mark Brown 提交于
AIF1ADC TDM mode has no effect other than causing the ADCDAT line to be tristated rather than driven low on clock cycles where there is no data to be transmitted. If the clock cycle is idle then there should be no devices using the data so tristating should have no adverse effects. Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk>
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由 Chanwoo Choi 提交于
Otherwise all machine drivers need to do so. Signed-off-by: NChanwoo Choi <cw00.choi@samsung.com> Signed-off-by: NJoonyoung Shim <jy0922.shim@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Mark Brown 提交于
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk>
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由 Mark Brown 提交于
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk>
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- 18 7月, 2010 1 次提交
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由 Mark Brown 提交于
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk> Cc: stable@kernel.org
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- 15 7月, 2010 2 次提交
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由 Axel Lin 提交于
snd_soc_unregister_codec is called twice if snd_soc_register_dai fail. Signed-off-by: NAxel Lin <axel.lin@gmail.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Axel Lin 提交于
otherwise the error path will always be executed. Signed-off-by: NAxel Lin <axel.lin@gmail.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 09 7月, 2010 2 次提交
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由 Mark Brown 提交于
The WM8994 can output a clock derived from its internal SYSCLK, called OPCLK. The rate can be selected as a sysclk, with a division from the SYSCLK rate specified (multiplied by 10 since a division of 5.5 is supported) and the clock can be disabled by specifying a divisor of zero. Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk>
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由 Mark Brown 提交于
Very handy for debug. Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk>
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- 06 7月, 2010 1 次提交
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由 Mark Brown 提交于
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk>
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- 05 7月, 2010 2 次提交
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由 Mark Brown 提交于
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk>
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由 Mark Brown 提交于
It will be replaced with automatic deemphasis rate configuration but since we have an enumeration table in this driver this is done in a separate commit to make the renumbering of the enumeration items clear. Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk>
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- 04 7月, 2010 1 次提交
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由 Maurus Cuelenaere 提交于
The WM8987 codec is register compatible with the WM8750, so just add it to the SPI and I²C device table. Signed-off-by: NMaurus Cuelenaere <mcuelenaere@gmail.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 02 7月, 2010 1 次提交
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由 Kuninori Morimoto 提交于
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 30 6月, 2010 2 次提交
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由 Vladimir Zapolskiy 提交于
For UDA1341 codec power control is managed in STATUS1 register, and for all other codecs in DATA011 register. Signed-off-by: NVladimir Zapolskiy <vzapolskiy@gmail.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Vladimir Zapolskiy 提交于
In UDA1340, UDA1344 and UDA1345 codecs there is one more functional register in part of DATA0 tranfser. For UDA1341 this register coincides with EA register. Signed-off-by: NVladimir Zapolskiy <vzapolskiy@gmail.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 25 6月, 2010 2 次提交
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由 Vladimir Zapolskiy 提交于
On initialization ADC/DAC are enabled only for UDA1341, that's why bias_level shall be set to off explicitly, otherwise dapm is misinformed about bias_level on startup. Signed-off-by: NVladimir Zapolskiy <vzapolskiy@gmail.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Vladimir Zapolskiy 提交于
This change wipes out a hardcoded macro, which enables codec bias level control. Now is_powered_on_standby value shall be used instead. Signed-off-by: NVladimir Zapolskiy <vzapolskiy@gmail.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 23 6月, 2010 2 次提交
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由 Eric Bénard 提交于
in tlv320aic23_set_bias_level, for the case SND_SOC_BIAS_ON, the comment says "vref/mid, osc on, dac unmute" but the code doesn't clear the corresponding bits, thus when resuming, several bits are not cleared preventing the codec from working. in tlv320aic23_suspend, clearing the active register is not needed as it will be done by tlv320aic23_set_bias_level, when setting bias to SND_SOC_BIAS_OFF Signed-off-by: NEric Bénard <eric@eukrea.com> Cc: broonie@opensource.wolfsonmicro.com Cc: anuj.aggarwal@ti.com Cc: lrg@slimlogic.co.uk Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: NLiam Girdwood <lrg@slimlogic.co.uk>
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由 Lars-Peter Clausen 提交于
This patch adds support for the JZ4740 internal codec. Signed-off-by: NLars-Peter Clausen <lars@metafoo.de> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 20 6月, 2010 1 次提交
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由 Mark Brown 提交于
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 15 6月, 2010 3 次提交
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由 Mark Brown 提交于
The most useful configuration for the WM2000 is to enable the ANC so turn that on by default, and since we're not reflecting chip default state also enable the speaker output by default. Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk>
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由 Kuninori Morimoto 提交于
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Kuninori Morimoto 提交于
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 07 6月, 2010 1 次提交
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由 Peter Ujfalusi 提交于
Upper threshold is used in mode7 of DAC33. Instead of hard wired UTHR, add control to change the upper threshold value. Changing upper threshold is not allowed when the playback is already running, since wrongly timed change in the UTHR can cause problems with the codec. With this control the length of the burst in mode7 can be changed. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@nokia.com> Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: NLiam Girdwood <lrg@slimlogic.co.uk>
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- 31 5月, 2010 11 次提交
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由 Mark Brown 提交于
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 apatard@mandriva.com 提交于
This patch is adding a ASoC driver for the cs42l51 from Cirrus Logic. Master mode and spi mode are not supported. Signed-off-by: NArnaud Patard <apatard@mandriva.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.ul> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Seungwhan Youn 提交于
This patch adds spdif dummy codec driver for using spdif-dit as a stand-alone. Until this, spdif-dit can be used only with other codecs like tlv320aci3x in davinci platform. Signed-off-by: NSeungwhan Youn <sw.youn@samsung.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Peter Ujfalusi 提交于
Machine driver can instruct the codec driver to reset the chip registers to their default values at probe time. If machine driver does not provide setup data, then the registers are going to be reseted to their defaults, to be safe. If the developer on the platform confirms that the register reset is not needed, than it can be skipped, saving ~20ms time in probe. As safety measure do the register reset at remove time also. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@nokia.com> Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: NLiam Girdwood <lrg@slimlogic.co.uk>
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由 Peter Ujfalusi 提交于
Restructure the codec power code in order to be able to hit off when the codec is not in use. Since the audio registers are accessible while the codec is powered down, there is no need for additional safety mechanism. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@nokia.com> Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: NLiam Girdwood <lrg@slimlogic.co.uk>
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由 Peter Ujfalusi 提交于
It seams at least on twl5031 that the ARXR2_APGA_CTL register does not have the same default value as it is written in the TRM. Since the codec part of the PM chip has not been actually changed according to TI, assuming, that all version has the same problem, so writing there the TRM value. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@nokia.com> Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: NLiam Girdwood <lrg@slimlogic.co.uk>
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由 Peter Ujfalusi 提交于
Since the twl4030 codec driver supports different version of the PM chip, a helper function can come handy, which can check the driver's default versus the chip values. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@nokia.com> Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: NLiam Girdwood <lrg@slimlogic.co.uk>
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由 Peter Ujfalusi 提交于
Since the reg cache now contains the chip default values for all registers (REG_OPTION is reset to it's default within this patch), there is no longer need to rewrite _all_ registers. Initialize only few selected registers. According to the latest information, the offset cancellation need to be done only once, when the codec is powered on, so there is no need for the power up wrapper. Move all chip initialization code under chip_init, and do it when the codec is initialized. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@nokia.com> Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: NLiam Girdwood <lrg@slimlogic.co.uk>
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由 Peter Ujfalusi 提交于
Add means for machine drivers to select the path for offset cancellation. Reset the reg cache value to the chip reset value at the same time. Machine drivers can specify which path need to be used for offset cancellation via the twl4030_setup.offset_cncl_path. For paths use the defines from include/linux/mfd/twl4030-codec.h: TWL4030_OFFSET_CNCL_SEL_* Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@nokia.com> Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: NLiam Girdwood <lrg@slimlogic.co.uk>
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由 Peter Ujfalusi 提交于
There is no need for the power down wrapper. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@nokia.com> Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: NLiam Girdwood <lrg@slimlogic.co.uk>
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由 Peter Ujfalusi 提交于
Reset most of the codec registers to their chip reset value. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@nokia.com> Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: NLiam Girdwood <lrg@slimlogic.co.uk>
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- 26 5月, 2010 4 次提交
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由 Mark Brown 提交于
These should be regular, not linear. Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk> Cc: stable@kernel.org
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由 Mark Brown 提交于
These scales should be regular, not linear. Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk> Cc: stable@kernel.org
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由 Mark Brown 提交于
These should be regular rather than linear scales. Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk> Cc: stable@kernel.org
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由 Mark Brown 提交于
These should be regular, not linear. Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Cc: stable@kernel.org
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