- 09 3月, 2014 8 次提交
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由 Charles Keepax 提交于
The reference clock path on newer IP FLLs requires a different configuration, and should avoid integer mode operation. This patch adds support for both the new encoding and updates the calculation. Signed-off-by: NCharles Keepax <ckeepax@opensource.wolfsonmicro.com> Signed-off-by: NMark Brown <broonie@linaro.org>
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由 Charles Keepax 提交于
No part of the FLL calculation depends on the value determined for the gain but the gain does depend on other values. In preparation for future updates this patch moves the gain to be the last thing calculated. Signed-off-by: NCharles Keepax <ckeepax@opensource.wolfsonmicro.com> Signed-off-by: NMark Brown <broonie@linaro.org>
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由 Charles Keepax 提交于
OUTDIV will remain unchanged whilst the rest of the FLL configuration is calculated so do this first. Signed-off-by: NCharles Keepax <ckeepax@opensource.wolfsonmicro.com> Signed-off-by: NMark Brown <broonie@linaro.org>
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由 Charles Keepax 提交于
As we now calculate the FLL configuration at a later stage in the process the fout member of the FLL structure will contain the desired Fout frequency so no need to pass this in seperately. Signed-off-by: NCharles Keepax <ckeepax@opensource.wolfsonmicro.com> Signed-off-by: NMark Brown <broonie@linaro.org>
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由 Charles Keepax 提交于
Currently the FLL configuration is calculated before it is known which FLL path the configuration will be applied to. Newer versions of the IP have differences in the configuration required for each FLL path, which makes it complicated to calculate the FLL configuration in advance. This patch simply checks the validity of a requested input and output frequency before we know which FLL path they will be applied to and saves the actual calculation of the configuration until we know where the settings will be applied. Signed-off-by: NCharles Keepax <ckeepax@opensource.wolfsonmicro.com> Signed-off-by: NMark Brown <broonie@linaro.org>
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由 Charles Keepax 提交于
Since we know in arizona_apply_fll if we are setting the sync or ref path there is no need to set the outdiv seperately anymore. This patch moves this from arizona_enable_fll to arizona_apply_fll. Signed-off-by: NCharles Keepax <ckeepax@opensource.wolfsonmicro.com> Signed-off-by: NMark Brown <broonie@linaro.org>
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由 Charles Keepax 提交于
Improve readability by adding defines for some of the constants associated with FLL configuration. Signed-off-by: NCharles Keepax <ckeepax@opensource.wolfsonmicro.com> Signed-off-by: NMark Brown <broonie@linaro.org>
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由 Charles Keepax 提交于
One is not a valid value for the OUTDIV start searching at 2 instead. Signed-off-by: NCharles Keepax <ckeepax@opensource.wolfsonmicro.com> Signed-off-by: NMark Brown <broonie@linaro.org>
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- 19 12月, 2013 2 次提交
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由 Charles Keepax 提交于
Add support for configuring the sample rate on the SYSCLK side of the ASRC. Signed-off-by: NCharles Keepax <ckeepax@opensource.wolfsonmicro.com> Signed-off-by: NMark Brown <broonie@linaro.org>
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由 Charles Keepax 提交于
Currently, the driver only supports configuration of the lower sample rate (FSL) on the ISRCs. With the higher rate being fixed a SYSCLK, this patch adds support for configuring the higher sample rate (FSH). Signed-off-by: NCharles Keepax <ckeepax@opensource.wolfsonmicro.com> Signed-off-by: NMark Brown <broonie@linaro.org>
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- 17 12月, 2013 1 次提交
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由 Mark Brown 提交于
Where possible write to the device asynchronously, allowing better performance when used with a bus like SPI which supports this by minimising the need to context switch back to the driver to get the next bit of data. Signed-off-by: NMark Brown <broonie@linaro.org> Tested-by: NCharles Keepax <ckeepax@opensource.wolfsonmicro.com> Reviewed-by: NCharles Keepax <ckeepax@opensource.wolfsonmicro.com>
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- 21 11月, 2013 1 次提交
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由 Charles Keepax 提交于
Acked-by: NMark Brown <broonie@kernel.org> Signed-off-by: NCharles Keepax <ckeepax@opensource.wolfsonmicro.com> Signed-off-by: NLee Jones <lee.jones@linaro.org>
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- 20 11月, 2013 2 次提交
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由 Richard Fitzgerald 提交于
The FLL must be placed into free-run mode before disabling to allow it to entirely shut down. Signed-off-by: NRichard Fitzgerald <rf@opensource.wolfsonmicro.com> Signed-off-by: NMark Brown <broonie@linaro.org> Cc: stable@vger.kernel.org
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由 Richard Fitzgerald 提交于
Signed-off-by: ND.J. Barrow <dbarrow@wolfsonmicro.com> Signed-off-by: NRichard Fitzgerald <rf@opensource.wolfsonmicro.com> Signed-off-by: NMark Brown <broonie@linaro.org>
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- 17 9月, 2013 1 次提交
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由 Charles Keepax 提交于
This patch suppresses calculation of REFCLK parameters when the REFCLK source frequency is set to zero, additionally it will consider a source frequency of zero as the REFCLK being disabled and switch to using the SYNCCLK. Reported-by: NKyung Kwee Ryu <Kyung-Kwee.Ryu@wolfsonmicro.com> Signed-off-by: NCharles Keepax <ckeepax@opensource.wolfsonmicro.com> Signed-off-by: NMark Brown <broonie@linaro.org>
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- 13 8月, 2013 1 次提交
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由 Charles Keepax 提交于
The wm8997 is a compact, high-performance audio hub CODEC with SLIMbus interfacing, for smartphones, tablets and other portable audio devices based on the Arizona platform. This patch adds the wm8997 CODEC driver. [Fixed some interface churn from bitrot due to the patch not going via the MFD tree as expected -- broonie] Signed-off-by: NCharles Keepax <ckeepax@opensource.wolfsonmicro.com> Signed-off-by: NMark Brown <broonie@linaro.org>
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- 07 8月, 2013 1 次提交
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由 Charles Keepax 提交于
The input OSR bits are specified differently for wm5110 than for current revs of wm5102. This patch corrects support for this on wm5110. Signed-off-by: NCharles Keepax <ckeepax@opensource.wolfsonmicro.com> Signed-off-by: NMark Brown <broonie@linaro.org>
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- 15 7月, 2013 2 次提交
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由 Charles Keepax 提交于
Reported-by: NFengguang Wu <fengguang.wu@intel.com> Signed-off-by: NCharles Keepax <ckeepax@opensource.wolfsonmicro.com> Signed-off-by: NMark Brown <broonie@linaro.org>
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由 Charles Keepax 提交于
When doing signal activity detection, the only output from the DRC will often be a GPIO pin. This patch adds a signal activity output that is activated when a GPIO is configured to output the DRC signal activity detection. Signed-off-by: NCharles Keepax <ckeepax@opensource.wolfsonmicro.com> Signed-off-by: NMark Brown <broonie@linaro.org>
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- 21 5月, 2013 1 次提交
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由 Mark Brown 提交于
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 27 3月, 2013 1 次提交
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由 Mark Brown 提交于
Ensure that the outputs are fully enabled before we begin passing audio through them. Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 26 3月, 2013 2 次提交
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由 Mark Brown 提交于
Running HPDET while the headphone outputs are enabled can disrupt the operation of HPDET. In order to avoid this HPDET needs to disable the headphone outputs and ASoC needs to not enable them while HPDET is running. Do the ASoC side of this by storing the enable state in the core driver structure and only writing to the device if a flag indicating that the accessory detection side is in a state where it can have the headphone output stage enabled. Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Wei Yongjun 提交于
Remove duplicated include. Signed-off-by: NWei Yongjun <yongjun_wei@trendmicro.com.cn> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 22 3月, 2013 4 次提交
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由 Mark Brown 提交于
Since ASoC does not yet really have the framework features needed to support propagating sample rates through the device well yet implement basic support for the ISRCs equivalent to that we currently have for the ASRCs. The user can opt for 8kHz or 16kHz as the rate for the DSP blocks in addition to the main audio rate, these being the primary use cases. Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Mark Brown 提交于
Ensure that the device state does not diverge from the state we have set in the register map in order to make the behaviour clearer. Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Mark Brown 提交于
Help with debuggability. Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Mark Brown 提交于
Some system designs have been identified which repurpose portions of the speaker driver circuits for other functions which will require that they not be managed using DAPM. Prepare for this by factoring out the creation of the speaker widgets into the core driver, the widgets will be replaced by dummy ones when the additional functions are enabled. Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 14 3月, 2013 1 次提交
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由 Mark Brown 提交于
I2S requires stereo clocking even for mono data. Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 13 3月, 2013 1 次提交
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由 Mark Brown 提交于
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 08 3月, 2013 2 次提交
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由 Mark Brown 提交于
Allow users to keep on specifying their output frequency when disabling the reference clock. Reported-by: NKyung Kwee Ryu <Kyung-Kwee.Ryu@wolfsonmicro.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Mark Brown 提交于
When live configuring a FLL configuration with no synchroniser disable the synchroniser in case the previous configuration used one. Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 06 3月, 2013 2 次提交
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由 Mark Brown 提交于
For optimal performance the FLL loop gain should be adjusted depending on the frequency of the input clock for the loop. Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Mark Brown 提交于
If we are using a high freqency SYNCCLK then increasing the bandwidth of the synchroniser improves performance. Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 05 3月, 2013 1 次提交
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由 Mark Brown 提交于
If there is only one clock active the FLL should use REFCLK rather than SYNCCLK as the clock to synchronise with since REFCLK is always required. Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 04 3月, 2013 6 次提交
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由 Charles Keepax 提交于
Enabling the FLL when REFCLK is being configured is not what the user would expect and can cause issues if SYNCCLK has no specified frequency. Signed-off-by: NCharles Keepax <ckeepax@opensource.wolfsonmicro.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Mark Brown 提交于
Since we are automatically managing the mutes we may as well also manage the volume update bits, disabling volume updates while none of the inputs are active. Since we are doing this we may as well allow the volumes to ramp together so only enable volume updates once at the end of power up. Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Charles Keepax 提交于
Signed-off-by: NCharles Keepax <ckeepax@opensource.wolfsonmicro.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Charles Keepax 提交于
This patch allows the REFCLK to be set directly allowing much greater flexibility in how the FLLs are configured. Signed-off-by: NCharles Keepax <ckeepax@opensource.wolfsonmicro.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Charles Keepax 提交于
Previously updates that only changes FLL source would be missed, this patch corrects this. We also ensures that both REFCLK and SYNCCLK frequency changes are considered, in preparation for future updates. Signed-off-by: NCharles Keepax <ckeepax@opensource.wolfsonmicro.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Charles Keepax 提交于
In preparation for additional features on the FLL this patch factors out the code for enabling an FLL into a seperate function. Signed-off-by: NCharles Keepax <ckeepax@opensource.wolfsonmicro.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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