1. 15 2月, 2014 1 次提交
  2. 20 12月, 2013 1 次提交
    • M
      spi: spi-imx: Fix out-of-order CS/SCLK operation at low speeds · 6fd8b850
      Marek Vasut 提交于
      Problem:
      --------
       The problem this patch addresses has the following assumptions about the
       SPI bus setup:
       - The hardware used to find this is Freescale i.MX537 @ 1200MHz
       - The SPI SCLK operate at very low speed, less than 200 kHz
       - There are two SPI devices attached to the bus
         - Each device uses different GPIO for chipselect
         - Each device requires different SCLK signal polarity
      
       The observation of the SCLK and GPIO chipselect lines with a logic analyzer
       shows, that the SCLK polarity change does sometimes happen after the GPIO
       chipselect is asserted. The SPI slave device reacts on that by counting the
       SCLK polarity change as a clock pulse, which disrupts the communication with
       the SPI slave device.
      
      Explanation:
      ------------
       We found an interesting correlation, that the maximum delay between the write
       into the ECSPIx_CONFIGREG register and the change of SCLK polarity at each
       SCLK frequency of 10 kHz, 20 kHz, 50 kHz and 100 kHz is 100 uS, 50 uS, 20 uS
       and 10 uS respectively. This lead us to a theory, that at SCLK frequency of
       1 Hz, the delay would be 1 S. Therefore, the time it takes for the write to
       ECSPIx_CONFIGREG to take effect in the hardware is up to the duration of 1
       tick of the SCLK clock.
      
       During this delay period, if the SCLK frequency is too low, the execution of
       the spi-imx.c driver can advance so much, that the GPIO chipselect will be
       asserted. The GPIO chipselect is asserted almost immediatelly.
      
      Solution:
      ---------
       The solution this patch presents is simple. We calculate the resulting SCLK
       clock first by dividing the ECSPI block clock by both dividers that are to be
       programmed into the configuration register. Based on the resulting SCLK clock,
       we derive the delay it will take for the changes to get really applied. We are
       extra careful here so we delay twice as long as we should. Note that the patch
       does not create additional overhead at high speeds as the delay will likely be
       close to zero there.
      Signed-off-by: NMarek Vasut <marex@denx.de>
      To: linux-spi@vger.kernel.org
      Cc: Fabio Estevam <fabio.estevam@freescale.com>
      Cc: Huang Shijie <b32955@freescale.com>
      Cc: Mark Brown <broonie@kernel.org>
      Cc: Sascha Hauer <s.hauer@pengutronix.de>
      Cc: Shawn Guo <shawn.guo@linaro.org>
      Signed-off-by: NMark Brown <broonie@linaro.org>
      6fd8b850
  3. 23 10月, 2013 1 次提交
  4. 07 10月, 2013 1 次提交
    • A
      spi: bitbang: Let spi_bitbang_start() take a reference to master · 702a4879
      Axel Lin 提交于
      Many drivers that use bitbang library have a leak on probe error paths.
      This is because once a spi_master_get() call succeeds, we need an additional
      spi_master_put() call to free the memory.
      
      Fix this issue by moving the code taking a reference to master to
      spi_bitbang_start(), so spi_bitbang_start() will take a reference to master on
      success. With this change, the caller is responsible for calling
      spi_bitbang_stop() to decrement the reference and spi_master_put() as
      counterpart of spi_alloc_master() to prevent a memory leak.
      
      So now we have below patten for drivers using bitbang library:
      
      probe:
      spi_alloc_master        -> Init reference count to 1
      spi_bitbang_start       -> Increment reference count
      remove:
      spi_bitbang_stop        -> Decrement reference count
      spi_master_put          -> Decrement reference count (reference count reaches 0)
      
      Fixup all users accordingly.
      Signed-off-by: NAxel Lin <axel.lin@ingics.com>
      Suggested-by: NUwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
      Acked-by: NUwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
      Signed-off-by: NMark Brown <broonie@linaro.org>
      702a4879
  5. 17 9月, 2013 1 次提交
    • A
      spi: bitbang: Let spi_bitbang_start() take a reference to master · 94c69f76
      Axel Lin 提交于
      Many drivers that use bitbang library have a leak on probe error paths.
      This is because once a spi_master_get() call succeeds, we need an additional
      spi_master_put() call to free the memory.
      
      Fix this issue by moving the code taking a reference to master to
      spi_bitbang_start(), so spi_bitbang_start() will take a reference to master on
      success. With this change, the caller is responsible for calling
      spi_bitbang_stop() to decrement the reference and spi_master_put() as
      counterpart of spi_alloc_master() to prevent a memory leak.
      
      So now we have below patten for drivers using bitbang library:
      
      probe:
      spi_alloc_master        -> Init reference count to 1
      spi_bitbang_start       -> Increment reference count
      remove:
      spi_bitbang_stop        -> Decrement reference count
      spi_master_put          -> Decrement reference count (reference count reaches 0)
      
      Fixup all users accordingly.
      Signed-off-by: NAxel Lin <axel.lin@ingics.com>
      Suggested-by: NUwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
      Acked-by: NUwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
      Signed-off-by: NMark Brown <broonie@linaro.org>
      94c69f76
  6. 29 7月, 2013 1 次提交
  7. 15 7月, 2013 2 次提交
  8. 30 5月, 2013 2 次提交
  9. 13 5月, 2013 2 次提交
  10. 05 2月, 2013 1 次提交
  11. 08 12月, 2012 1 次提交
  12. 28 9月, 2012 1 次提交
  13. 14 9月, 2012 1 次提交
  14. 03 8月, 2012 1 次提交
  15. 13 7月, 2012 2 次提交
  16. 12 5月, 2012 1 次提交
  17. 25 4月, 2012 1 次提交
    • S
      spi i.MX: do not depend on grouped clocks · aa29d840
      Sascha Hauer 提交于
      the current i.MX clock support groups together unrelated clocks
      to a single clock which is then used by the driver. This can't
      be accomplished with the generic clock framework so we instead
      request the individual clocks in the driver. For i.MX there are
      generally three different clocks:
      
      ipg: bus clock (needed to access registers)
      ahb: dma relevant clock, sometimes referred to as hclk in the datasheet
      per: bit clock, pixel clock
      
      This patch changes the driver to request the individual clocks.
      Currently all clk_get will get the same clock until the SoCs
      are converted to the generic clock framework
      Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
      aa29d840
  18. 11 4月, 2012 1 次提交
  19. 31 3月, 2012 1 次提交
  20. 10 3月, 2012 1 次提交
  21. 25 10月, 2011 1 次提交
  22. 16 9月, 2011 1 次提交
    • F
      spi/imx: Fix spi-imx when the hardware SPI chipselects are used · 4cc122ac
      Fabio Estevam 提交于
      commit 22a85e4c (spi/imx: add device tree probe support) broke spi-imx usage
      when the SPI chipselect is the one internal to the controller.
      
      On a mx31pdk board the following error is seen:
      
      Registering mxc_nand as whole device
      ------------[ cut here ]------------
      WARNING: at drivers/gpio/gpiolib.c:101 gpio_ensure_requested+0x4c/0xf4()
      autorequest GPIO-0
      Modules linked in:
      [<c0014410>] (unwind_backtrace+0x0/0xf4) from [<c0025754>] (warn_slowpath_common+0x4c/0x64)
      [<c0025754>] (warn_slowpath_common+0x4c/0x64) from [<c0025800>] (warn_slowpath_fmt+0x30/0x40)
      [<c0025800>] (warn_slowpath_fmt+0x30/0x40) from [<c0198688>] (gpio_ensure_requested+0x4c/0xf4)
      [<c0198688>] (gpio_ensure_requested+0x4c/0xf4) from [<c01988c8>] (gpio_direction_output+0xa0/0x138)
      [<c01988c8>] (gpio_direction_output+0xa0/0x138) from [<c01ed198>] (spi_imx_setup+0x38/0x4c)
      [<c01ed198>] (spi_imx_setup+0x38/0x4c) from [<c01eb5d0>] (spi_setup+0x38/0x50)
      [<c01eb5d0>] (spi_setup+0x38/0x50) from [<c01eb85c>] (spi_add_device+0x94/0x124)
      [<c01eb85c>] (spi_add_device+0x94/0x124) from [<c01eb960>] (spi_new_device+0x74/0xac)
      [<c01eb960>] (spi_new_device+0x74/0xac) from [<c01eb9b8>] (spi_match_master_to_boardinfo+0x20/0x40)
      [<c01eb9b8>] (spi_match_master_to_boardinfo+0x20/0x40) from [<c01eba88>] (spi_register_master+0xb0/0x104)
      [<c01eba88>] (spi_register_master+0xb0/0x104) from [<c01ec0b4>] (spi_bitbang_start+0x104/0x17c)
      [<c01ec0b4>] (spi_bitbang_start+0x104/0x17c) from [<c02c2c4c>] (spi_imx_probe+0x2fc/0x404)
      [<c02c2c4c>] (spi_imx_probe+0x2fc/0x404) from [<c01c2498>] (platform_drv_probe+0x18/0x1c)
      [<c01c2498>] (platform_drv_probe+0x18/0x1c) from [<c01c1058>] (driver_probe_device+0x78/0x174)
      [<c01c1058>] (driver_probe_device+0x78/0x174) from [<c01c11e0>] (__driver_attach+0x8c/0x90)
      [<c01c11e0>] (__driver_attach+0x8c/0x90) from [<c01c0860>] (bus_for_each_dev+0x60/0x8c)
      [<c01c0860>] (bus_for_each_dev+0x60/0x8c) from [<c01c0088>] (bus_add_driver+0xa0/0x288)
      [<c01c0088>] (bus_add_driver+0xa0/0x288) from [<c01c179c>] (driver_register+0x78/0x18c)
      [<c01c179c>] (driver_register+0x78/0x18c) from [<c0008490>] (do_one_initcall+0x34/0x178)
      [<c0008490>] (do_one_initcall+0x34/0x178) from [<c03a5204>] (kernel_init+0x74/0x118)
      [<c03a5204>] (kernel_init+0x74/0x118) from [<c000f65c>] (kernel_thread_exit+0x0/0x8)
      ---[ end trace 759f924b30fd5a44 ]---
      
      Fix this issue by using the original chip select logic and make spi-imx to work again.
      
      Tested on a mx31pdk that uses the hardware SPI chipselect pins and also
      on a mx27pdk that uses GPIO as SPI chipselect.
      Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
      Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
      4cc122ac
  23. 15 7月, 2011 7 次提交
  24. 06 6月, 2011 1 次提交
  25. 16 2月, 2011 1 次提交
  26. 13 1月, 2011 1 次提交
  27. 08 1月, 2011 1 次提交
  28. 24 12月, 2010 1 次提交
  29. 11 10月, 2010 1 次提交
  30. 01 10月, 2010 1 次提交