- 15 9月, 2012 2 次提交
-
-
由 Stephen Warren 提交于
Paz00 (Toshiba AC100) can be booted using device tree with equal functionality as when booted using a board file. Remove as much of the board file as is possible, since it's no longer needed. One special-case is still left in board-dt-tegra20.c, since there is no way to create a WiFi rfkill device from device tree yet. This logic is now enabled unconditionally rather than via CONFIG_MACH_PAZ00. The extra cases where it's enabled (.configs which did not enable Paz00 support) shouldn't impact much since the amount of code is tiny. Signed-off-by: NStephen Warren <swarren@nvidia.com> Acked-By: NMarc Dietrich <marvin24@gmx.de>
-
由 Stephen Warren 提交于
TrimSlice can be booted using device tree with equal functionality as when booted using a board file. Remove the board file since it's no longer needed. One special-case is still left in board-dt-tegra20.c, since the Tegra PCIe driver doesn't support device tree yet. This logic is now enabled by CONFIG_TEGRA_PCI rather than via CONFIG_MACH_TRIMSLICE. The extra cases where it's enabled (.configs which did not enable TrimSlice support) shouldn't impact much since the amount of code is tiny. Signed-off-by: NStephen Warren <swarren@nvidia.com>
-
- 07 7月, 2012 1 次提交
-
-
由 Laxman Dewangan 提交于
The Tegra20 HW issue with accessing APBIO registers (such as fuse registers) directly from the CPU concurrently with APB DMA accesses has been fixed in Tegra30 and later chips. Access these registers directly from the CPU on Tegra30 and later, and apply the workaround only for Tegra20. Signed-off-by: NLaxman Dewangan <ldewangan@nvidia.com> Tested-by: NChaitanya Bandi <bandik@nvidia.com> Signed-off-by: NStephen Warren <swarren@nvidia.com>
-
- 21 6月, 2012 3 次提交
-
-
由 Stephen Warren 提交于
The Seaboard device tree supports all the features that the Seaboard board files support. Hence, there's no need to keep the board files around any more; all users should convert to device tree. MACH_KAEN and MACH_WARIO are also removed. While tegra-seaboard.dts doesn't support those explicitly, it would be trivial to create device trees for those boards if anyone cares. The Seaboard device tree is now compiled if Tegra2 support is enabled, rather than when Seaboard support is enabled. Signed-off-by: NStephen Warren <swarren@nvidia.com>
-
由 Stephen Warren 提交于
* Make ARCH_TEGRA select USE_OF; DT is the way forward. * Build board-dt-tegra*.c when the relevant Tegra SoC support is enabled, rather than requiring a specific config option for this. * The board-specific config options already build board-*-pinmux.o, and when booting from device tree these files are no longer needed, so we can remove some Makefile commands related to those files. Signed-off-by: NStephen Warren <swarren@nvidia.com>
-
由 Wolfram Sang 提交于
powergate functions are needed for tegra30 as well (see common.c), so build it always. Fixes: arch/arm/mach-tegra/built-in.o: In function `tegra30_init_early': apbio.c:(.init.text+0x78): undefined reference to `tegra_powergate_init' (using "allnoconfig" with tegra30 enabled) Signed-off-by: NWolfram Sang <w.sang@pengutronix.de> Signed-off-by: NStephen Warren <swarren@nvidia.com>
-
- 19 4月, 2012 1 次提交
-
-
由 Stephen Warren 提交于
The pinctrl driver is now active and used by all boards. Remove the old pinmux driver. Signed-off-by: NStephen Warren <swarren@nvidia.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Acked-by: NOlof Johansson <olof@lixom.net>
-
- 13 3月, 2012 1 次提交
-
-
由 Marc Zyngier 提交于
Add support for the new smp_twd runtime registration interface to the tegra platforms, and remove the old compile-time support. Tested on Harmony. Acked-by: NStephen Warren <swarren@nvidia.com> Cc: Colin Cross <ccross@android.com> Cc: Olof Johansson <olof@lixom.net> Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
-
- 05 3月, 2012 1 次提交
-
-
由 Arnd Bergmann 提交于
It is possible to build a tegra kernel without localtimer support, so the tegra specific parts should only be built when that is indeed enabled. Signed-off-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NAlan Ott <alan@signal11.us> Signed-off-by: NOlof Johansson <olof@lixom.net>
-
- 27 2月, 2012 3 次提交
-
-
由 Peter De Schrijver 提交于
Prepare the Tegra secondary CPU core bringup code for other Tegra variants. The reset handler is also generalized to allow for future introduction of powersaving modes which turn off the CPU cores. Based on work by: Scott Williams <scwilliams@nvidia.com> Chris Johnson <cwj@nvidia.com> Colin Cross <ccross@android.com> Signed-off-by: NPeter De Schrijver <pdeschrijver@nvidia.com> Acked-by: NStephen Warren <swarren@nvidia.com> Tested-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
-
由 Peter De Schrijver 提交于
Introduce some functions to write to the flowcontroller registers. The flowcontroller controls CPU sleepstates and wakeup. Signed-off-by: NPeter De Schrijver <pdeschrijver@nvidia.com> Acked-by: NStephen Warren <swarren@nvidia.com> Tested-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
-
由 Peter De Schrijver 提交于
No need to compile cpuidle.c and sleep.S if cpuidle isn't configured in the kernel. Signed-off-by: NPeter De Schrijver <pdeschrijver@nvidia.com> Acked-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
-
- 07 2月, 2012 4 次提交
-
-
由 Stephen Warren 提交于
This PMC driver is enough to parse the nvidia,invert-interrupt property from device tree, and configure the PMC's to honor that. In the future, this file could expand to centralize all other PMC accesses within the mach-tegra code. Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
-
由 Olof Johansson 提交于
Tegra2 hangs if APB registers are accessed from the cpu during an apb dma operation. The workaround is to use apb dma to read/write the registers instead. There is a dependency loop between fuses, clocks, and APBDMA. If dma is enabled, fuse reads must go through APBDMA to avoid corruption due to a hw bug. APBDMA requires a clock to be enabled. Clocks must read a fuse to determine allowable cpu frequencies. Separate out the fuse DMA initialization, and allow the fuse read and write functions to be called without using DMA before the DMA initialization has been completed. Access to the fuses before APBDMA is initialized won't hit the hardware bug because nothing else can be using DMA. Original fuse registar access code from Varun Wadekar <vwadekar@nvidia.com>, improved by Colin Cross <ccross@android.com> and later moved to separate driver by Jon Mayo <jmayo@nvidia.com>. Major refactoring/cleanup by Olof Johansson <olof@lixom.net>. Changes since v1: * fix 'return false' on error condition * dequeue dma ops in case of timeout From: Jon Mayo <jmayo@nvidia.com>. Signed-off-by: Jon Mayo <jmayo@nvidia.com>. Signed-off-by: NOlof Johansson <olof@lixom.net> Acked-by: NStephen Warren <swarren@nvidia.com>
-
由 Peter De Schrijver 提交于
CPUidle driver for tegra. In this version only LP3 (clockgating) is supported. Based on work by: Colin Cross <ccross@android.com> Gary King <gking@nvidia.com> Signed-off-by: NPeter De Schrijver <pdeschrijver@nvidia.com> Acked-by: NStephen Warren <swarren@nvidia.com> Tested-by: NStephen Warren <swarren@nvidia.com> Acked-by: NColin Cross <ccross@android.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
-
由 Peter De Schrijver 提交于
Add init calls for clocks on tegra30. Signed-off-by: NPeter De Schrijver <pdeschrijver@nvidia.com> Tested-by: NStephen Warren <swarren@nvidia.com> Acked-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
-
- 20 12月, 2011 1 次提交
-
-
由 Stephen Warren 提交于
This moves the implementation of *_pinmux_init() into a single location. The board-specific pinmux data is left in each board's own file. This will allow future changes that set up the pinmux in a more complex fashion to do so without duplicating that code in each board's pinmux file. Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
-
- 18 12月, 2011 5 次提交
-
-
由 Peter De Schrijver 提交于
Add support for tegra30 SoC. This includes a device tree compatible type for this SoC ("nvidia,tegra30") and adds L2 cache initialization for this new SoC. The clock framework is still missing, which prevents most drivers from working. The basic IRQs are the same, so remove the dependency on CONFIG_ARCH_TEGRA_2x_SOC. Signed-off-by: NPeter De Schrijver <pdeschrijver@nvidia.com> Acked-by: NStephen Warren <swarren@nvidia.com> Acked-by: NColin Cross <ccross@android.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
-
由 Peter De Schrijver 提交于
Define the pinmuxing and pindrive tables for tegra30. The pinmux table defines the available functions for each pinmux group. The pindrive table defines the default pullup or pulldowns for each group. Derived from code by Scott Williams (scwilliams@nvidia.com) Signed-off-by: NPeter De Schrijver <pdeschrijver@nvidia.com> Acked-by: NStephen Warren <swarren@nvidia.com> Acked-by: NColin Cross <ccross@android.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
-
由 Peter De Schrijver 提交于
Rename pinmux-t2.h and pinmux-t2-tables.c to the new tegra naming. This file will be reworked somewhat in the next patch to support multiple tegra SoC types. Signed-off-by: NPeter De Schrijver <pdeschrijver@nvidia.com> Acked-by: NStephen Warren <swarren@nvidia.com> Acked-by: NColin Cross <ccross@android.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
-
由 Peter De Schrijver 提交于
Tegra20 based boards will be handled by the current board-dt.c file. Tegra30 based boards will be handled by a new board-dt-tegra30.c file. Hence rename the existing board-dt.c to board-dt-tegra20.c to reflect its use. Signed-off-by: NPeter De Schrijver <pdeschrijver@nvidia.com> Acked-by: NStephen Warren <swarren@nvidia.com> Acked-by: NColin Cross <ccross@android.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
-
由 Peter De Schrijver 提交于
* add a dependency to ARCH_TEGRA_2x_SOC in Kconfig to all tegra20 based boards and TEGRA_PCI * make powergating dependent on ARCH_TEGRA_2x_SOC * remove dependency on ARCH_TEGRA_2x_SOC for clock.c Signed-off-by: NPeter De Schrijver <pdeschrijver@nvidia.com> Acked-by: NStephen Warren <swarren@nvidia.com> Acked-by: NColin Cross <ccross@android.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
-
- 08 12月, 2011 4 次提交
-
-
由 Olof Johansson 提交于
For some reason it started out using {} instead of (), and it's proliferated from there. Switch back to (). Signed-off-by: NOlof Johansson <olof@lixom.net> Acked-by: NColin Cross <ccross@android.com>
-
由 Marc Dietrich 提交于
This adds a dts file for paz00. As a side effect, this also enables the embedded controller which controls the keyboard, touchpad, power, leds, and some other functions. Cc: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: NMarc Dietrich <marvin24@gmx.de> Acked-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
-
由 Stephen Warren 提交于
* Add device-tree file for TrimSlice * Add that to the list of .dts files to build * Update board-dt.c to recognize TrimSlice board name v2: Makefile: Add board-trimslice-pinmux.c to obj-$(CONFIG_MACH_TEGRA_DT). v3: Makefile: Use brackets not braces around var names Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
-
由 Olof Johansson 提交于
For some reason it started out using {} instead of (), and it's proliferated from there. Switch back to (). Signed-off-by: NOlof Johansson <olof@lixom.net> Acked-by: NColin Cross <ccross@android.com>
-
- 14 10月, 2011 1 次提交
-
-
由 Peter De Schrijver 提交于
Add support for ventana pinmuxing as a seaboard derivative. This is a cut down version of work done by Jong Kim <jongk@nvidia.com>. Signed-off-by: NPeter De Schrijver <pdeschrijver@nvidia.com> Acked-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
-
- 28 7月, 2011 1 次提交
-
-
由 Grant Likely 提交于
Everything required to populate NVIDIA Tegra devices from the device tree. This patch adds a new DT_MACHINE_DESC() which matches against a tegra20 device tree. So far it only registers the on-chip devices, but it will be refined in follow on patches to configure clocks and pin IO from the device tree also. Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
-
- 16 6月, 2011 1 次提交
-
-
由 Grant Likely 提交于
As part of the gpio driver consolidation, this patch moves the Tegra driver into drivers/gpio Signed-off-by: NGrant Likely <grant.likely@secretlab.ca> Acked-by: NOlof Johansson <olof@lixom.net> Acked-by: NColin Cross <ccross@android.com>
-
- 11 5月, 2011 1 次提交
-
-
由 Colin Cross 提交于
Now that irq.c is just an interface layer between the gic and legacy_irq.c, move the contents of legacy_irq.c into irq.c. Signed-off-by: NColin Cross <ccross@android.com>
-
- 16 3月, 2011 1 次提交
-
-
由 Mike Rapoport 提交于
Initialize the PMIC voltage regulators and provide the supply map for PCI-e clock supply. The rest of the supplies should be added together with the drivers that use them. Signed-off-by: NMike Rapoport <mike@compulab.co.il> CC: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
-
- 12 3月, 2011 1 次提交
-
-
由 Benoit Goby 提交于
Interface used by Tegra's gadget driver and ehci driver to power on and configure the USB PHYs. Signed-off-by: NBenoit Goby <benoit@android.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
-
- 08 3月, 2011 1 次提交
-
-
由 Marc Dietrich 提交于
This patch adds the config infrastructure, the pinmux and basic board setup code for PAZ00 (name of board inside the AC100/AZ). Signed-off-by: NMarc Dietrich <marvin24@gmx.de> Signed-off-by: NOlof Johansson <olof@lixom.net>
-
- 23 2月, 2011 2 次提交
-
-
由 Olof Johansson 提交于
This adds board support for the Seaboard eval platform and some of the derivatives that are very similar. Since they only differ in some very minor ways, most of the code is shared. Signed-off-by: NOlof Johansson <olof@lixom.net> Acked-by: NColin Cross <ccross@android.com>
-
由 Olof Johansson 提交于
Add a common location to register resources for used on-chip devices that are commonly configured on boards. Devices will be added to this file as more drivers are added that can make use of them. This is based on work contributed by several people, most of it from Colin Cross and Erik Gilling. Signed-off-by: NOlof Johansson <olof@lixom.net> Acked-by: NColin Cross <ccross@android.com>
-
- 21 2月, 2011 2 次提交
-
-
由 Colin Cross 提交于
The frequency memory bus on Tegra can be adjusted without disabling accesses to memory by updating the memory configuration registers from a per-board table, and then changing the clock frequency. The clock controller and memory controller have an interlock that prevents the new memory registers from taking effect until the clock frequency change. Acked-by: NOlof Johansson <olof@lixom.net> Signed-off-by: NColin Cross <ccross@android.com>
-
由 Colin Cross 提交于
The existing version did not extend well to core dvfs, drop it for now until the new clk api with clk_prepare and clk_unprepare is ready and non-atomic clocks are possible. Acked-by: NOlof Johansson <olof@lixom.net> Signed-off-by: NColin Cross <ccross@android.com>
-
- 11 2月, 2011 1 次提交
-
-
由 Mike Rapoport 提交于
Add basic support for CompuLab TrimSlice platform Signed-off-by: NMike Rapoport <mike@compulab.co.il> Signed-off-by: NColin Cross <ccross@android.com>
-
- 10 2月, 2011 1 次提交
-
-
由 Colin Cross 提交于
Signed-off-by: NColin Cross <ccross@android.com>
-
- 22 10月, 2010 1 次提交
-
-
由 Mike Rapoport 提交于
Signed-off-by: NMike Rapoport <mike@compulab.co.il> CC: Olof Johansson <olof@lixom.net> CC: Gary King <GKing@nvidia.com> Signed-off-by: NColin Cross <ccross@android.com>
-