As register and field widths and offsets are in the range 1..32, use
unsigned int (mostly replacing unsigned long) to store them in local
variables and for passing them around.

Move to one variable per line, move variables to the beginning of the
block where they are used, and drop superfluous initializations while we
are at it.
Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Register and field widths are in the range 1..32. Storing them in the
pinctrl data in (arrays of) unsigned long wastes space.

This decreases the size of a (32-bit) shmobile_defconfig kernel
supporting 7 SoCs by 26460 bytes.
Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

As PFC registers are either 8, 16, or 32 bits wide, use u32 (mostly
replacing unsigned long) to store (parts of) register values and masks.

Switch the shadow register operations from {set,clear}_bit() to plain C
bit operations, as the former can operate on long data only.
Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The r8a7791 platform is now DT-only, the driver doesn't need to match
platform devices by name anymore. Remove the corresponding
platform_device_id entry.
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: NSimon Horman <horms+renesas@verge.net.au>
Acked-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Remove sh7372 PFC support as part of the sh7372 and Mackerel
legacy code removal.
Signed-off-by: NMagnus Damm <damm+renesas@opensource.se>
Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Add PFC support for the EMMA Mobile EV2 SoC including pin groups for
on-chip devices.
Signed-off-by: NNiklas Söderlund <niso@kth.se>
Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

A platform_driver does not need to set an owner, it will be populated by the
driver core.
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

The SoC data structure allocated at init time only holds a regulator
pointer that is only used in the init function. Replace it with a local
variable and get rid of the SoC data structure allocation altogether.
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

On non-DT platforms IRQ controllers associated with the GPIOs have a
fixed IRQ base value known at compile time. The sh-pfc driver translates
GPIO number to IRQ numbers using a hardcoded table. This mechanism
breaks on DT platforms, as the IRQ base values are dynamic in that case.

Fix this by specifying IRQs associated with GPIOs in IRQ resources,
populated automatically from the device tree. When IRQ resources are
specified the driver requires one IRQ resource per GPIO able to generate
an interrupt, and uses the translation table to compute the IRQ resource
offset instead of the IRQ number.

Cc: devicetree@vger.kernel.org
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

There's more than one window, name the field windows.
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Some indices take positive values only, make them unsigned.
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Add PFC support for the r8a7791 SoC V2 including pin groups for
on-chip devices such as MSIOF, SCIF, USB, MMC, SDHI, DU.
Signed-off-by: NHisashi Nakamura <hisashi.nakamura.ak@renesas.com>
Signed-off-by: NKunihito Higashiyama <kunihito.higashiyama.ur@renesas.com>
Signed-off-by: NYoshikazu Fujikawa <yoshikazu.fujikawa.ue@renesas.com>
Signed-off-by: NNobuyuki HIRAI <nobuyuki.hirai.xe@renesas.com>
Signed-off-by: NShinobu Uehara <shinobu.uehara.xc@renesas.com>
Signed-off-by: NKoji Matsuoka <koji.matsuoka.xm@renesas.com>
Signed-off-by: NRyo Kataoka <ryo.kataoka.wt@renesas.com>
[damm@opensource.se: Forward ported to upstream, minor fixes]
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>

The driver core clears the driver data to NULL after device_release
or on probe failure. Thus, it is not needed to manually clear the
device driver data to NULL.
Signed-off-by: NJingoo Han <jg1.han@samsung.com>
Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Pins with selectable functions but without a GPIO port can't be named
PORT_# or GP_#_#. Add a SH_PFC_PIN_NAMED macro to declare such pins in
the pinmux pins array, naming them with the PIN_ prefix followed by the
pin physical position.

In order to make sure not to register those pins as GPIOs, add a
SH_PFC_PIN_CFG_NO_GPIO pin flag to denote pins without a GPIO port.
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Tested-by: NYusuke Goda <yusuke.goda.sx@renesas.com>

Remove the manually specified ranges from PFC SoC data and compute the
ranges automatically. This prevents ranges from being out-of-sync with
pins definitions.
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Tested-by: NYusuke Goda <yusuke.goda.sx@renesas.com>

The typedef only conceals the real variable type without bringing any
additional value (see Documentation/CodingStyle, section 5.b). Moreover,
it polutes the pinmux namespace. Replace it with the integer type it
used to hide.
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Tested-by: NYusuke Goda <yusuke.goda.sx@renesas.com>

The ranges are not used anymore, remove them.
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Tested-by: NYusuke Goda <yusuke.goda.sx@renesas.com>

Support device instantiation through the device tree. The compatible
property is used to select the SoC pinmux information.

Set the gpio_chip device field to the PFC device to enable automatic
GPIO OF support.

Cc: devicetree-discuss@lists.ozlabs.org
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: NHeiko Stuebner <heiko@sntech.de>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Platform data isn't used, support can thus be removed.
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: NHeiko Stuebner <heiko@sntech.de>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Add two optional init and exit SoC operations and call them from the
core at probe and remove time.
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: NSimon Horman <horms@verge.net.au>

Add initial PFC support for the r8a7790 SoC.

At this point only GPIO interface is supported, move to
newer interfaces planned as incremental changes.

Original authors is Koji Matsuoka-san, thanks for him
and his team for the heavy lifting. Adjusted by Magnus
to work together with updated code in drivers/pinctrl.
Signed-off-by: NKoji Matsuoka <koji.matsuoka.xm@rms.renesas.com>
Signed-off-by: NMagnus Damm <damm@opensource.se>
Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Add initial PFC support for the r8a73a4 SoC.

At this point only GPIO interface is supported, move to newer interfaces
planned as incremental changes.

Original authors are Morimoto-san with help from Yoshii-san, thanks to
them for the heavy lifting. Adjusted by Magnus to work together with
updated code in drivers/pinctrl.
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: NTakashi Yoshii <takashi.yoshii.zj@renesas.com>
Signed-off-by: NMagnus Damm <damm@opensource.se>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

When a GPIO is handled by a separate driver the pinmux
gpio_set_direction() handler won't be called. The pin mux type then need
to be configured to GPIO at request time.
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

The sh_pfc_phys_to_virt() function ends with a BUG() statement without a
return. When CONFIG_BUG isn't set the function will thus have no return
value. Fix it.
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>

Return proper error codes instead of -1, and propagate the error codes.
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>

None of the SoC data need to be modified. Constify it.
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>

The purpose of the dry-run is to ensure that a pin about to be
configured isn't in use. However, the current implementation is a no-op.
This proves that the dry-run isn't essential. Remove it.

Freeing configuration then becomes a no-op as well. Remove it.
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>

The sh_pfc_pin structure supplied in SoC data contains information about
pin configuration and name. It's abused to store GPIO data registers
information and pin config type. Move those fields out of the
pinmux_data_reg structure into the new sh_pfc_gpio_pin and
sh_pfc_pin_config structures.
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>

Now that all PFC platform devices provide memory resources support for
registers without an associated memory resource isn't used anymore. Drop
it.
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>

All data registers are located in the same memory resource. Locate the
mapped resource at initializat time and use it directly instead of
computing a mapped address for each register. This gets rid of the
mapped_reg field of the pinmux_data_reg structure.
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>

Move the sh_pfc_setup_data_regs(), sh_pfc_setup_data_reg(),
sh_pfc_get_data_reg(), sh_pfc_read_bit() and sh_pfc_write_bit()
function to gpio.c as they belong to the GPIO implementation. Inline
sh_pfc_read_bit() and sh_pfc_write_bit() in their only call location.
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>

The PFC driver assumes that the value of the GPIO_PORTxxx enumeration
names are equal to the port number. This isn't true when the port number
space is sparse, as with the SH73A0.

Fix the issue by adding support for pin numbers ranges specified through
SoC data. When no range is specified the driver considers that the PFC
implements a single contiguous range for all pins.
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>

This prepares support for sparse pin numbering. The function currently
just performs and indexed lookup in the pins array.
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>

The function is guaranteed to be called with a gpio number smaller than
nr_pins. The condition can the be simplified, and the function inlined.
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>

The PFC core exposes a sh_pfc_config_gpio() function that configures
pinmuxing for a given GPIO (either a real GPIO or a function GPIO).
Handling of real and function GPIOs belong to the GPIO layer, move the
GPIO number to mark translation to the caller and rename the function to
sh_pfc_config_mux().
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>

Instead of converting the GPIO number to an enum_id and looking up IRQ
table entries by enum_id, replace the pinmux_irq enum_ids field with a
gpios field and lookup entries using the GPIO number.
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>

And drop the pinmux_flag_t typedef.
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>

Register two GPIO chips, one for the real GPIOs and one for the function
GPIOs.
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>