- 03 10月, 2020 26 次提交
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由 Ioana Ciornei 提交于
Add basic support in dpaa2-eth for devlink. For the moment, just register the device with devlink, add the corresponding devlink port and implement the .info_get() callback. Signed-off-by: NIoana Ciornei <ioana.ciornei@nxp.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Shannon Nelson 提交于
If the new firmware image downladed for update is corrupted or is a bad format, the download process will report a status code specifically for that. Signed-off-by: NShannon Nelson <snelson@pensando.io> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Shannon Nelson 提交于
Use the lif's ident information for the uc and mc filter counts rather than the ionic's version, to be sure we're getting the info that is specific to this lif. While we're thinking about it, add some missing error checking where we get the lif's identity information. Signed-off-by: NShannon Nelson <snelson@pensando.io> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Shannon Nelson 提交于
After we do a fw upgrade and refill the ionic->ident.dev, we also need to update the other identity info. Since the lif identity needs to be updated each time the ionic identity is refreshed, we can pull it into ionic_identify(). The debugfs entry is moved so that it doesn't cause an error message when the data is refreshed after the fw upgrade. Signed-off-by: NShannon Nelson <snelson@pensando.io> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Shannon Nelson 提交于
Some time ago we short-circuited the queue disables on a timeout error in order to not have to wait on every queue when we already know it will time out. However, this meant that we're not properly stopping all the interrupts and napi contexts. This changes queue disable to always call ionic_qcq_disable() and to give it an argument to know when to not do the adminq request. Signed-off-by: NShannon Nelson <snelson@pensando.io> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Shannon Nelson 提交于
There are a couple of error recovery paths that can come through ionic_qcq_disable() without having set up the qcq, so we need to make sure we have a valid qcq pointer before using it. Signed-off-by: NShannon Nelson <snelson@pensando.io> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Shannon Nelson 提交于
Clear our link check requested flag on an allocation error. We end up dropping this link check request, but that should be fine as our watchdog will come back a few seconds later and request it again. Reported-by: NSebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: NShannon Nelson <snelson@pensando.io> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Shannon Nelson 提交于
Check through our work list for additional items. This normally will only have one item, but occasionally may have another job waiting. There really is no need reschedule ourself here. Reported-by: NSebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: NShannon Nelson <snelson@pensando.io> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Shannon Nelson 提交于
The event notification queue is set up a little differently in the NIC and so the notifyq q and cq descriptor structures need to be contiguous, which got missed in an earlier patch that separated out the q and cq descriptor allocations. That patch was aimed at making the big tx and rx descriptor queue allocations easier to manage - the notifyq is much smaller and doesn't need to be split. This patch simply adds an if/else and slightly different code for the notifyq descriptor allocation. Fixes: ea5a8b09 ("ionic: reduce contiguous memory allocation requirement") Signed-off-by: NShannon Nelson <snelson@pensando.io> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Vasily Gorbik 提交于
drivers/s390/net/ctcm_fsms.h: fsm_action_nop - only declaration left after commit 04885948 ("ctc: removal of the old ctc driver") drivers/s390/net/ctcm_mpc.h: ctcmpc_open - only declaration left after commit 293d984f ("ctcm: infrastructure for replaced ctc driver") Reviewed-by: NJulian Wiedmann <jwi@linux.ibm.com> Signed-off-by: NVasily Gorbik <gor@linux.ibm.com> Signed-off-by: NJulian Wiedmann <jwi@linux.ibm.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Julian Wiedmann 提交于
- Add/delete some blanks, white spaces and braces. - Fix misindentations. - Adjust a deprecated header include, and htons() conversion. - Remove extra 'return' statements. Signed-off-by: NJulian Wiedmann <jwi@linux.ibm.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Julian Wiedmann 提交于
Replace our custom version of netdev_name(). Once we started to allocate the netdev at probe time with commit d3d1b205 ("s390/qeth: allocate netdevice early"), this stopped working as intended anyway. Signed-off-by: NJulian Wiedmann <jwi@linux.ibm.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Julian Wiedmann 提交于
The discipline struct is a fixed group of function pointers. So declare the L2 and L3 disciplines as constant. Signed-off-by: NJulian Wiedmann <jwi@linux.ibm.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Julian Wiedmann 提交于
For OSA devices that are _not_ configured in prio-queue mode, give users the option of selecting the number of active TX queues. This requires setting up the HW queues with a reasonable default QoS value in the QIB's PQUE parm area. As with the other device types, we bring up the device with a minimal number of TX queues for compatibility reasons. Signed-off-by: NJulian Wiedmann <jwi@linux.ibm.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Julian Wiedmann 提交于
Use a proper struct, and only program the QIB extensions for devices where they are supported. Signed-off-by: NJulian Wiedmann <jwi@linux.ibm.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Julian Wiedmann 提交于
When re-initializing a device, we can hit a situation where qeth_osa_set_output_queues() detects that it supports more or less HW TX queues than before. Right now we adjust dev->real_num_tx_queues from right there, but 1. it's getting more & more complicated to cover all cases, and 2. we can't re-enable the actually expected number of TX queues later because we lost the needed information. So keep track of the wanted TX queues (on initial setup, and whenever its changed via .set_channels), and later use that information when re-enabling the netdevice. Signed-off-by: NJulian Wiedmann <jwi@linux.ibm.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Vladimir Oltean 提交于
Via the OCELOT_MASK_MODE_REDIRECT flag put in the IS2 action vector, it is possible to replace previous forwarding decisions with the port mask installed in this rule. I have studied Table 54 "MASK_MODE and PORT_MASK Combinations" from the VSC7514 documentation and it appears to behave sanely when this rule is installed in either lookup 0 or 1. Namely, a redirect in lookup 1 will overwrite the forwarding decision taken by any entry in lookup 0. Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Vladimir Oltean 提交于
The issue which led to the introduction of this check was that MAC_ETYPE rules, such as filters on dst_mac and src_mac, would only match non-IP frames. There is a knob in VCAP_S2_CFG which forces all IP frames to be treated as non-IP, which is what we're currently doing if the user requested a dst_mac filter, in order to maintain sanity. But that knob is actually per IS2 lookup. And the good thing with exposing the lookups to the user via tc chains is that we're now able to offload MAC_ETYPE keys to one lookup, and IP keys to the other lookup. So let's do that. Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Vladimir Oltean 提交于
We were installing TCAM rules with the LOOKUP field as unmasked, meaning that all entries were matching on all lookups. Now that lookups are exposed as individual chains, let's make the LOOKUP explicit when offloading TCAM entries. Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Xiaoliang Yang 提交于
VCAP ES0 is an egress VCAP operating on all outgoing frames. This patch added ES0 driver to support vlan push action of tc filter. Usage: tc filter add dev swp1 egress protocol 802.1Q flower indev swp0 skip_sw \ vlan_id 1 vlan_prio 1 action vlan push id 2 priority 2 Signed-off-by: NXiaoliang Yang <xiaoliang.yang_1@nxp.com> Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Xiaoliang Yang 提交于
VCAP IS1 is a VCAP module which can filter on the most common L2/L3/L4 Ethernet keys, and modify the results of the basic QoS classification and VLAN classification based on those flow keys. There are 3 VCAP IS1 lookups, mapped over chains 10000, 11000 and 12000. Currently the driver is hardcoded to use IS1_ACTION_TYPE_NORMAL half keys. Note that the VLAN_MANGLE has been omitted for now. In hardware, the VCAP_IS1_ACT_VID_REPLACE_ENA field replaces the classified VLAN (metadata associated with the frame) and not the VLAN from the header itself. There are currently some issues which need to be addressed when operating in standalone, or in bridge with vlan_filtering=0 modes, because in those cases the switch ports have VLAN awareness disabled, and changing the classified VLAN to anything other than the pvid causes the packets to be dropped. Another issue is that on egress, we expect port tagging to push the classified VLAN, but port tagging is disabled in the modes mentioned above, so although the classified VLAN is replaced, it is not visible in the packet transmitted by the switch. Signed-off-by: NXiaoliang Yang <xiaoliang.yang_1@nxp.com> Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Vladimir Oltean 提交于
For Ocelot switches, there are 2 ingress pipelines for flow offload rules: VCAP IS1 (Ingress Classification) and IS2 (Security Enforcement). IS1 and IS2 support different sets of actions. The pipeline order for a packet on ingress is: Basic classification -> VCAP IS1 -> VCAP IS2 Furthermore, IS1 is looked up 3 times, and IS2 is looked up twice (each TCAM entry can be configured to match only on the first lookup, or only on the second, or on both etc). Because the TCAMs are completely independent in hardware, and because of the fixed pipeline, we actually have very limited options when it comes to offloading complex rules to them while still maintaining the same semantics with the software data path. This patch maps flow offload rules to ingress TCAMs according to a predefined chain index number. There is going to be a script in selftests that clarifies the usage model. There is also an egress TCAM (VCAP ES0, the Egress Rewriter), which is modeled on top of the default chain 0 of the egress qdisc, because it doesn't have multiple lookups. Suggested-by: NAllan W. Nielsen <allan.nielsen@microchip.com> Co-developed-by: NXiaoliang Yang <xiaoliang.yang_1@nxp.com> Signed-off-by: NXiaoliang Yang <xiaoliang.yang_1@nxp.com> Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Vladimir Oltean 提交于
Since the mscc_ocelot_switch_lib is common between a pure switchdev and a DSA driver, the procedure of retrieving a net_device for a certain port index differs, as those are registered by their individual front-ends. Up to now that has been dealt with by always passing the port index to the switch library, but now, we're going to need to work with net_device pointers from the tc-flower offload, for things like indev, or mirred. It is not desirable to refactor that, so let's make sure that the flower offload core has the ability to translate between a net_device and a port index properly. Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com> Acked-by: NAlexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Vladimir Oltean 提交于
At this stage, the tc-flower offload of mscc_ocelot can only delegate rules to the VCAP IS2 security enforcement block. These rules have, in hardware, separate bits for policing and for overriding the destination port mask and/or copying to the CPU. So it makes sense that we attempt to expose some more of that low-level complexity instead of simply choosing between a single type of action. Something similar happens with the VCAP IS1 block, where the same action can contain enable bits for VLAN classification and for QoS classification at the same time. So model the action structure after the hardware description, and let the high-level ocelot_flower.c construct an action vector from multiple tc actions. Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Łukasz Stelmach 提交于
Use more generic eth_platform_get_mac_address() which can get a MAC address from other than DT platform specific sources too. Check if the obtained address is valid. Signed-off-by: NŁukasz Stelmach <l.stelmach@samsung.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Florian Fainelli 提交于
Indicate to the DSA receive path that we need to untage the bridge PVID, this allows us to remove the dsa_untag_bridge_pvid() calls from net/dsa/tag_brcm.c. Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com> Reviewed-by: NVladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 02 10月, 2020 14 次提交
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由 Armin Wolf 提交于
Use netif_msg_init() to process param settings and use only the proper initialized value of ei_local->msg_level for later processing; Signed-off-by: NArmin Wolf <W_Armin@gmx.de> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Willy Liu 提交于
Realtek single-chip Ethernet PHY solutions can be separated as below: 10M/100Mbps: RTL8201X 1Gbps: RTL8211X 2.5Gbps: RTL8226/RTL8221X RTL8226 is the first version for realtek that compatible 2.5Gbps single PHY. Since RTL8226 is single port only, realtek changes its name to RTL8221B from the second version. PHY ID for RTL8226 is 0x001cc800 and RTL8226B/RTL8221B is 0x001cc840. RTL8125 is not a single PHY solution, it integrates PHY/MAC/PCIE bus controller and embedded memory. Signed-off-by: NWilly Liu <willy.liu@realtek.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Jing Xiangfeng 提交于
After commit a8c7687b ("caif_virtio: Check that vringh_config is not null"), the variable err is being initialized with '-EINVAL' that is meaningless. So remove it. Signed-off-by: NJing Xiangfeng <jingxiangfeng@huawei.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Xie He 提交于
The fr_hard_header function is used to prepend the header to skbs before transmission. It is used in 3 situations: 1) When a control packet is generated internally in this driver; 2) When a user sends an skb on an Ethernet-emulating PVC device; 3) When a user sends an skb on a normal PVC device. These 3 situations need to be handled differently by fr_hard_header. Different headers should be prepended to the skb in different situations. Currently fr_hard_header distinguishes these 3 situations using skb->protocol. For situation 1 and 2, a special skb->protocol value will be assigned before calling fr_hard_header, so that it can recognize these 2 situations. All skb->protocol values other than these special ones are treated by fr_hard_header as situation 3. However, it is possible that in situation 3, the user sends an skb with one of the special skb->protocol values. In this case, fr_hard_header would incorrectly treat it as situation 1 or 2. This patch tries to solve this issue by using skb->dev instead of skb->protocol to distinguish between these 3 situations. For situation 1, skb->dev would be NULL; for situation 2, skb->dev->type would be ARPHRD_ETHER; and for situation 3, skb->dev->type would be ARPHRD_DLCI. This way fr_hard_header would be able to distinguish these 3 situations correctly regardless what skb->protocol value the user tries to use in situation 3. Cc: Krzysztof Halasa <khc@pm.waw.pl> Signed-off-by: NXie He <xie.he.0141@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Geert Uytterhoeven 提交于
Some EtherAVB variants support internal clock delay configuration, which can add larger delays than the delays that are typically supported by the PHY (using an "rgmii-*id" PHY mode, and/or "[rt]xc-skew-ps" properties). Historically, the EtherAVB driver configured these delays based on the "rgmii-*id" PHY mode. This caused issues with PHY drivers that implement PHY internal delays properly[1]. Hence a backwards-compatible workaround was added by masking the PHY mode[2]. Add proper support for explicit configuration of the MAC internal clock delays using the new "[rt]x-internal-delay-ps" properties. Fall back to the old handling if none of these properties is present. [1] Commit bcf3440c ("net: phy: micrel: add phy-mode support for the KSZ9031 PHY") [2] Commit 9b23203c ("ravb: Mask PHY mode to avoid inserting delays twice"). Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: NSergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Geert Uytterhoeven 提交于
Currently, full delay handling is done in both the probe and resume paths. Split it in two parts, so the resume path doesn't have to redo the parsing part over and over again. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: NSergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Loic Poulain 提交于
In bmps mode, beacons are filtered, and firmware is in charge of monitoring the beacons and report changes or loss. mac80211 must be advertised about such change to prevent it's internal timer based beacon monitor to report beacon loss. Fix that by setting/clearing the IEEE80211_VIF_BEACON_FILTER vif flag on bmps entry/exit. Signed-off-by: NLoic Poulain <loic.poulain@linaro.org> Signed-off-by: NKalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/1592471863-31402-2-git-send-email-loic.poulain@linaro.org
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由 Kalle Valo 提交于
These casts are not needed. No changes in functionality. Tested-on: QCA6390 hw2.0 PCI WLAN.HST.1.0.1-01740-QCAHSTSWPLZ_V2_TO_X86-1 Signed-off-by: NKalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/1601544890-13450-9-git-send-email-kvalo@codeaurora.org
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由 Carl Huang 提交于
Host sends wmi command to allow hardware enter idle power save mode in ath11k_mac_op_start function. hw parameter idle_ps indicates whether idle power save is supported. Tested-on: QCA6390 hw2.0 PCI WLAN.HST.1.0.1-01740-QCAHSTSWPLZ_V2_TO_X86-1 Signed-off-by: NCarl Huang <cjhuang@codeaurora.org> Signed-off-by: NKalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/1601544890-13450-8-git-send-email-kvalo@codeaurora.org
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由 Carl Huang 提交于
For QCA6390, Start a timer to update CE pipe 4 ring HP when shadow register is enabled. Its' to avoid that HP isn't updated to target register. Tested-on: QCA6390 hw2.0 PCI WLAN.HST.1.0.1-01740-QCAHSTSWPLZ_V2_TO_X86-1 Signed-off-by: NCarl Huang <cjhuang@codeaurora.org> Signed-off-by: NKalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/1601544890-13450-7-git-send-email-kvalo@codeaurora.org
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由 Carl Huang 提交于
Start a timer to update REO HP if HP isn't updated to target. Tested-on: QCA6390 hw2.0 PCI WLAN.HST.1.0.1-01740-QCAHSTSWPLZ_V2_TO_X86-1 Signed-off-by: NCarl Huang <cjhuang@codeaurora.org> Signed-off-by: NKalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/1601544890-13450-6-git-send-email-kvalo@codeaurora.org
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由 Carl Huang 提交于
The timer is to check if TCL HP isn't updated to target. The timer will postpone itself if there are TX operations during the interval, otherwise the timer handler updates the HP again so the index value in HP register will be forwarded to target register, and the timer stops afterwards. Tested-on: QCA6390 hw2.0 PCI WLAN.HST.1.0.1-01740-QCAHSTSWPLZ_V2_TO_X86-1 Signed-off-by: NCarl Huang <cjhuang@codeaurora.org> Signed-off-by: NKalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/1601544890-13450-5-git-send-email-kvalo@codeaurora.org
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由 Carl Huang 提交于
For QCA6390, set wmi credit to 1 to avoid back-to-back write to shadow register when shadow register is enabled. Tested-on: QCA6390 hw2.0 PCI WLAN.HST.1.0.1-01740-QCAHSTSWPLZ_V2_TO_X86-1 Signed-off-by: NCarl Huang <cjhuang@codeaurora.org> Signed-off-by: NKalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/1601544890-13450-4-git-send-email-kvalo@codeaurora.org
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由 Carl Huang 提交于
To enable shadow register access, host needs to pass shadow register configuration to firmware via qmi message. Host also needs to update ring's HP or TP address to shadow register address. The write operation to shadow register will be forwarded to target register by hardware automatically, and the write operation to shadow register is permitted even when the target is in power save or sleep mode. Update the shadow config whenever power up happens. This feature is controlled by hw parameter supports_shadow_regs which is only enabled for QCA6390. Tested-on: QCA6390 hw2.0 PCI WLAN.HST.1.0.1-01740-QCAHSTSWPLZ_V2_TO_X86-1 Signed-off-by: NCarl Huang <cjhuang@codeaurora.org> Signed-off-by: NKalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/1601544890-13450-3-git-send-email-kvalo@codeaurora.org
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